1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/firmware.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_domain.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/qcom_scm.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/remoteproc.h>
23 #include <linux/soc/qcom/mdt_loader.h>
24 #include <linux/soc/qcom/smem.h>
25 #include <linux/soc/qcom/smem_state.h>
27 #include "qcom_common.h"
28 #include "qcom_pil_info.h"
29 #include "qcom_q6v5.h"
30 #include "remoteproc_internal.h"
33 int crash_reason_smem;
34 const char *firmware_name;
39 char **active_pd_names;
40 char **proxy_pd_names;
43 const char *sysmon_name;
51 struct qcom_q6v5 q6v5;
54 struct clk *aggre2_clk;
56 struct regulator *cx_supply;
57 struct regulator *px_supply;
59 struct device *active_pds[1];
60 struct device *proxy_pds[3];
66 int crash_reason_smem;
68 const char *info_name;
70 struct completion start_done;
71 struct completion stop_done;
74 phys_addr_t mem_reloc;
78 struct qcom_rproc_glink glink_subdev;
79 struct qcom_rproc_subdev smd_subdev;
80 struct qcom_rproc_ssr ssr_subdev;
81 struct qcom_sysmon *sysmon;
84 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
90 for (i = 0; i < pd_count; i++) {
91 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
92 ret = pm_runtime_get_sync(pds[i]);
100 for (i--; i >= 0; i--) {
101 dev_pm_genpd_set_performance_state(pds[i], 0);
102 pm_runtime_put(pds[i]);
108 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
113 for (i = 0; i < pd_count; i++) {
114 dev_pm_genpd_set_performance_state(pds[i], 0);
115 pm_runtime_put(pds[i]);
119 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
121 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
124 ret = qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
125 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
130 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
135 static int adsp_start(struct rproc *rproc)
137 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
140 qcom_q6v5_prepare(&adsp->q6v5);
142 ret = adsp_pds_enable(adsp, adsp->active_pds, adsp->active_pd_count);
146 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
148 goto disable_active_pds;
150 ret = clk_prepare_enable(adsp->xo);
152 goto disable_proxy_pds;
154 ret = clk_prepare_enable(adsp->aggre2_clk);
158 ret = regulator_enable(adsp->cx_supply);
160 goto disable_aggre2_clk;
162 ret = regulator_enable(adsp->px_supply);
164 goto disable_cx_supply;
166 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
169 "failed to authenticate image and release reset\n");
170 goto disable_px_supply;
173 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
174 if (ret == -ETIMEDOUT) {
175 dev_err(adsp->dev, "start timed out\n");
176 qcom_scm_pas_shutdown(adsp->pas_id);
177 goto disable_px_supply;
183 regulator_disable(adsp->px_supply);
185 regulator_disable(adsp->cx_supply);
187 clk_disable_unprepare(adsp->aggre2_clk);
189 clk_disable_unprepare(adsp->xo);
191 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
193 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count);
195 qcom_q6v5_unprepare(&adsp->q6v5);
200 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
202 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
204 regulator_disable(adsp->px_supply);
205 regulator_disable(adsp->cx_supply);
206 clk_disable_unprepare(adsp->aggre2_clk);
207 clk_disable_unprepare(adsp->xo);
208 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
211 static int adsp_stop(struct rproc *rproc)
213 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
217 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
218 if (ret == -ETIMEDOUT)
219 dev_err(adsp->dev, "timed out on wait\n");
221 ret = qcom_scm_pas_shutdown(adsp->pas_id);
223 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
225 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count);
226 handover = qcom_q6v5_unprepare(&adsp->q6v5);
228 qcom_pas_handover(&adsp->q6v5);
233 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len)
235 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
238 offset = da - adsp->mem_reloc;
239 if (offset < 0 || offset + len > adsp->mem_size)
242 return adsp->mem_region + offset;
245 static unsigned long adsp_panic(struct rproc *rproc)
247 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
249 return qcom_q6v5_panic(&adsp->q6v5);
252 static const struct rproc_ops adsp_ops = {
255 .da_to_va = adsp_da_to_va,
256 .parse_fw = qcom_register_dump_segments,
261 static int adsp_init_clock(struct qcom_adsp *adsp)
265 adsp->xo = devm_clk_get(adsp->dev, "xo");
266 if (IS_ERR(adsp->xo)) {
267 ret = PTR_ERR(adsp->xo);
268 if (ret != -EPROBE_DEFER)
269 dev_err(adsp->dev, "failed to get xo clock");
273 if (adsp->has_aggre2_clk) {
274 adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
275 if (IS_ERR(adsp->aggre2_clk)) {
276 ret = PTR_ERR(adsp->aggre2_clk);
277 if (ret != -EPROBE_DEFER)
279 "failed to get aggre2 clock");
287 static int adsp_init_regulator(struct qcom_adsp *adsp)
289 adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
290 if (IS_ERR(adsp->cx_supply))
291 return PTR_ERR(adsp->cx_supply);
293 regulator_set_load(adsp->cx_supply, 100000);
295 adsp->px_supply = devm_regulator_get(adsp->dev, "px");
296 return PTR_ERR_OR_ZERO(adsp->px_supply);
299 static int adsp_pds_attach(struct device *dev, struct device **devs,
309 /* Handle single power domain */
310 if (dev->pm_domain) {
312 pm_runtime_enable(dev);
316 while (pd_names[num_pds])
319 for (i = 0; i < num_pds; i++) {
320 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
321 if (IS_ERR_OR_NULL(devs[i])) {
322 ret = PTR_ERR(devs[i]) ? : -ENODATA;
330 for (i--; i >= 0; i--)
331 dev_pm_domain_detach(devs[i], false);
336 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
339 struct device *dev = adsp->dev;
342 /* Handle single power domain */
343 if (dev->pm_domain && pd_count) {
344 pm_runtime_disable(dev);
348 for (i = 0; i < pd_count; i++)
349 dev_pm_domain_detach(pds[i], false);
352 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
354 struct device_node *node;
358 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
360 dev_err(adsp->dev, "no memory-region specified\n");
364 ret = of_address_to_resource(node, 0, &r);
368 adsp->mem_phys = adsp->mem_reloc = r.start;
369 adsp->mem_size = resource_size(&r);
370 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
371 if (!adsp->mem_region) {
372 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
373 &r.start, adsp->mem_size);
380 static int adsp_probe(struct platform_device *pdev)
382 const struct adsp_data *desc;
383 struct qcom_adsp *adsp;
388 desc = of_device_get_match_data(&pdev->dev);
392 if (!qcom_scm_is_available())
393 return -EPROBE_DEFER;
395 fw_name = desc->firmware_name;
396 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
398 if (ret < 0 && ret != -EINVAL)
401 rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
402 fw_name, sizeof(*adsp));
404 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
408 rproc->auto_boot = desc->auto_boot;
409 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
411 adsp = (struct qcom_adsp *)rproc->priv;
412 adsp->dev = &pdev->dev;
414 adsp->pas_id = desc->pas_id;
415 adsp->has_aggre2_clk = desc->has_aggre2_clk;
416 adsp->info_name = desc->sysmon_name;
417 platform_set_drvdata(pdev, adsp);
419 device_wakeup_enable(adsp->dev);
421 ret = adsp_alloc_memory_region(adsp);
425 ret = adsp_init_clock(adsp);
429 ret = adsp_init_regulator(adsp);
433 ret = adsp_pds_attach(&pdev->dev, adsp->active_pds,
434 desc->active_pd_names);
437 adsp->active_pd_count = ret;
439 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
440 desc->proxy_pd_names);
442 goto detach_active_pds;
443 adsp->proxy_pd_count = ret;
445 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
448 goto detach_proxy_pds;
450 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
451 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
452 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
453 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
456 if (IS_ERR(adsp->sysmon)) {
457 ret = PTR_ERR(adsp->sysmon);
458 goto detach_proxy_pds;
461 ret = rproc_add(rproc);
463 goto detach_proxy_pds;
468 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
470 adsp_pds_detach(adsp, adsp->active_pds, adsp->active_pd_count);
477 static int adsp_remove(struct platform_device *pdev)
479 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
481 rproc_del(adsp->rproc);
483 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
484 qcom_remove_sysmon_subdev(adsp->sysmon);
485 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
486 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
487 rproc_free(adsp->rproc);
492 static const struct adsp_data adsp_resource_init = {
493 .crash_reason_smem = 423,
494 .firmware_name = "adsp.mdt",
496 .has_aggre2_clk = false,
499 .sysmon_name = "adsp",
503 static const struct adsp_data sm8150_adsp_resource = {
504 .crash_reason_smem = 423,
505 .firmware_name = "adsp.mdt",
507 .has_aggre2_clk = false,
509 .active_pd_names = (char*[]){
513 .proxy_pd_names = (char*[]){
518 .sysmon_name = "adsp",
522 static const struct adsp_data sm8250_adsp_resource = {
523 .crash_reason_smem = 423,
524 .firmware_name = "adsp.mdt",
526 .has_aggre2_clk = false,
528 .active_pd_names = (char*[]){
532 .proxy_pd_names = (char*[]){
538 .sysmon_name = "adsp",
542 static const struct adsp_data msm8998_adsp_resource = {
543 .crash_reason_smem = 423,
544 .firmware_name = "adsp.mdt",
546 .has_aggre2_clk = false,
548 .proxy_pd_names = (char*[]){
553 .sysmon_name = "adsp",
557 static const struct adsp_data cdsp_resource_init = {
558 .crash_reason_smem = 601,
559 .firmware_name = "cdsp.mdt",
561 .has_aggre2_clk = false,
564 .sysmon_name = "cdsp",
568 static const struct adsp_data sm8150_cdsp_resource = {
569 .crash_reason_smem = 601,
570 .firmware_name = "cdsp.mdt",
572 .has_aggre2_clk = false,
574 .active_pd_names = (char*[]){
578 .proxy_pd_names = (char*[]){
583 .sysmon_name = "cdsp",
587 static const struct adsp_data sm8250_cdsp_resource = {
588 .crash_reason_smem = 601,
589 .firmware_name = "cdsp.mdt",
591 .has_aggre2_clk = false,
593 .active_pd_names = (char*[]){
597 .proxy_pd_names = (char*[]){
602 .sysmon_name = "cdsp",
606 static const struct adsp_data mpss_resource_init = {
607 .crash_reason_smem = 421,
608 .firmware_name = "modem.mdt",
610 .has_aggre2_clk = false,
612 .active_pd_names = (char*[]){
616 .proxy_pd_names = (char*[]){
622 .sysmon_name = "modem",
626 static const struct adsp_data slpi_resource_init = {
627 .crash_reason_smem = 424,
628 .firmware_name = "slpi.mdt",
630 .has_aggre2_clk = true,
633 .sysmon_name = "slpi",
637 static const struct adsp_data sm8150_slpi_resource = {
638 .crash_reason_smem = 424,
639 .firmware_name = "slpi.mdt",
641 .has_aggre2_clk = false,
643 .active_pd_names = (char*[]){
647 .proxy_pd_names = (char*[]){
653 .sysmon_name = "slpi",
657 static const struct adsp_data sm8250_slpi_resource = {
658 .crash_reason_smem = 424,
659 .firmware_name = "slpi.mdt",
661 .has_aggre2_clk = false,
663 .active_pd_names = (char*[]){
667 .proxy_pd_names = (char*[]){
673 .sysmon_name = "slpi",
677 static const struct adsp_data msm8998_slpi_resource = {
678 .crash_reason_smem = 424,
679 .firmware_name = "slpi.mdt",
681 .has_aggre2_clk = true,
683 .proxy_pd_names = (char*[]){
688 .sysmon_name = "slpi",
692 static const struct adsp_data wcss_resource_init = {
693 .crash_reason_smem = 421,
694 .firmware_name = "wcnss.mdt",
698 .sysmon_name = "wcnss",
702 static const struct of_device_id adsp_of_match[] = {
703 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
704 { .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init},
705 { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
706 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8998_adsp_resource},
707 { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8998_slpi_resource},
708 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
709 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
710 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
711 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
712 { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init},
713 { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init},
714 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
715 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
716 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
717 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
718 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
719 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
720 { .compatible = "qcom,sm8250-slpi-pas", .data = &sm8250_slpi_resource},
723 MODULE_DEVICE_TABLE(of, adsp_of_match);
725 static struct platform_driver adsp_driver = {
727 .remove = adsp_remove,
729 .name = "qcom_q6v5_pas",
730 .of_match_table = adsp_of_match,
734 module_platform_driver(adsp_driver);
735 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
736 MODULE_LICENSE("GPL v2");