1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/firmware.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/of_address.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/pm_domain.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/qcom_scm.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/remoteproc.h>
24 #include <linux/soc/qcom/mdt_loader.h>
25 #include <linux/soc/qcom/smem.h>
26 #include <linux/soc/qcom/smem_state.h>
28 #include "qcom_common.h"
29 #include "qcom_pil_info.h"
30 #include "qcom_q6v5.h"
31 #include "remoteproc_internal.h"
33 #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100
36 int crash_reason_smem;
37 const char *firmware_name;
39 unsigned int minidump_id;
42 bool decrypt_shutdown;
44 char **proxy_pd_names;
46 const char *load_state;
48 const char *sysmon_name;
56 struct qcom_q6v5 q6v5;
59 struct clk *aggre2_clk;
61 struct regulator *cx_supply;
62 struct regulator *px_supply;
64 struct device *proxy_pds[3];
69 unsigned int minidump_id;
70 int crash_reason_smem;
72 bool decrypt_shutdown;
73 const char *info_name;
75 struct completion start_done;
76 struct completion stop_done;
79 phys_addr_t mem_reloc;
83 struct qcom_rproc_glink glink_subdev;
84 struct qcom_rproc_subdev smd_subdev;
85 struct qcom_rproc_ssr ssr_subdev;
86 struct qcom_sysmon *sysmon;
88 struct qcom_scm_pas_metadata pas_metadata;
91 static void adsp_minidump(struct rproc *rproc)
93 struct qcom_adsp *adsp = rproc->priv;
95 if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
98 qcom_minidump(rproc, adsp->minidump_id);
101 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
107 for (i = 0; i < pd_count; i++) {
108 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
109 ret = pm_runtime_get_sync(pds[i]);
111 pm_runtime_put_noidle(pds[i]);
112 dev_pm_genpd_set_performance_state(pds[i], 0);
113 goto unroll_pd_votes;
120 for (i--; i >= 0; i--) {
121 dev_pm_genpd_set_performance_state(pds[i], 0);
122 pm_runtime_put(pds[i]);
128 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
133 for (i = 0; i < pd_count; i++) {
134 dev_pm_genpd_set_performance_state(pds[i], 0);
135 pm_runtime_put(pds[i]);
139 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
141 unsigned int retry_num = 50;
145 msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS);
146 ret = qcom_scm_pas_shutdown(adsp->pas_id);
147 } while (ret == -EINVAL && --retry_num);
152 static int adsp_unprepare(struct rproc *rproc)
154 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
157 * adsp_load() did pass pas_metadata to the SCM driver for storing
158 * metadata context. It might have been released already if
159 * auth_and_reset() was successful, but in other cases clean it up
162 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
167 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
169 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
172 ret = qcom_mdt_pas_init(adsp->dev, fw, rproc->firmware, adsp->pas_id,
173 adsp->mem_phys, &adsp->pas_metadata);
177 ret = qcom_mdt_load_no_init(adsp->dev, fw, rproc->firmware, adsp->pas_id,
178 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
183 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
188 static int adsp_start(struct rproc *rproc)
190 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
193 ret = qcom_q6v5_prepare(&adsp->q6v5);
197 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
201 ret = clk_prepare_enable(adsp->xo);
203 goto disable_proxy_pds;
205 ret = clk_prepare_enable(adsp->aggre2_clk);
209 if (adsp->cx_supply) {
210 ret = regulator_enable(adsp->cx_supply);
212 goto disable_aggre2_clk;
215 if (adsp->px_supply) {
216 ret = regulator_enable(adsp->px_supply);
218 goto disable_cx_supply;
221 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
224 "failed to authenticate image and release reset\n");
225 goto disable_px_supply;
228 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
229 if (ret == -ETIMEDOUT) {
230 dev_err(adsp->dev, "start timed out\n");
231 qcom_scm_pas_shutdown(adsp->pas_id);
232 goto disable_px_supply;
235 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
241 regulator_disable(adsp->px_supply);
244 regulator_disable(adsp->cx_supply);
246 clk_disable_unprepare(adsp->aggre2_clk);
248 clk_disable_unprepare(adsp->xo);
250 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
252 qcom_q6v5_unprepare(&adsp->q6v5);
257 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
259 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
262 regulator_disable(adsp->px_supply);
264 regulator_disable(adsp->cx_supply);
265 clk_disable_unprepare(adsp->aggre2_clk);
266 clk_disable_unprepare(adsp->xo);
267 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
270 static int adsp_stop(struct rproc *rproc)
272 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
276 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
277 if (ret == -ETIMEDOUT)
278 dev_err(adsp->dev, "timed out on wait\n");
280 ret = qcom_scm_pas_shutdown(adsp->pas_id);
281 if (ret && adsp->decrypt_shutdown)
282 ret = adsp_shutdown_poll_decrypt(adsp);
285 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
287 handover = qcom_q6v5_unprepare(&adsp->q6v5);
289 qcom_pas_handover(&adsp->q6v5);
294 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
296 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
299 offset = da - adsp->mem_reloc;
300 if (offset < 0 || offset + len > adsp->mem_size)
306 return adsp->mem_region + offset;
309 static unsigned long adsp_panic(struct rproc *rproc)
311 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
313 return qcom_q6v5_panic(&adsp->q6v5);
316 static const struct rproc_ops adsp_ops = {
317 .unprepare = adsp_unprepare,
320 .da_to_va = adsp_da_to_va,
321 .parse_fw = qcom_register_dump_segments,
326 static const struct rproc_ops adsp_minidump_ops = {
327 .unprepare = adsp_unprepare,
330 .da_to_va = adsp_da_to_va,
333 .coredump = adsp_minidump,
336 static int adsp_init_clock(struct qcom_adsp *adsp)
340 adsp->xo = devm_clk_get(adsp->dev, "xo");
341 if (IS_ERR(adsp->xo)) {
342 ret = PTR_ERR(adsp->xo);
343 if (ret != -EPROBE_DEFER)
344 dev_err(adsp->dev, "failed to get xo clock");
348 if (adsp->has_aggre2_clk) {
349 adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
350 if (IS_ERR(adsp->aggre2_clk)) {
351 ret = PTR_ERR(adsp->aggre2_clk);
352 if (ret != -EPROBE_DEFER)
354 "failed to get aggre2 clock");
362 static int adsp_init_regulator(struct qcom_adsp *adsp)
364 adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
365 if (IS_ERR(adsp->cx_supply)) {
366 if (PTR_ERR(adsp->cx_supply) == -ENODEV)
367 adsp->cx_supply = NULL;
369 return PTR_ERR(adsp->cx_supply);
373 regulator_set_load(adsp->cx_supply, 100000);
375 adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
376 if (IS_ERR(adsp->px_supply)) {
377 if (PTR_ERR(adsp->px_supply) == -ENODEV)
378 adsp->px_supply = NULL;
380 return PTR_ERR(adsp->px_supply);
386 static int adsp_pds_attach(struct device *dev, struct device **devs,
396 /* Handle single power domain */
397 if (dev->pm_domain) {
399 pm_runtime_enable(dev);
403 while (pd_names[num_pds])
406 for (i = 0; i < num_pds; i++) {
407 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
408 if (IS_ERR_OR_NULL(devs[i])) {
409 ret = PTR_ERR(devs[i]) ? : -ENODATA;
417 for (i--; i >= 0; i--)
418 dev_pm_domain_detach(devs[i], false);
423 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
426 struct device *dev = adsp->dev;
429 /* Handle single power domain */
430 if (dev->pm_domain && pd_count) {
431 pm_runtime_disable(dev);
435 for (i = 0; i < pd_count; i++)
436 dev_pm_domain_detach(pds[i], false);
439 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
441 struct device_node *node;
445 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
447 dev_err(adsp->dev, "no memory-region specified\n");
451 ret = of_address_to_resource(node, 0, &r);
455 adsp->mem_phys = adsp->mem_reloc = r.start;
456 adsp->mem_size = resource_size(&r);
457 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
458 if (!adsp->mem_region) {
459 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
460 &r.start, adsp->mem_size);
467 static int adsp_probe(struct platform_device *pdev)
469 const struct adsp_data *desc;
470 struct qcom_adsp *adsp;
473 const struct rproc_ops *ops = &adsp_ops;
476 desc = of_device_get_match_data(&pdev->dev);
480 if (!qcom_scm_is_available())
481 return -EPROBE_DEFER;
483 fw_name = desc->firmware_name;
484 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
486 if (ret < 0 && ret != -EINVAL)
489 if (desc->minidump_id)
490 ops = &adsp_minidump_ops;
492 rproc = rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
495 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
499 rproc->auto_boot = desc->auto_boot;
500 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
502 adsp = (struct qcom_adsp *)rproc->priv;
503 adsp->dev = &pdev->dev;
505 adsp->minidump_id = desc->minidump_id;
506 adsp->pas_id = desc->pas_id;
507 adsp->has_aggre2_clk = desc->has_aggre2_clk;
508 adsp->info_name = desc->sysmon_name;
509 adsp->decrypt_shutdown = desc->decrypt_shutdown;
510 platform_set_drvdata(pdev, adsp);
512 ret = device_init_wakeup(adsp->dev, true);
516 ret = adsp_alloc_memory_region(adsp);
520 ret = adsp_init_clock(adsp);
524 ret = adsp_init_regulator(adsp);
528 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
529 desc->proxy_pd_names);
532 adsp->proxy_pd_count = ret;
534 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
537 goto detach_proxy_pds;
539 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
540 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
541 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
542 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
545 if (IS_ERR(adsp->sysmon)) {
546 ret = PTR_ERR(adsp->sysmon);
547 goto detach_proxy_pds;
550 ret = rproc_add(rproc);
552 goto detach_proxy_pds;
557 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
559 device_init_wakeup(adsp->dev, false);
565 static int adsp_remove(struct platform_device *pdev)
567 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
569 rproc_del(adsp->rproc);
571 qcom_q6v5_deinit(&adsp->q6v5);
572 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
573 qcom_remove_sysmon_subdev(adsp->sysmon);
574 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
575 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
576 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
577 device_init_wakeup(adsp->dev, false);
578 rproc_free(adsp->rproc);
583 static const struct adsp_data adsp_resource_init = {
584 .crash_reason_smem = 423,
585 .firmware_name = "adsp.mdt",
587 .has_aggre2_clk = false,
590 .sysmon_name = "adsp",
594 static const struct adsp_data sdm845_adsp_resource_init = {
595 .crash_reason_smem = 423,
596 .firmware_name = "adsp.mdt",
598 .has_aggre2_clk = false,
600 .load_state = "adsp",
602 .sysmon_name = "adsp",
606 static const struct adsp_data sm6350_adsp_resource = {
607 .crash_reason_smem = 423,
608 .firmware_name = "adsp.mdt",
610 .has_aggre2_clk = false,
612 .proxy_pd_names = (char*[]){
617 .load_state = "adsp",
619 .sysmon_name = "adsp",
623 static const struct adsp_data sm8150_adsp_resource = {
624 .crash_reason_smem = 423,
625 .firmware_name = "adsp.mdt",
627 .has_aggre2_clk = false,
629 .proxy_pd_names = (char*[]){
633 .load_state = "adsp",
635 .sysmon_name = "adsp",
639 static const struct adsp_data sm8250_adsp_resource = {
640 .crash_reason_smem = 423,
641 .firmware_name = "adsp.mdt",
643 .has_aggre2_clk = false,
645 .proxy_pd_names = (char*[]){
650 .load_state = "adsp",
652 .sysmon_name = "adsp",
656 static const struct adsp_data sm8350_adsp_resource = {
657 .crash_reason_smem = 423,
658 .firmware_name = "adsp.mdt",
660 .has_aggre2_clk = false,
662 .proxy_pd_names = (char*[]){
667 .load_state = "adsp",
669 .sysmon_name = "adsp",
673 static const struct adsp_data msm8996_adsp_resource = {
674 .crash_reason_smem = 423,
675 .firmware_name = "adsp.mdt",
677 .has_aggre2_clk = false,
679 .proxy_pd_names = (char*[]){
684 .sysmon_name = "adsp",
688 static const struct adsp_data cdsp_resource_init = {
689 .crash_reason_smem = 601,
690 .firmware_name = "cdsp.mdt",
692 .has_aggre2_clk = false,
695 .sysmon_name = "cdsp",
699 static const struct adsp_data sdm845_cdsp_resource_init = {
700 .crash_reason_smem = 601,
701 .firmware_name = "cdsp.mdt",
703 .has_aggre2_clk = false,
705 .load_state = "cdsp",
707 .sysmon_name = "cdsp",
711 static const struct adsp_data sm6350_cdsp_resource = {
712 .crash_reason_smem = 601,
713 .firmware_name = "cdsp.mdt",
715 .has_aggre2_clk = false,
717 .proxy_pd_names = (char*[]){
722 .load_state = "cdsp",
724 .sysmon_name = "cdsp",
728 static const struct adsp_data sm8150_cdsp_resource = {
729 .crash_reason_smem = 601,
730 .firmware_name = "cdsp.mdt",
732 .has_aggre2_clk = false,
734 .proxy_pd_names = (char*[]){
738 .load_state = "cdsp",
740 .sysmon_name = "cdsp",
744 static const struct adsp_data sm8250_cdsp_resource = {
745 .crash_reason_smem = 601,
746 .firmware_name = "cdsp.mdt",
748 .has_aggre2_clk = false,
750 .proxy_pd_names = (char*[]){
754 .load_state = "cdsp",
756 .sysmon_name = "cdsp",
760 static const struct adsp_data sc8280xp_nsp0_resource = {
761 .crash_reason_smem = 601,
762 .firmware_name = "cdsp.mdt",
764 .has_aggre2_clk = false,
766 .proxy_pd_names = (char*[]){
771 .sysmon_name = "cdsp",
775 static const struct adsp_data sc8280xp_nsp1_resource = {
776 .crash_reason_smem = 633,
777 .firmware_name = "cdsp.mdt",
779 .has_aggre2_clk = false,
781 .proxy_pd_names = (char*[]){
786 .sysmon_name = "cdsp1",
790 static const struct adsp_data sm8350_cdsp_resource = {
791 .crash_reason_smem = 601,
792 .firmware_name = "cdsp.mdt",
794 .has_aggre2_clk = false,
796 .proxy_pd_names = (char*[]){
801 .load_state = "cdsp",
803 .sysmon_name = "cdsp",
807 static const struct adsp_data mpss_resource_init = {
808 .crash_reason_smem = 421,
809 .firmware_name = "modem.mdt",
812 .has_aggre2_clk = false,
814 .proxy_pd_names = (char*[]){
819 .load_state = "modem",
821 .sysmon_name = "modem",
825 static const struct adsp_data sc8180x_mpss_resource = {
826 .crash_reason_smem = 421,
827 .firmware_name = "modem.mdt",
829 .has_aggre2_clk = false,
831 .proxy_pd_names = (char*[]){
835 .load_state = "modem",
837 .sysmon_name = "modem",
841 static const struct adsp_data slpi_resource_init = {
842 .crash_reason_smem = 424,
843 .firmware_name = "slpi.mdt",
845 .has_aggre2_clk = true,
847 .proxy_pd_names = (char*[]){
852 .sysmon_name = "slpi",
856 static const struct adsp_data sm8150_slpi_resource = {
857 .crash_reason_smem = 424,
858 .firmware_name = "slpi.mdt",
860 .has_aggre2_clk = false,
862 .proxy_pd_names = (char*[]){
867 .load_state = "slpi",
869 .sysmon_name = "slpi",
873 static const struct adsp_data sm8250_slpi_resource = {
874 .crash_reason_smem = 424,
875 .firmware_name = "slpi.mdt",
877 .has_aggre2_clk = false,
879 .proxy_pd_names = (char*[]){
884 .load_state = "slpi",
886 .sysmon_name = "slpi",
890 static const struct adsp_data sm8350_slpi_resource = {
891 .crash_reason_smem = 424,
892 .firmware_name = "slpi.mdt",
894 .has_aggre2_clk = false,
896 .proxy_pd_names = (char*[]){
901 .load_state = "slpi",
903 .sysmon_name = "slpi",
907 static const struct adsp_data wcss_resource_init = {
908 .crash_reason_smem = 421,
909 .firmware_name = "wcnss.mdt",
913 .sysmon_name = "wcnss",
917 static const struct adsp_data sdx55_mpss_resource = {
918 .crash_reason_smem = 421,
919 .firmware_name = "modem.mdt",
921 .has_aggre2_clk = false,
923 .proxy_pd_names = (char*[]){
929 .sysmon_name = "modem",
933 static const struct adsp_data sm8450_mpss_resource = {
934 .crash_reason_smem = 421,
935 .firmware_name = "modem.mdt",
938 .has_aggre2_clk = false,
940 .decrypt_shutdown = true,
941 .proxy_pd_names = (char*[]){
946 .load_state = "modem",
948 .sysmon_name = "modem",
952 static const struct of_device_id adsp_of_match[] = {
953 { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
954 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
955 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
956 { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
957 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
958 { .compatible = "qcom,msm8998-slpi-pas", .data = &slpi_resource_init},
959 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
960 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
961 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
962 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
963 { .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
964 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
965 { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
966 { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
967 { .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
968 { .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource},
969 { .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource},
970 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
971 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
972 { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
973 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
974 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
975 { .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource},
976 { .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init},
977 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
978 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
979 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
980 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
981 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
982 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
983 { .compatible = "qcom,sm8250-slpi-pas", .data = &sm8250_slpi_resource},
984 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
985 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
986 { .compatible = "qcom,sm8350-slpi-pas", .data = &sm8350_slpi_resource},
987 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
988 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
989 { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
990 { .compatible = "qcom,sm8450-slpi-pas", .data = &sm8350_slpi_resource},
991 { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource},
994 MODULE_DEVICE_TABLE(of, adsp_of_match);
996 static struct platform_driver adsp_driver = {
998 .remove = adsp_remove,
1000 .name = "qcom_q6v5_pas",
1001 .of_match_table = adsp_of_match,
1005 module_platform_driver(adsp_driver);
1006 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
1007 MODULE_LICENSE("GPL v2");