1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/firmware.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_domain.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/qcom_scm.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/remoteproc.h>
23 #include <linux/soc/qcom/mdt_loader.h>
24 #include <linux/soc/qcom/smem.h>
25 #include <linux/soc/qcom/smem_state.h>
27 #include "qcom_common.h"
28 #include "qcom_q6v5.h"
29 #include "remoteproc_internal.h"
32 int crash_reason_smem;
33 const char *firmware_name;
37 char **active_pd_names;
38 char **proxy_pd_names;
41 const char *sysmon_name;
49 struct qcom_q6v5 q6v5;
52 struct clk *aggre2_clk;
54 struct regulator *cx_supply;
55 struct regulator *px_supply;
57 struct device *active_pds[1];
58 struct device *proxy_pds[3];
64 int crash_reason_smem;
67 struct completion start_done;
68 struct completion stop_done;
71 phys_addr_t mem_reloc;
75 struct qcom_rproc_glink glink_subdev;
76 struct qcom_rproc_subdev smd_subdev;
77 struct qcom_rproc_ssr ssr_subdev;
78 struct qcom_sysmon *sysmon;
81 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
87 for (i = 0; i < pd_count; i++) {
88 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
89 ret = pm_runtime_get_sync(pds[i]);
97 for (i--; i >= 0; i--) {
98 dev_pm_genpd_set_performance_state(pds[i], 0);
99 pm_runtime_put(pds[i]);
105 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
110 for (i = 0; i < pd_count; i++) {
111 dev_pm_genpd_set_performance_state(pds[i], 0);
112 pm_runtime_put(pds[i]);
116 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
118 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
120 return qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
121 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
126 static int adsp_start(struct rproc *rproc)
128 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
131 qcom_q6v5_prepare(&adsp->q6v5);
133 ret = adsp_pds_enable(adsp, adsp->active_pds, adsp->active_pd_count);
137 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
139 goto disable_active_pds;
141 ret = clk_prepare_enable(adsp->xo);
143 goto disable_proxy_pds;
145 ret = clk_prepare_enable(adsp->aggre2_clk);
149 ret = regulator_enable(adsp->cx_supply);
151 goto disable_aggre2_clk;
153 ret = regulator_enable(adsp->px_supply);
155 goto disable_cx_supply;
157 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
160 "failed to authenticate image and release reset\n");
161 goto disable_px_supply;
164 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
165 if (ret == -ETIMEDOUT) {
166 dev_err(adsp->dev, "start timed out\n");
167 qcom_scm_pas_shutdown(adsp->pas_id);
168 goto disable_px_supply;
174 regulator_disable(adsp->px_supply);
176 regulator_disable(adsp->cx_supply);
178 clk_disable_unprepare(adsp->aggre2_clk);
180 clk_disable_unprepare(adsp->xo);
182 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
184 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count);
186 qcom_q6v5_unprepare(&adsp->q6v5);
191 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
193 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
195 regulator_disable(adsp->px_supply);
196 regulator_disable(adsp->cx_supply);
197 clk_disable_unprepare(adsp->aggre2_clk);
198 clk_disable_unprepare(adsp->xo);
199 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
202 static int adsp_stop(struct rproc *rproc)
204 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
208 ret = qcom_q6v5_request_stop(&adsp->q6v5);
209 if (ret == -ETIMEDOUT)
210 dev_err(adsp->dev, "timed out on wait\n");
212 ret = qcom_scm_pas_shutdown(adsp->pas_id);
214 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
216 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count);
217 handover = qcom_q6v5_unprepare(&adsp->q6v5);
219 qcom_pas_handover(&adsp->q6v5);
224 static void *adsp_da_to_va(struct rproc *rproc, u64 da, int len)
226 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
229 offset = da - adsp->mem_reloc;
230 if (offset < 0 || offset + len > adsp->mem_size)
233 return adsp->mem_region + offset;
236 static const struct rproc_ops adsp_ops = {
239 .da_to_va = adsp_da_to_va,
240 .parse_fw = qcom_register_dump_segments,
244 static int adsp_init_clock(struct qcom_adsp *adsp)
248 adsp->xo = devm_clk_get(adsp->dev, "xo");
249 if (IS_ERR(adsp->xo)) {
250 ret = PTR_ERR(adsp->xo);
251 if (ret != -EPROBE_DEFER)
252 dev_err(adsp->dev, "failed to get xo clock");
256 if (adsp->has_aggre2_clk) {
257 adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
258 if (IS_ERR(adsp->aggre2_clk)) {
259 ret = PTR_ERR(adsp->aggre2_clk);
260 if (ret != -EPROBE_DEFER)
262 "failed to get aggre2 clock");
270 static int adsp_init_regulator(struct qcom_adsp *adsp)
272 adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
273 if (IS_ERR(adsp->cx_supply))
274 return PTR_ERR(adsp->cx_supply);
276 regulator_set_load(adsp->cx_supply, 100000);
278 adsp->px_supply = devm_regulator_get(adsp->dev, "px");
279 return PTR_ERR_OR_ZERO(adsp->px_supply);
282 static int adsp_pds_attach(struct device *dev, struct device **devs,
292 /* Handle single power domain */
293 if (dev->pm_domain) {
295 pm_runtime_enable(dev);
299 while (pd_names[num_pds])
302 for (i = 0; i < num_pds; i++) {
303 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
304 if (IS_ERR_OR_NULL(devs[i])) {
305 ret = PTR_ERR(devs[i]) ? : -ENODATA;
313 for (i--; i >= 0; i--)
314 dev_pm_domain_detach(devs[i], false);
319 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
322 struct device *dev = adsp->dev;
325 /* Handle single power domain */
326 if (dev->pm_domain && pd_count) {
327 pm_runtime_disable(dev);
331 for (i = 0; i < pd_count; i++)
332 dev_pm_domain_detach(pds[i], false);
335 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
337 struct device_node *node;
341 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
343 dev_err(adsp->dev, "no memory-region specified\n");
347 ret = of_address_to_resource(node, 0, &r);
351 adsp->mem_phys = adsp->mem_reloc = r.start;
352 adsp->mem_size = resource_size(&r);
353 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
354 if (!adsp->mem_region) {
355 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
356 &r.start, adsp->mem_size);
363 static int adsp_probe(struct platform_device *pdev)
365 const struct adsp_data *desc;
366 struct qcom_adsp *adsp;
371 desc = of_device_get_match_data(&pdev->dev);
375 if (!qcom_scm_is_available())
376 return -EPROBE_DEFER;
378 fw_name = desc->firmware_name;
379 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
381 if (ret < 0 && ret != -EINVAL)
384 rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
385 fw_name, sizeof(*adsp));
387 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
391 adsp = (struct qcom_adsp *)rproc->priv;
392 adsp->dev = &pdev->dev;
394 adsp->pas_id = desc->pas_id;
395 adsp->has_aggre2_clk = desc->has_aggre2_clk;
396 platform_set_drvdata(pdev, adsp);
398 ret = adsp_alloc_memory_region(adsp);
402 ret = adsp_init_clock(adsp);
406 ret = adsp_init_regulator(adsp);
410 ret = adsp_pds_attach(&pdev->dev, adsp->active_pds,
411 desc->active_pd_names);
414 adsp->active_pd_count = ret;
416 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
417 desc->proxy_pd_names);
419 goto detach_active_pds;
420 adsp->proxy_pd_count = ret;
422 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
425 goto detach_proxy_pds;
427 qcom_add_glink_subdev(rproc, &adsp->glink_subdev);
428 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
429 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
430 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
433 if (IS_ERR(adsp->sysmon)) {
434 ret = PTR_ERR(adsp->sysmon);
435 goto detach_proxy_pds;
438 ret = rproc_add(rproc);
440 goto detach_proxy_pds;
445 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
447 adsp_pds_detach(adsp, adsp->active_pds, adsp->active_pd_count);
454 static int adsp_remove(struct platform_device *pdev)
456 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
458 rproc_del(adsp->rproc);
460 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
461 qcom_remove_sysmon_subdev(adsp->sysmon);
462 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
463 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
464 rproc_free(adsp->rproc);
469 static const struct adsp_data adsp_resource_init = {
470 .crash_reason_smem = 423,
471 .firmware_name = "adsp.mdt",
473 .has_aggre2_clk = false,
475 .sysmon_name = "adsp",
479 static const struct adsp_data sm8150_adsp_resource = {
480 .crash_reason_smem = 423,
481 .firmware_name = "adsp.mdt",
483 .has_aggre2_clk = false,
484 .active_pd_names = (char*[]){
488 .proxy_pd_names = (char*[]){
493 .sysmon_name = "adsp",
497 static const struct adsp_data cdsp_resource_init = {
498 .crash_reason_smem = 601,
499 .firmware_name = "cdsp.mdt",
501 .has_aggre2_clk = false,
503 .sysmon_name = "cdsp",
507 static const struct adsp_data sm8150_cdsp_resource = {
508 .crash_reason_smem = 601,
509 .firmware_name = "cdsp.mdt",
511 .has_aggre2_clk = false,
512 .active_pd_names = (char*[]){
516 .proxy_pd_names = (char*[]){
521 .sysmon_name = "cdsp",
525 static const struct adsp_data mpss_resource_init = {
526 .crash_reason_smem = 421,
527 .firmware_name = "modem.mdt",
529 .has_aggre2_clk = false,
530 .active_pd_names = (char*[]){
534 .proxy_pd_names = (char*[]){
540 .sysmon_name = "modem",
544 static const struct adsp_data slpi_resource_init = {
545 .crash_reason_smem = 424,
546 .firmware_name = "slpi.mdt",
548 .has_aggre2_clk = true,
550 .sysmon_name = "slpi",
554 static const struct adsp_data sm8150_slpi_resource = {
555 .crash_reason_smem = 424,
556 .firmware_name = "slpi.mdt",
558 .has_aggre2_clk = false,
559 .active_pd_names = (char*[]){
563 .proxy_pd_names = (char*[]){
569 .sysmon_name = "slpi",
573 static const struct adsp_data wcss_resource_init = {
574 .crash_reason_smem = 421,
575 .firmware_name = "wcnss.mdt",
578 .sysmon_name = "wcnss",
582 static const struct of_device_id adsp_of_match[] = {
583 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
584 { .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init},
585 { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
586 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
587 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
588 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
589 { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init},
590 { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init},
591 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
592 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
593 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
594 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
597 MODULE_DEVICE_TABLE(of, adsp_of_match);
599 static struct platform_driver adsp_driver = {
601 .remove = adsp_remove,
603 .name = "qcom_q6v5_pas",
604 .of_match_table = adsp_of_match,
608 module_platform_driver(adsp_driver);
609 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
610 MODULE_LICENSE("GPL v2");