1 // SPDX-License-Identifier: GPL-2.0-only
3 * PRU-ICSS remoteproc driver for various TI SoCs
5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - https://www.ti.com/
8 * Suman Anna <s-anna@ti.com>
9 * Andrew F. Davis <afd@ti.com>
10 * Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> for Texas Instruments
13 #include <linux/bitops.h>
14 #include <linux/debugfs.h>
15 #include <linux/irqdomain.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/of_irq.h>
19 #include <linux/pruss_driver.h>
20 #include <linux/remoteproc.h>
22 #include "remoteproc_internal.h"
23 #include "remoteproc_elf_helpers.h"
24 #include "pru_rproc.h"
26 /* PRU_ICSS_PRU_CTRL registers */
27 #define PRU_CTRL_CTRL 0x0000
28 #define PRU_CTRL_STS 0x0004
29 #define PRU_CTRL_WAKEUP_EN 0x0008
30 #define PRU_CTRL_CYCLE 0x000C
31 #define PRU_CTRL_STALL 0x0010
32 #define PRU_CTRL_CTBIR0 0x0020
33 #define PRU_CTRL_CTBIR1 0x0024
34 #define PRU_CTRL_CTPPR0 0x0028
35 #define PRU_CTRL_CTPPR1 0x002C
37 /* CTRL register bit-fields */
38 #define CTRL_CTRL_SOFT_RST_N BIT(0)
39 #define CTRL_CTRL_EN BIT(1)
40 #define CTRL_CTRL_SLEEPING BIT(2)
41 #define CTRL_CTRL_CTR_EN BIT(3)
42 #define CTRL_CTRL_SINGLE_STEP BIT(8)
43 #define CTRL_CTRL_RUNSTATE BIT(15)
45 /* PRU_ICSS_PRU_DEBUG registers */
46 #define PRU_DEBUG_GPREG(x) (0x0000 + (x) * 4)
47 #define PRU_DEBUG_CT_REG(x) (0x0080 + (x) * 4)
49 /* PRU/RTU/Tx_PRU Core IRAM address masks */
50 #define PRU_IRAM_ADDR_MASK 0x3ffff
51 #define PRU0_IRAM_ADDR_MASK 0x34000
52 #define PRU1_IRAM_ADDR_MASK 0x38000
53 #define RTU0_IRAM_ADDR_MASK 0x4000
54 #define RTU1_IRAM_ADDR_MASK 0x6000
55 #define TX_PRU0_IRAM_ADDR_MASK 0xa000
56 #define TX_PRU1_IRAM_ADDR_MASK 0xc000
58 /* PRU device addresses for various type of PRU RAMs */
59 #define PRU_IRAM_DA 0 /* Instruction RAM */
60 #define PRU_PDRAM_DA 0 /* Primary Data RAM */
61 #define PRU_SDRAM_DA 0x2000 /* Secondary Data RAM */
62 #define PRU_SHRDRAM_DA 0x10000 /* Shared Data RAM */
64 #define MAX_PRU_SYS_EVENTS 160
67 * enum pru_iomem - PRU core memory/register range identifiers
69 * @PRU_IOMEM_IRAM: PRU Instruction RAM range
70 * @PRU_IOMEM_CTRL: PRU Control register range
71 * @PRU_IOMEM_DEBUG: PRU Debug register range
72 * @PRU_IOMEM_MAX: just keep this one at the end
82 * enum pru_type - PRU core type identifier
84 * @PRU_TYPE_PRU: Programmable Real-time Unit
85 * @PRU_TYPE_RTU: Auxiliary Programmable Real-Time Unit
86 * @PRU_TYPE_TX_PRU: Transmit Programmable Real-Time Unit
87 * @PRU_TYPE_MAX: just keep this one at the end
97 * struct pru_private_data - device data for a PRU core
98 * @type: type of the PRU core (PRU, RTU, Tx_PRU)
99 * @is_k3: flag used to identify the need for special load handling
101 struct pru_private_data {
103 unsigned int is_k3 : 1;
107 * struct pru_rproc - PRU remoteproc structure
108 * @id: id of the PRU core within the PRUSS
109 * @dev: PRU core device pointer
110 * @pruss: back-reference to parent PRUSS structure
111 * @rproc: remoteproc pointer for this PRU core
112 * @data: PRU core specific data
113 * @mem_regions: data for each of the PRU memory regions
114 * @fw_name: name of firmware image used during loading
115 * @mapped_irq: virtual interrupt numbers of created fw specific mapping
116 * @pru_interrupt_map: pointer to interrupt mapping description (firmware)
117 * @pru_interrupt_map_sz: pru_interrupt_map size
118 * @dbg_single_step: debug state variable to set PRU into single step mode
119 * @dbg_continuous: debug state variable to restore PRU execution mode
120 * @evt_count: number of mapped events
127 const struct pru_private_data *data;
128 struct pruss_mem_region mem_regions[PRU_IOMEM_MAX];
130 unsigned int *mapped_irq;
131 struct pru_irq_rsc *pru_interrupt_map;
132 size_t pru_interrupt_map_sz;
138 static inline u32 pru_control_read_reg(struct pru_rproc *pru, unsigned int reg)
140 return readl_relaxed(pru->mem_regions[PRU_IOMEM_CTRL].va + reg);
144 void pru_control_write_reg(struct pru_rproc *pru, unsigned int reg, u32 val)
146 writel_relaxed(val, pru->mem_regions[PRU_IOMEM_CTRL].va + reg);
149 static inline u32 pru_debug_read_reg(struct pru_rproc *pru, unsigned int reg)
151 return readl_relaxed(pru->mem_regions[PRU_IOMEM_DEBUG].va + reg);
154 static int regs_show(struct seq_file *s, void *data)
156 struct rproc *rproc = s->private;
157 struct pru_rproc *pru = rproc->priv;
162 seq_puts(s, "============== Control Registers ==============\n");
163 seq_printf(s, "CTRL := 0x%08x\n",
164 pru_control_read_reg(pru, PRU_CTRL_CTRL));
165 pru_sts = pru_control_read_reg(pru, PRU_CTRL_STS);
166 seq_printf(s, "STS (PC) := 0x%08x (0x%08x)\n", pru_sts, pru_sts << 2);
167 seq_printf(s, "WAKEUP_EN := 0x%08x\n",
168 pru_control_read_reg(pru, PRU_CTRL_WAKEUP_EN));
169 seq_printf(s, "CYCLE := 0x%08x\n",
170 pru_control_read_reg(pru, PRU_CTRL_CYCLE));
171 seq_printf(s, "STALL := 0x%08x\n",
172 pru_control_read_reg(pru, PRU_CTRL_STALL));
173 seq_printf(s, "CTBIR0 := 0x%08x\n",
174 pru_control_read_reg(pru, PRU_CTRL_CTBIR0));
175 seq_printf(s, "CTBIR1 := 0x%08x\n",
176 pru_control_read_reg(pru, PRU_CTRL_CTBIR1));
177 seq_printf(s, "CTPPR0 := 0x%08x\n",
178 pru_control_read_reg(pru, PRU_CTRL_CTPPR0));
179 seq_printf(s, "CTPPR1 := 0x%08x\n",
180 pru_control_read_reg(pru, PRU_CTRL_CTPPR1));
182 seq_puts(s, "=============== Debug Registers ===============\n");
183 pru_is_running = pru_control_read_reg(pru, PRU_CTRL_CTRL) &
185 if (pru_is_running) {
186 seq_puts(s, "PRU is executing, cannot print/access debug registers.\n");
190 for (i = 0; i < nregs; i++) {
191 seq_printf(s, "GPREG%-2d := 0x%08x\tCT_REG%-2d := 0x%08x\n",
192 i, pru_debug_read_reg(pru, PRU_DEBUG_GPREG(i)),
193 i, pru_debug_read_reg(pru, PRU_DEBUG_CT_REG(i)));
198 DEFINE_SHOW_ATTRIBUTE(regs);
201 * Control PRU single-step mode
203 * This is a debug helper function used for controlling the single-step
204 * mode of the PRU. The PRU Debug registers are not accessible when the
205 * PRU is in RUNNING state.
207 * Writing a non-zero value sets the PRU into single-step mode irrespective
208 * of its previous state. The PRU mode is saved only on the first set into
209 * a single-step mode. Writing a zero value will restore the PRU into its
212 static int pru_rproc_debug_ss_set(void *data, u64 val)
214 struct rproc *rproc = data;
215 struct pru_rproc *pru = rproc->priv;
219 if (!val && !pru->dbg_single_step)
222 reg_val = pru_control_read_reg(pru, PRU_CTRL_CTRL);
224 if (val && !pru->dbg_single_step)
225 pru->dbg_continuous = reg_val;
228 reg_val |= CTRL_CTRL_SINGLE_STEP | CTRL_CTRL_EN;
230 reg_val = pru->dbg_continuous;
232 pru->dbg_single_step = val;
233 pru_control_write_reg(pru, PRU_CTRL_CTRL, reg_val);
238 static int pru_rproc_debug_ss_get(void *data, u64 *val)
240 struct rproc *rproc = data;
241 struct pru_rproc *pru = rproc->priv;
243 *val = pru->dbg_single_step;
247 DEFINE_SIMPLE_ATTRIBUTE(pru_rproc_debug_ss_fops, pru_rproc_debug_ss_get,
248 pru_rproc_debug_ss_set, "%llu\n");
251 * Create PRU-specific debugfs entries
253 * The entries are created only if the parent remoteproc debugfs directory
254 * exists, and will be cleaned up by the remoteproc core.
256 static void pru_rproc_create_debug_entries(struct rproc *rproc)
261 debugfs_create_file("regs", 0400, rproc->dbg_dir,
263 debugfs_create_file("single_step", 0600, rproc->dbg_dir,
264 rproc, &pru_rproc_debug_ss_fops);
267 static void pru_dispose_irq_mapping(struct pru_rproc *pru)
269 while (pru->evt_count--) {
270 if (pru->mapped_irq[pru->evt_count] > 0)
271 irq_dispose_mapping(pru->mapped_irq[pru->evt_count]);
274 kfree(pru->mapped_irq);
278 * Parse the custom PRU interrupt map resource and configure the INTC
281 static int pru_handle_intrmap(struct rproc *rproc)
283 struct device *dev = rproc->dev.parent;
284 struct pru_rproc *pru = rproc->priv;
285 struct pru_irq_rsc *rsc = pru->pru_interrupt_map;
286 struct irq_fwspec fwspec;
287 struct device_node *irq_parent;
290 /* not having pru_interrupt_map is not an error */
294 /* currently supporting only type 0 */
295 if (rsc->type != 0) {
296 dev_err(dev, "unsupported rsc type: %d\n", rsc->type);
300 if (rsc->num_evts > MAX_PRU_SYS_EVENTS)
303 if (sizeof(*rsc) + rsc->num_evts * sizeof(struct pruss_int_map) !=
304 pru->pru_interrupt_map_sz)
307 pru->evt_count = rsc->num_evts;
308 pru->mapped_irq = kcalloc(pru->evt_count, sizeof(unsigned int),
310 if (!pru->mapped_irq)
314 * parse and fill in system event to interrupt channel and
315 * channel-to-host mapping
317 irq_parent = of_irq_find_parent(pru->dev->of_node);
319 kfree(pru->mapped_irq);
323 fwspec.fwnode = of_node_to_fwnode(irq_parent);
324 fwspec.param_count = 3;
325 for (i = 0; i < pru->evt_count; i++) {
326 fwspec.param[0] = rsc->pru_intc_map[i].event;
327 fwspec.param[1] = rsc->pru_intc_map[i].chnl;
328 fwspec.param[2] = rsc->pru_intc_map[i].host;
330 dev_dbg(dev, "mapping%d: event %d, chnl %d, host %d\n",
331 i, fwspec.param[0], fwspec.param[1], fwspec.param[2]);
333 pru->mapped_irq[i] = irq_create_fwspec_mapping(&fwspec);
334 if (!pru->mapped_irq[i]) {
335 dev_err(dev, "failed to get virq\n");
336 ret = pru->mapped_irq[i];
344 pru_dispose_irq_mapping(pru);
349 static int pru_rproc_start(struct rproc *rproc)
351 struct device *dev = &rproc->dev;
352 struct pru_rproc *pru = rproc->priv;
353 const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" };
357 dev_dbg(dev, "starting %s%d: entry-point = 0x%llx\n",
358 names[pru->data->type], pru->id, (rproc->bootaddr >> 2));
360 ret = pru_handle_intrmap(rproc);
362 * reset references to pru interrupt map - they will stop being valid
363 * after rproc_start returns
365 pru->pru_interrupt_map = NULL;
366 pru->pru_interrupt_map_sz = 0;
370 val = CTRL_CTRL_EN | ((rproc->bootaddr >> 2) << 16);
371 pru_control_write_reg(pru, PRU_CTRL_CTRL, val);
376 static int pru_rproc_stop(struct rproc *rproc)
378 struct device *dev = &rproc->dev;
379 struct pru_rproc *pru = rproc->priv;
380 const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" };
383 dev_dbg(dev, "stopping %s%d\n", names[pru->data->type], pru->id);
385 val = pru_control_read_reg(pru, PRU_CTRL_CTRL);
386 val &= ~CTRL_CTRL_EN;
387 pru_control_write_reg(pru, PRU_CTRL_CTRL, val);
389 /* dispose irq mapping - new firmware can provide new mapping */
391 pru_dispose_irq_mapping(pru);
397 * Convert PRU device address (data spaces only) to kernel virtual address.
399 * Each PRU has access to all data memories within the PRUSS, accessible at
400 * different ranges. So, look through both its primary and secondary Data
401 * RAMs as well as any shared Data RAM to convert a PRU device address to
402 * kernel virtual address. Data RAM0 is primary Data RAM for PRU0 and Data
403 * RAM1 is primary Data RAM for PRU1.
405 static void *pru_d_da_to_va(struct pru_rproc *pru, u32 da, size_t len)
407 struct pruss_mem_region dram0, dram1, shrd_ram;
408 struct pruss *pruss = pru->pruss;
415 dram0 = pruss->mem_regions[PRUSS_MEM_DRAM0];
416 dram1 = pruss->mem_regions[PRUSS_MEM_DRAM1];
417 /* PRU1 has its local RAM addresses reversed */
420 shrd_ram = pruss->mem_regions[PRUSS_MEM_SHRD_RAM2];
422 if (da >= PRU_PDRAM_DA && da + len <= PRU_PDRAM_DA + dram0.size) {
423 offset = da - PRU_PDRAM_DA;
424 va = (__force void *)(dram0.va + offset);
425 } else if (da >= PRU_SDRAM_DA &&
426 da + len <= PRU_SDRAM_DA + dram1.size) {
427 offset = da - PRU_SDRAM_DA;
428 va = (__force void *)(dram1.va + offset);
429 } else if (da >= PRU_SHRDRAM_DA &&
430 da + len <= PRU_SHRDRAM_DA + shrd_ram.size) {
431 offset = da - PRU_SHRDRAM_DA;
432 va = (__force void *)(shrd_ram.va + offset);
439 * Convert PRU device address (instruction space) to kernel virtual address.
441 * A PRU does not have an unified address space. Each PRU has its very own
442 * private Instruction RAM, and its device address is identical to that of
443 * its primary Data RAM device address.
445 static void *pru_i_da_to_va(struct pru_rproc *pru, u32 da, size_t len)
453 if (da >= PRU_IRAM_DA &&
454 da + len <= PRU_IRAM_DA + pru->mem_regions[PRU_IOMEM_IRAM].size) {
455 offset = da - PRU_IRAM_DA;
456 va = (__force void *)(pru->mem_regions[PRU_IOMEM_IRAM].va +
464 * Provide address translations for only PRU Data RAMs through the remoteproc
465 * core for any PRU client drivers. The PRU Instruction RAM access is restricted
466 * only to the PRU loader code.
468 static void *pru_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len)
470 struct pru_rproc *pru = rproc->priv;
472 return pru_d_da_to_va(pru, da, len);
475 /* PRU-specific address translator used by PRU loader. */
476 static void *pru_da_to_va(struct rproc *rproc, u64 da, size_t len, bool is_iram)
478 struct pru_rproc *pru = rproc->priv;
482 va = pru_i_da_to_va(pru, da, len);
484 va = pru_d_da_to_va(pru, da, len);
489 static struct rproc_ops pru_rproc_ops = {
490 .start = pru_rproc_start,
491 .stop = pru_rproc_stop,
492 .da_to_va = pru_rproc_da_to_va,
496 * Custom memory copy implementation for ICSSG PRU/RTU/Tx_PRU Cores
498 * The ICSSG PRU/RTU/Tx_PRU cores have a memory copying issue with IRAM
499 * memories, that is not seen on previous generation SoCs. The data is reflected
500 * properly in the IRAM memories only for integer (4-byte) copies. Any unaligned
501 * copies result in all the other pre-existing bytes zeroed out within that
502 * 4-byte boundary, thereby resulting in wrong text/code in the IRAMs. Also, the
503 * IRAM memory port interface does not allow any 8-byte copies (as commonly used
504 * by ARM64 memcpy implementation) and throws an exception. The DRAM memory
505 * ports do not show this behavior.
507 static int pru_rproc_memcpy(void *dest, const void *src, size_t count)
511 size_t size = count / 4;
515 * TODO: relax limitation of 4-byte aligned dest addresses and copy
518 if ((long)dest % 4 || count % 4)
521 /* src offsets in ELF firmware image can be non-aligned */
523 tmp_src = kmemdup(src, count, GFP_KERNEL);
538 pru_rproc_load_elf_segments(struct rproc *rproc, const struct firmware *fw)
540 struct pru_rproc *pru = rproc->priv;
541 struct device *dev = &rproc->dev;
542 struct elf32_hdr *ehdr;
543 struct elf32_phdr *phdr;
545 const u8 *elf_data = fw->data;
547 ehdr = (struct elf32_hdr *)elf_data;
548 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff);
550 /* go through the available ELF segments */
551 for (i = 0; i < ehdr->e_phnum; i++, phdr++) {
552 u32 da = phdr->p_paddr;
553 u32 memsz = phdr->p_memsz;
554 u32 filesz = phdr->p_filesz;
555 u32 offset = phdr->p_offset;
559 if (phdr->p_type != PT_LOAD || !filesz)
562 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n",
563 phdr->p_type, da, memsz, filesz);
565 if (filesz > memsz) {
566 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n",
572 if (offset + filesz > fw->size) {
573 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n",
574 offset + filesz, fw->size);
579 /* grab the kernel address for this device address */
580 is_iram = phdr->p_flags & PF_X;
581 ptr = pru_da_to_va(rproc, da, memsz, is_iram);
583 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz);
588 if (pru->data->is_k3 && is_iram) {
589 ret = pru_rproc_memcpy(ptr, elf_data + phdr->p_offset,
592 dev_err(dev, "PRU memory copy failed for da 0x%x memsz 0x%x\n",
597 memcpy(ptr, elf_data + phdr->p_offset, filesz);
600 /* skip the memzero logic performed by remoteproc ELF loader */
607 pru_rproc_find_interrupt_map(struct device *dev, const struct firmware *fw)
609 struct elf32_shdr *shdr, *name_table_shdr;
610 const char *name_table;
611 const u8 *elf_data = fw->data;
612 struct elf32_hdr *ehdr = (struct elf32_hdr *)elf_data;
613 u16 shnum = ehdr->e_shnum;
614 u16 shstrndx = ehdr->e_shstrndx;
617 /* first, get the section header */
618 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff);
619 /* compute name table section header entry in shdr array */
620 name_table_shdr = shdr + shstrndx;
621 /* finally, compute the name table section address in elf */
622 name_table = elf_data + name_table_shdr->sh_offset;
624 for (i = 0; i < shnum; i++, shdr++) {
625 u32 size = shdr->sh_size;
626 u32 offset = shdr->sh_offset;
627 u32 name = shdr->sh_name;
629 if (strcmp(name_table + name, ".pru_irq_map"))
632 /* make sure we have the entire irq map */
633 if (offset + size > fw->size || offset + size < size) {
634 dev_err(dev, ".pru_irq_map section truncated\n");
635 return ERR_PTR(-EINVAL);
638 /* make sure irq map has at least the header */
639 if (sizeof(struct pru_irq_rsc) > size) {
640 dev_err(dev, "header-less .pru_irq_map section\n");
641 return ERR_PTR(-EINVAL);
647 dev_dbg(dev, "no .pru_irq_map section found for this fw\n");
653 * Use a custom parse_fw callback function for dealing with PRU firmware
656 * The firmware blob can contain optional ELF sections: .resource_table section
657 * and .pru_irq_map one. The second one contains the PRUSS interrupt mapping
658 * description, which needs to be setup before powering on the PRU core. To
659 * avoid RAM wastage this ELF section is not mapped to any ELF segment (by the
660 * firmware linker) and therefore is not loaded to PRU memory.
662 static int pru_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
664 struct device *dev = &rproc->dev;
665 struct pru_rproc *pru = rproc->priv;
666 const u8 *elf_data = fw->data;
668 u8 class = fw_elf_get_class(fw);
672 /* load optional rsc table */
673 ret = rproc_elf_load_rsc_table(rproc, fw);
675 dev_dbg(&rproc->dev, "no resource table found for this fw\n");
679 /* find .pru_interrupt_map section, not having it is not an error */
680 shdr = pru_rproc_find_interrupt_map(dev, fw);
682 return PTR_ERR(shdr);
687 /* preserve pointer to PRU interrupt map together with it size */
688 sh_offset = elf_shdr_get_sh_offset(class, shdr);
689 pru->pru_interrupt_map = (struct pru_irq_rsc *)(elf_data + sh_offset);
690 pru->pru_interrupt_map_sz = elf_shdr_get_sh_size(class, shdr);
696 * Compute PRU id based on the IRAM addresses. The PRU IRAMs are
697 * always at a particular offset within the PRUSS address space.
699 static int pru_rproc_set_id(struct pru_rproc *pru)
703 switch (pru->mem_regions[PRU_IOMEM_IRAM].pa & PRU_IRAM_ADDR_MASK) {
704 case TX_PRU0_IRAM_ADDR_MASK:
706 case RTU0_IRAM_ADDR_MASK:
708 case PRU0_IRAM_ADDR_MASK:
711 case TX_PRU1_IRAM_ADDR_MASK:
713 case RTU1_IRAM_ADDR_MASK:
715 case PRU1_IRAM_ADDR_MASK:
725 static int pru_rproc_probe(struct platform_device *pdev)
727 struct device *dev = &pdev->dev;
728 struct device_node *np = dev->of_node;
729 struct platform_device *ppdev = to_platform_device(dev->parent);
730 struct pru_rproc *pru;
732 struct rproc *rproc = NULL;
733 struct resource *res;
735 const struct pru_private_data *data;
736 const char *mem_names[PRU_IOMEM_MAX] = { "iram", "control", "debug" };
738 data = of_device_get_match_data(&pdev->dev);
742 ret = of_property_read_string(np, "firmware-name", &fw_name);
744 dev_err(dev, "unable to retrieve firmware-name %d\n", ret);
748 rproc = devm_rproc_alloc(dev, pdev->name, &pru_rproc_ops, fw_name,
751 dev_err(dev, "rproc_alloc failed\n");
754 /* use a custom load function to deal with PRU-specific quirks */
755 rproc->ops->load = pru_rproc_load_elf_segments;
757 /* use a custom parse function to deal with PRU-specific resources */
758 rproc->ops->parse_fw = pru_rproc_parse_fw;
760 /* error recovery is not supported for PRUs */
761 rproc->recovery_disabled = true;
764 * rproc_add will auto-boot the processor normally, but this is not
765 * desired with PRU client driven boot-flow methodology. A PRU
766 * application/client driver will boot the corresponding PRU
767 * remote-processor as part of its state machine either through the
768 * remoteproc sysfs interface or through the equivalent kernel API.
770 rproc->auto_boot = false;
775 pru->pruss = platform_get_drvdata(ppdev);
777 pru->fw_name = fw_name;
779 for (i = 0; i < ARRAY_SIZE(mem_names); i++) {
780 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
782 pru->mem_regions[i].va = devm_ioremap_resource(dev, res);
783 if (IS_ERR(pru->mem_regions[i].va)) {
784 dev_err(dev, "failed to parse and map memory resource %d %s\n",
786 ret = PTR_ERR(pru->mem_regions[i].va);
789 pru->mem_regions[i].pa = res->start;
790 pru->mem_regions[i].size = resource_size(res);
792 dev_dbg(dev, "memory %8s: pa %pa size 0x%zx va %pK\n",
793 mem_names[i], &pru->mem_regions[i].pa,
794 pru->mem_regions[i].size, pru->mem_regions[i].va);
797 ret = pru_rproc_set_id(pru);
801 platform_set_drvdata(pdev, rproc);
803 ret = devm_rproc_add(dev, pru->rproc);
805 dev_err(dev, "rproc_add failed: %d\n", ret);
809 pru_rproc_create_debug_entries(rproc);
811 dev_dbg(dev, "PRU rproc node %pOF probed successfully\n", np);
816 static int pru_rproc_remove(struct platform_device *pdev)
818 struct device *dev = &pdev->dev;
819 struct rproc *rproc = platform_get_drvdata(pdev);
821 dev_dbg(dev, "%s: removing rproc %s\n", __func__, rproc->name);
826 static const struct pru_private_data pru_data = {
827 .type = PRU_TYPE_PRU,
830 static const struct pru_private_data k3_pru_data = {
831 .type = PRU_TYPE_PRU,
835 static const struct pru_private_data k3_rtu_data = {
836 .type = PRU_TYPE_RTU,
840 static const struct pru_private_data k3_tx_pru_data = {
841 .type = PRU_TYPE_TX_PRU,
845 static const struct of_device_id pru_rproc_match[] = {
846 { .compatible = "ti,am3356-pru", .data = &pru_data },
847 { .compatible = "ti,am4376-pru", .data = &pru_data },
848 { .compatible = "ti,am5728-pru", .data = &pru_data },
849 { .compatible = "ti,k2g-pru", .data = &pru_data },
850 { .compatible = "ti,am654-pru", .data = &k3_pru_data },
851 { .compatible = "ti,am654-rtu", .data = &k3_rtu_data },
852 { .compatible = "ti,am654-tx-pru", .data = &k3_tx_pru_data },
853 { .compatible = "ti,j721e-pru", .data = &k3_pru_data },
854 { .compatible = "ti,j721e-rtu", .data = &k3_rtu_data },
855 { .compatible = "ti,j721e-tx-pru", .data = &k3_tx_pru_data },
858 MODULE_DEVICE_TABLE(of, pru_rproc_match);
860 static struct platform_driver pru_rproc_driver = {
863 .of_match_table = pru_rproc_match,
864 .suppress_bind_attrs = true,
866 .probe = pru_rproc_probe,
867 .remove = pru_rproc_remove,
869 module_platform_driver(pru_rproc_driver);
871 MODULE_AUTHOR("Suman Anna <s-anna@ti.com>");
872 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
873 MODULE_AUTHOR("Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>");
874 MODULE_DESCRIPTION("PRU-ICSS Remote Processor Driver");
875 MODULE_LICENSE("GPL v2");