1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright 2021 NXP */
4 #include <dt-bindings/firmware/imx/rsrc.h>
5 #include <linux/arm-smccc.h>
8 #include <linux/firmware.h>
9 #include <linux/firmware/imx/sci.h>
10 #include <linux/interrupt.h>
11 #include <linux/kernel.h>
12 #include <linux/mailbox_client.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/of_device.h>
17 #include <linux/of_reserved_mem.h>
18 #include <linux/platform_device.h>
19 #include <linux/pm_domain.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/remoteproc.h>
23 #include <linux/slab.h>
25 #include "imx_rproc.h"
26 #include "remoteproc_elf_helpers.h"
27 #include "remoteproc_internal.h"
29 #define DSP_RPROC_CLK_MAX 5
34 static unsigned int no_mailboxes;
35 module_param_named(no_mailboxes, no_mailboxes, int, 0644);
36 MODULE_PARM_DESC(no_mailboxes,
37 "There is no mailbox between cores, so ignore remote proc reply after start, default is 0 (off).");
39 #define REMOTE_IS_READY BIT(0)
40 #define REMOTE_READY_WAIT_MAX_RETRIES 500
44 #define ATT_OWN BIT(31)
45 /* DSP instruction area */
46 #define ATT_IRAM BIT(30)
48 /* Definitions for i.MX8MP */
50 #define IMX8M_DAP_DEBUG 0x28800000
51 #define IMX8M_DAP_DEBUG_SIZE (64 * 1024)
52 #define IMX8M_DAP_PWRCTL (0x4000 + 0x3020)
53 #define IMX8M_PWRCTL_CORERESET BIT(16)
55 /* DSP audio mix registers */
56 #define IMX8M_AudioDSP_REG0 0x100
57 #define IMX8M_AudioDSP_REG1 0x104
58 #define IMX8M_AudioDSP_REG2 0x108
59 #define IMX8M_AudioDSP_REG3 0x10c
61 #define IMX8M_AudioDSP_REG2_RUNSTALL BIT(5)
62 #define IMX8M_AudioDSP_REG2_PWAITMODE BIT(1)
64 /* Definitions for i.MX8ULP */
65 #define IMX8ULP_SIM_LPAV_REG_SYSCTRL0 0x8
66 #define IMX8ULP_SYSCTRL0_DSP_DBG_RST BIT(25)
67 #define IMX8ULP_SYSCTRL0_DSP_PLAT_CLK_EN BIT(19)
68 #define IMX8ULP_SYSCTRL0_DSP_PBCLK_EN BIT(18)
69 #define IMX8ULP_SYSCTRL0_DSP_CLK_EN BIT(17)
70 #define IMX8ULP_SYSCTRL0_DSP_RST BIT(16)
71 #define IMX8ULP_SYSCTRL0_DSP_OCD_HALT BIT(14)
72 #define IMX8ULP_SYSCTRL0_DSP_STALL BIT(13)
74 #define IMX8ULP_SIP_HIFI_XRDC 0xc200000e
77 * enum - Predefined Mailbox Messages
79 * @RP_MBOX_SUSPEND_SYSTEM: system suspend request for the remote processor
81 * @RP_MBOX_SUSPEND_ACK: successful response from remote processor for a
84 * @RP_MBOX_RESUME_SYSTEM: system resume request for the remote processor
86 * @RP_MBOX_RESUME_ACK: successful response from remote processor for a
89 enum imx_dsp_rp_mbox_messages {
90 RP_MBOX_SUSPEND_SYSTEM = 0xFF11,
91 RP_MBOX_SUSPEND_ACK = 0xFF12,
92 RP_MBOX_RESUME_SYSTEM = 0xFF13,
93 RP_MBOX_RESUME_ACK = 0xFF14,
97 * struct imx_dsp_rproc - DSP remote processor state
98 * @regmap: regmap handler
99 * @rproc: rproc handler
100 * @dsp_dcfg: device configuration pointer
101 * @clks: clocks needed by this device
102 * @cl: mailbox client to request the mailbox channel
103 * @cl_rxdb: mailbox client to request the mailbox channel for doorbell
104 * @tx_ch: mailbox tx channel handle
105 * @rx_ch: mailbox rx channel handle
106 * @rxdb_ch: mailbox rx doorbell channel handle
107 * @pd_dev: power domain device
108 * @pd_dev_link: power domain device link
109 * @ipc_handle: System Control Unit ipc handle
110 * @rproc_work: work for processing virtio interrupts
111 * @pm_comp: completion primitive to sync for suspend response
112 * @num_domains: power domain number
113 * @flags: control flags
115 struct imx_dsp_rproc {
116 struct regmap *regmap;
118 const struct imx_dsp_rproc_dcfg *dsp_dcfg;
119 struct clk_bulk_data clks[DSP_RPROC_CLK_MAX];
120 struct mbox_client cl;
121 struct mbox_client cl_rxdb;
122 struct mbox_chan *tx_ch;
123 struct mbox_chan *rx_ch;
124 struct mbox_chan *rxdb_ch;
125 struct device **pd_dev;
126 struct device_link **pd_dev_link;
127 struct imx_sc_ipc *ipc_handle;
128 struct work_struct rproc_work;
129 struct completion pm_comp;
135 * struct imx_dsp_rproc_dcfg - DSP remote processor configuration
136 * @dcfg: imx_rproc_dcfg handler
137 * @reset: reset callback function
139 struct imx_dsp_rproc_dcfg {
140 const struct imx_rproc_dcfg *dcfg;
141 int (*reset)(struct imx_dsp_rproc *priv);
144 static const struct imx_rproc_att imx_dsp_rproc_att_imx8qm[] = {
145 /* dev addr , sys addr , size , flags */
146 { 0x596e8000, 0x556e8000, 0x00008000, ATT_OWN },
147 { 0x596f0000, 0x556f0000, 0x00008000, ATT_OWN },
148 { 0x596f8000, 0x556f8000, 0x00000800, ATT_OWN | ATT_IRAM},
149 { 0x55700000, 0x55700000, 0x00070000, ATT_OWN },
151 { 0x80000000, 0x80000000, 0x60000000, 0},
154 static const struct imx_rproc_att imx_dsp_rproc_att_imx8qxp[] = {
155 /* dev addr , sys addr , size , flags */
156 { 0x596e8000, 0x596e8000, 0x00008000, ATT_OWN },
157 { 0x596f0000, 0x596f0000, 0x00008000, ATT_OWN },
158 { 0x596f8000, 0x596f8000, 0x00000800, ATT_OWN | ATT_IRAM},
159 { 0x59700000, 0x59700000, 0x00070000, ATT_OWN },
161 { 0x80000000, 0x80000000, 0x60000000, 0},
164 static const struct imx_rproc_att imx_dsp_rproc_att_imx8mp[] = {
165 /* dev addr , sys addr , size , flags */
166 { 0x3b6e8000, 0x3b6e8000, 0x00008000, ATT_OWN },
167 { 0x3b6f0000, 0x3b6f0000, 0x00008000, ATT_OWN },
168 { 0x3b6f8000, 0x3b6f8000, 0x00000800, ATT_OWN | ATT_IRAM},
169 { 0x3b700000, 0x3b700000, 0x00040000, ATT_OWN },
171 { 0x40000000, 0x40000000, 0x80000000, 0},
174 static const struct imx_rproc_att imx_dsp_rproc_att_imx8ulp[] = {
175 /* dev addr , sys addr , size , flags */
176 { 0x21170000, 0x21170000, 0x00010000, ATT_OWN | ATT_IRAM},
177 { 0x21180000, 0x21180000, 0x00010000, ATT_OWN },
179 { 0x0c000000, 0x80000000, 0x10000000, 0},
180 { 0x30000000, 0x90000000, 0x10000000, 0},
183 /* Initialize the mailboxes between cores, if exists */
184 static int (*imx_dsp_rproc_mbox_init)(struct imx_dsp_rproc *priv);
186 /* Reset function for DSP on i.MX8MP */
187 static int imx8mp_dsp_reset(struct imx_dsp_rproc *priv)
189 void __iomem *dap = ioremap_wc(IMX8M_DAP_DEBUG, IMX8M_DAP_DEBUG_SIZE);
192 /* Put DSP into reset and stall */
193 pwrctl = readl(dap + IMX8M_DAP_PWRCTL);
194 pwrctl |= IMX8M_PWRCTL_CORERESET;
195 writel(pwrctl, dap + IMX8M_DAP_PWRCTL);
197 /* Keep reset asserted for 10 cycles */
200 regmap_update_bits(priv->regmap, IMX8M_AudioDSP_REG2,
201 IMX8M_AudioDSP_REG2_RUNSTALL,
202 IMX8M_AudioDSP_REG2_RUNSTALL);
204 /* Take the DSP out of reset and keep stalled for FW loading */
205 pwrctl = readl(dap + IMX8M_DAP_PWRCTL);
206 pwrctl &= ~IMX8M_PWRCTL_CORERESET;
207 writel(pwrctl, dap + IMX8M_DAP_PWRCTL);
213 /* Reset function for DSP on i.MX8ULP */
214 static int imx8ulp_dsp_reset(struct imx_dsp_rproc *priv)
216 struct arm_smccc_res res;
218 /* Put DSP into reset and stall */
219 regmap_update_bits(priv->regmap, IMX8ULP_SIM_LPAV_REG_SYSCTRL0,
220 IMX8ULP_SYSCTRL0_DSP_RST, IMX8ULP_SYSCTRL0_DSP_RST);
221 regmap_update_bits(priv->regmap, IMX8ULP_SIM_LPAV_REG_SYSCTRL0,
222 IMX8ULP_SYSCTRL0_DSP_STALL,
223 IMX8ULP_SYSCTRL0_DSP_STALL);
225 /* Configure resources of DSP through TFA */
226 arm_smccc_smc(IMX8ULP_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0, &res);
228 /* Take the DSP out of reset and keep stalled for FW loading */
229 regmap_update_bits(priv->regmap, IMX8ULP_SIM_LPAV_REG_SYSCTRL0,
230 IMX8ULP_SYSCTRL0_DSP_RST, 0);
231 regmap_update_bits(priv->regmap, IMX8ULP_SIM_LPAV_REG_SYSCTRL0,
232 IMX8ULP_SYSCTRL0_DSP_DBG_RST, 0);
237 /* Specific configuration for i.MX8MP */
238 static const struct imx_rproc_dcfg dsp_rproc_cfg_imx8mp = {
239 .src_reg = IMX8M_AudioDSP_REG2,
240 .src_mask = IMX8M_AudioDSP_REG2_RUNSTALL,
242 .src_stop = IMX8M_AudioDSP_REG2_RUNSTALL,
243 .att = imx_dsp_rproc_att_imx8mp,
244 .att_size = ARRAY_SIZE(imx_dsp_rproc_att_imx8mp),
245 .method = IMX_RPROC_MMIO,
248 static const struct imx_dsp_rproc_dcfg imx_dsp_rproc_cfg_imx8mp = {
249 .dcfg = &dsp_rproc_cfg_imx8mp,
250 .reset = imx8mp_dsp_reset,
253 /* Specific configuration for i.MX8ULP */
254 static const struct imx_rproc_dcfg dsp_rproc_cfg_imx8ulp = {
255 .src_reg = IMX8ULP_SIM_LPAV_REG_SYSCTRL0,
256 .src_mask = IMX8ULP_SYSCTRL0_DSP_STALL,
258 .src_stop = IMX8ULP_SYSCTRL0_DSP_STALL,
259 .att = imx_dsp_rproc_att_imx8ulp,
260 .att_size = ARRAY_SIZE(imx_dsp_rproc_att_imx8ulp),
261 .method = IMX_RPROC_MMIO,
264 static const struct imx_dsp_rproc_dcfg imx_dsp_rproc_cfg_imx8ulp = {
265 .dcfg = &dsp_rproc_cfg_imx8ulp,
266 .reset = imx8ulp_dsp_reset,
269 /* Specific configuration for i.MX8QXP */
270 static const struct imx_rproc_dcfg dsp_rproc_cfg_imx8qxp = {
271 .att = imx_dsp_rproc_att_imx8qxp,
272 .att_size = ARRAY_SIZE(imx_dsp_rproc_att_imx8qxp),
273 .method = IMX_RPROC_SCU_API,
276 static const struct imx_dsp_rproc_dcfg imx_dsp_rproc_cfg_imx8qxp = {
277 .dcfg = &dsp_rproc_cfg_imx8qxp,
280 /* Specific configuration for i.MX8QM */
281 static const struct imx_rproc_dcfg dsp_rproc_cfg_imx8qm = {
282 .att = imx_dsp_rproc_att_imx8qm,
283 .att_size = ARRAY_SIZE(imx_dsp_rproc_att_imx8qm),
284 .method = IMX_RPROC_SCU_API,
287 static const struct imx_dsp_rproc_dcfg imx_dsp_rproc_cfg_imx8qm = {
288 .dcfg = &dsp_rproc_cfg_imx8qm,
291 static int imx_dsp_rproc_ready(struct rproc *rproc)
293 struct imx_dsp_rproc *priv = rproc->priv;
299 for (i = 0; i < REMOTE_READY_WAIT_MAX_RETRIES; i++) {
300 if (priv->flags & REMOTE_IS_READY)
302 usleep_range(100, 200);
309 * Start function for rproc_ops
311 * There is a handshake for start procedure: when DSP starts, it
312 * will send a doorbell message to this driver, then the
313 * REMOTE_IS_READY flags is set, then driver will kick
316 static int imx_dsp_rproc_start(struct rproc *rproc)
318 struct imx_dsp_rproc *priv = rproc->priv;
319 const struct imx_dsp_rproc_dcfg *dsp_dcfg = priv->dsp_dcfg;
320 const struct imx_rproc_dcfg *dcfg = dsp_dcfg->dcfg;
321 struct device *dev = rproc->dev.parent;
324 switch (dcfg->method) {
326 ret = regmap_update_bits(priv->regmap,
331 case IMX_RPROC_SCU_API:
332 ret = imx_sc_pm_cpu_start(priv->ipc_handle,
342 dev_err(dev, "Failed to enable remote core!\n");
344 ret = imx_dsp_rproc_ready(rproc);
350 * Stop function for rproc_ops
351 * It clears the REMOTE_IS_READY flags
353 static int imx_dsp_rproc_stop(struct rproc *rproc)
355 struct imx_dsp_rproc *priv = rproc->priv;
356 const struct imx_dsp_rproc_dcfg *dsp_dcfg = priv->dsp_dcfg;
357 const struct imx_rproc_dcfg *dcfg = dsp_dcfg->dcfg;
358 struct device *dev = rproc->dev.parent;
361 if (rproc->state == RPROC_CRASHED) {
362 priv->flags &= ~REMOTE_IS_READY;
366 switch (dcfg->method) {
368 ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask,
371 case IMX_RPROC_SCU_API:
372 ret = imx_sc_pm_cpu_start(priv->ipc_handle,
382 dev_err(dev, "Failed to stop remote core\n");
384 priv->flags &= ~REMOTE_IS_READY;
390 * imx_dsp_rproc_sys_to_da() - internal memory translation helper
391 * @priv: private data pointer
392 * @sys: system address (DDR address)
393 * @len: length of the memory buffer
394 * @da: device address to translate
396 * Convert system address (DDR address) to device address (DSP)
397 * for there may be memory remap for device.
399 static int imx_dsp_rproc_sys_to_da(struct imx_dsp_rproc *priv, u64 sys,
402 const struct imx_dsp_rproc_dcfg *dsp_dcfg = priv->dsp_dcfg;
403 const struct imx_rproc_dcfg *dcfg = dsp_dcfg->dcfg;
406 /* Parse address translation table */
407 for (i = 0; i < dcfg->att_size; i++) {
408 const struct imx_rproc_att *att = &dcfg->att[i];
410 if (sys >= att->sa && sys + len <= att->sa + att->size) {
411 unsigned int offset = sys - att->sa;
413 *da = att->da + offset;
421 /* Main virtqueue message work function
423 * This function is executed upon scheduling of the i.MX DSP remoteproc
424 * driver's workqueue. The workqueue is scheduled by the mailbox rx
427 * This work function processes both the Tx and Rx virtqueue indices on
428 * every invocation. The rproc_vq_interrupt function can detect if there
429 * are new unprocessed messages or not (returns IRQ_NONE vs IRQ_HANDLED),
430 * but there is no need to check for these return values. The index 0
431 * triggering will process all pending Rx buffers, and the index 1 triggering
432 * will process all newly available Tx buffers and will wakeup any potentially
436 * The current logic is based on an inherent design assumption of supporting
437 * only 2 vrings, but this can be changed if needed.
439 static void imx_dsp_rproc_vq_work(struct work_struct *work)
441 struct imx_dsp_rproc *priv = container_of(work, struct imx_dsp_rproc,
443 struct rproc *rproc = priv->rproc;
445 mutex_lock(&rproc->lock);
447 if (rproc->state != RPROC_RUNNING)
450 rproc_vq_interrupt(priv->rproc, 0);
451 rproc_vq_interrupt(priv->rproc, 1);
454 mutex_unlock(&rproc->lock);
458 * imx_dsp_rproc_rx_tx_callback() - inbound mailbox message handler
459 * @cl: mailbox client pointer used for requesting the mailbox channel
460 * @data: mailbox payload
462 * This handler is invoked by mailbox driver whenever a mailbox
463 * message is received. Usually, the SUSPEND and RESUME related messages
464 * are handled in this function, other messages are handled by remoteproc core
466 static void imx_dsp_rproc_rx_tx_callback(struct mbox_client *cl, void *data)
468 struct rproc *rproc = dev_get_drvdata(cl->dev);
469 struct imx_dsp_rproc *priv = rproc->priv;
470 struct device *dev = rproc->dev.parent;
471 u32 message = (u32)(*(u32 *)data);
473 dev_dbg(dev, "mbox msg: 0x%x\n", message);
476 case RP_MBOX_SUSPEND_ACK:
477 complete(&priv->pm_comp);
479 case RP_MBOX_RESUME_ACK:
480 complete(&priv->pm_comp);
483 schedule_work(&priv->rproc_work);
489 * imx_dsp_rproc_rxdb_callback() - inbound mailbox message handler
490 * @cl: mailbox client pointer used for requesting the mailbox channel
491 * @data: mailbox payload
493 * For doorbell, there is no message specified, just set REMOTE_IS_READY
496 static void imx_dsp_rproc_rxdb_callback(struct mbox_client *cl, void *data)
498 struct rproc *rproc = dev_get_drvdata(cl->dev);
499 struct imx_dsp_rproc *priv = rproc->priv;
501 /* Remote is ready after firmware is loaded and running */
502 priv->flags |= REMOTE_IS_READY;
506 * imx_dsp_rproc_mbox_alloc() - request mailbox channels
507 * @priv: private data pointer
509 * Request three mailbox channels (tx, rx, rxdb).
511 static int imx_dsp_rproc_mbox_alloc(struct imx_dsp_rproc *priv)
513 struct device *dev = priv->rproc->dev.parent;
514 struct mbox_client *cl;
517 if (!of_get_property(dev->of_node, "mbox-names", NULL))
524 cl->knows_txdone = false;
525 cl->rx_callback = imx_dsp_rproc_rx_tx_callback;
527 /* Channel for sending message */
528 priv->tx_ch = mbox_request_channel_byname(cl, "tx");
529 if (IS_ERR(priv->tx_ch)) {
530 ret = PTR_ERR(priv->tx_ch);
531 dev_dbg(cl->dev, "failed to request tx mailbox channel: %d\n",
536 /* Channel for receiving message */
537 priv->rx_ch = mbox_request_channel_byname(cl, "rx");
538 if (IS_ERR(priv->rx_ch)) {
539 ret = PTR_ERR(priv->rx_ch);
540 dev_dbg(cl->dev, "failed to request rx mailbox channel: %d\n",
542 goto free_channel_tx;
547 cl->rx_callback = imx_dsp_rproc_rxdb_callback;
550 * RX door bell is used to receive the ready signal from remote
551 * after firmware loaded.
553 priv->rxdb_ch = mbox_request_channel_byname(cl, "rxdb");
554 if (IS_ERR(priv->rxdb_ch)) {
555 ret = PTR_ERR(priv->rxdb_ch);
556 dev_dbg(cl->dev, "failed to request mbox chan rxdb, ret %d\n",
558 goto free_channel_rx;
564 mbox_free_channel(priv->rx_ch);
566 mbox_free_channel(priv->tx_ch);
571 * imx_dsp_rproc_mbox_no_alloc()
573 * Empty function for no mailbox between cores
577 static int imx_dsp_rproc_mbox_no_alloc(struct imx_dsp_rproc *priv)
582 static void imx_dsp_rproc_free_mbox(struct imx_dsp_rproc *priv)
584 mbox_free_channel(priv->tx_ch);
585 mbox_free_channel(priv->rx_ch);
586 mbox_free_channel(priv->rxdb_ch);
590 * imx_dsp_rproc_add_carveout() - request mailbox channels
591 * @priv: private data pointer
593 * This function registers specified memory entry in @rproc carveouts list
594 * The carveouts can help to mapping the memory address for DSP.
596 static int imx_dsp_rproc_add_carveout(struct imx_dsp_rproc *priv)
598 const struct imx_dsp_rproc_dcfg *dsp_dcfg = priv->dsp_dcfg;
599 const struct imx_rproc_dcfg *dcfg = dsp_dcfg->dcfg;
600 struct rproc *rproc = priv->rproc;
601 struct device *dev = rproc->dev.parent;
602 struct device_node *np = dev->of_node;
603 struct of_phandle_iterator it;
604 struct rproc_mem_entry *mem;
605 struct reserved_mem *rmem;
606 void __iomem *cpu_addr;
610 /* Remap required addresses */
611 for (a = 0; a < dcfg->att_size; a++) {
612 const struct imx_rproc_att *att = &dcfg->att[a];
614 if (!(att->flags & ATT_OWN))
617 if (imx_dsp_rproc_sys_to_da(priv, att->sa, att->size, &da))
620 cpu_addr = devm_ioremap_wc(dev, att->sa, att->size);
622 dev_err(dev, "failed to map memory %p\n", &att->sa);
626 /* Register memory region */
627 mem = rproc_mem_entry_init(dev, (void __force *)cpu_addr, (dma_addr_t)att->sa,
628 att->size, da, NULL, NULL, "dsp_mem");
631 rproc_coredump_add_segment(rproc, da, att->size);
635 rproc_add_carveout(rproc, mem);
638 of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
639 while (of_phandle_iterator_next(&it) == 0) {
641 * Ignore the first memory region which will be used vdev buffer.
642 * No need to do extra handlings, rproc_add_virtio_dev will handle it.
644 if (!strcmp(it.node->name, "vdev0buffer"))
647 rmem = of_reserved_mem_lookup(it.node);
649 of_node_put(it.node);
650 dev_err(dev, "unable to acquire memory-region\n");
654 if (imx_dsp_rproc_sys_to_da(priv, rmem->base, rmem->size, &da)) {
655 of_node_put(it.node);
659 cpu_addr = devm_ioremap_wc(dev, rmem->base, rmem->size);
661 of_node_put(it.node);
662 dev_err(dev, "failed to map memory %p\n", &rmem->base);
666 /* Register memory region */
667 mem = rproc_mem_entry_init(dev, (void __force *)cpu_addr, (dma_addr_t)rmem->base,
668 rmem->size, da, NULL, NULL, it.node->name);
671 rproc_coredump_add_segment(rproc, da, rmem->size);
673 of_node_put(it.node);
677 rproc_add_carveout(rproc, mem);
683 /* Prepare function for rproc_ops */
684 static int imx_dsp_rproc_prepare(struct rproc *rproc)
686 struct imx_dsp_rproc *priv = rproc->priv;
687 struct device *dev = rproc->dev.parent;
688 struct rproc_mem_entry *carveout;
691 ret = imx_dsp_rproc_add_carveout(priv);
693 dev_err(dev, "failed on imx_dsp_rproc_add_carveout\n");
697 pm_runtime_get_sync(dev);
700 * Clear buffers after pm rumtime for internal ocram is not
701 * accessible if power and clock are not enabled.
703 list_for_each_entry(carveout, &rproc->carveouts, node) {
705 memset(carveout->va, 0, carveout->len);
711 /* Unprepare function for rproc_ops */
712 static int imx_dsp_rproc_unprepare(struct rproc *rproc)
714 pm_runtime_put_sync(rproc->dev.parent);
719 /* Kick function for rproc_ops */
720 static void imx_dsp_rproc_kick(struct rproc *rproc, int vqid)
722 struct imx_dsp_rproc *priv = rproc->priv;
723 struct device *dev = rproc->dev.parent;
728 dev_err(dev, "No initialized mbox tx channel\n");
733 * Send the index of the triggered virtqueue as the mu payload.
734 * Let remote processor know which virtqueue is used.
738 err = mbox_send_message(priv->tx_ch, (void *)&mmsg);
740 dev_err(dev, "%s: failed (%d, err:%d)\n", __func__, vqid, err);
744 * Custom memory copy implementation for i.MX DSP Cores
746 * The IRAM is part of the HiFi DSP.
747 * According to hw specs only 32-bits writes are allowed.
749 static int imx_dsp_rproc_memcpy(void *dst, const void *src, size_t size)
751 void __iomem *dest = (void __iomem *)dst;
752 const u8 *src_byte = src;
753 const u32 *source = src;
758 /* destination must be 32bit aligned */
759 if (!IS_ALIGNED((uintptr_t)dest, 4))
765 /* copy data in units of 32 bits at a time */
766 for (i = 0; i < q; i++)
767 writel(source[i], dest + i * 4);
770 affected_mask = GENMASK(8 * r, 0);
773 * first read the 32bit data of dest, then change affected
774 * bytes, and write back to dest.
775 * For unaffected bytes, it should not be changed
777 tmp = readl(dest + q * 4);
778 tmp &= ~affected_mask;
780 /* avoid reading after end of source */
781 for (i = 0; i < r; i++)
782 tmp |= (src_byte[q * 4 + i] << (8 * i));
784 writel(tmp, dest + q * 4);
791 * Custom memset implementation for i.MX DSP Cores
793 * The IRAM is part of the HiFi DSP.
794 * According to hw specs only 32-bits writes are allowed.
796 static int imx_dsp_rproc_memset(void *addr, u8 value, size_t size)
798 void __iomem *tmp_dst = (void __iomem *)addr;
804 /* destination must be 32bit aligned */
805 if (!IS_ALIGNED((uintptr_t)addr, 4))
808 tmp_val |= tmp_val << 8;
809 tmp_val |= tmp_val << 16;
815 writel(tmp_val, tmp_dst++);
818 affected_mask = GENMASK(8 * r, 0);
821 * first read the 32bit data of addr, then change affected
822 * bytes, and write back to addr.
823 * For unaffected bytes, it should not be changed
825 tmp = readl(tmp_dst);
826 tmp &= ~affected_mask;
828 tmp |= (tmp_val & affected_mask);
829 writel(tmp, tmp_dst);
836 * imx_dsp_rproc_elf_load_segments() - load firmware segments to memory
837 * @rproc: remote processor which will be booted using these fw segments
838 * @fw: the ELF firmware image
840 * This function loads the firmware segments to memory, where the remote
841 * processor expects them.
843 * Return: 0 on success and an appropriate error code otherwise
845 static int imx_dsp_rproc_elf_load_segments(struct rproc *rproc, const struct firmware *fw)
847 struct device *dev = &rproc->dev;
848 const void *ehdr, *phdr;
851 const u8 *elf_data = fw->data;
852 u8 class = fw_elf_get_class(fw);
853 u32 elf_phdr_get_size = elf_size_of_phdr(class);
856 phnum = elf_hdr_get_e_phnum(class, ehdr);
857 phdr = elf_data + elf_hdr_get_e_phoff(class, ehdr);
859 /* go through the available ELF segments */
860 for (i = 0; i < phnum; i++, phdr += elf_phdr_get_size) {
861 u64 da = elf_phdr_get_p_paddr(class, phdr);
862 u64 memsz = elf_phdr_get_p_memsz(class, phdr);
863 u64 filesz = elf_phdr_get_p_filesz(class, phdr);
864 u64 offset = elf_phdr_get_p_offset(class, phdr);
865 u32 type = elf_phdr_get_p_type(class, phdr);
868 if (type != PT_LOAD || !memsz)
871 dev_dbg(dev, "phdr: type %d da 0x%llx memsz 0x%llx filesz 0x%llx\n",
872 type, da, memsz, filesz);
874 if (filesz > memsz) {
875 dev_err(dev, "bad phdr filesz 0x%llx memsz 0x%llx\n",
881 if (offset + filesz > fw->size) {
882 dev_err(dev, "truncated fw: need 0x%llx avail 0x%zx\n",
883 offset + filesz, fw->size);
888 if (!rproc_u64_fit_in_size_t(memsz)) {
889 dev_err(dev, "size (%llx) does not fit in size_t type\n",
895 /* grab the kernel address for this device address */
896 ptr = rproc_da_to_va(rproc, da, memsz, NULL);
898 dev_err(dev, "bad phdr da 0x%llx mem 0x%llx\n", da,
904 /* put the segment where the remote processor expects it */
906 ret = imx_dsp_rproc_memcpy(ptr, elf_data + offset, filesz);
908 dev_err(dev, "memory copy failed for da 0x%llx memsz 0x%llx\n",
914 /* zero out remaining memory for this segment */
915 if (memsz > filesz) {
916 ret = imx_dsp_rproc_memset(ptr + filesz, 0, memsz - filesz);
918 dev_err(dev, "memset failed for da 0x%llx memsz 0x%llx\n",
928 static int imx_dsp_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
930 if (rproc_elf_load_rsc_table(rproc, fw))
931 dev_warn(&rproc->dev, "no resource table found for this firmware\n");
936 static const struct rproc_ops imx_dsp_rproc_ops = {
937 .prepare = imx_dsp_rproc_prepare,
938 .unprepare = imx_dsp_rproc_unprepare,
939 .start = imx_dsp_rproc_start,
940 .stop = imx_dsp_rproc_stop,
941 .kick = imx_dsp_rproc_kick,
942 .load = imx_dsp_rproc_elf_load_segments,
943 .parse_fw = imx_dsp_rproc_parse_fw,
944 .sanity_check = rproc_elf_sanity_check,
945 .get_boot_addr = rproc_elf_get_boot_addr,
949 * imx_dsp_attach_pm_domains() - attach the power domains
950 * @priv: private data pointer
952 * On i.MX8QM and i.MX8QXP there is multiple power domains
953 * required, so need to link them.
955 static int imx_dsp_attach_pm_domains(struct imx_dsp_rproc *priv)
957 struct device *dev = priv->rproc->dev.parent;
960 priv->num_domains = of_count_phandle_with_args(dev->of_node,
962 "#power-domain-cells");
964 /* If only one domain, then no need to link the device */
965 if (priv->num_domains <= 1)
968 priv->pd_dev = devm_kmalloc_array(dev, priv->num_domains,
969 sizeof(*priv->pd_dev),
974 priv->pd_dev_link = devm_kmalloc_array(dev, priv->num_domains,
975 sizeof(*priv->pd_dev_link),
977 if (!priv->pd_dev_link)
980 for (i = 0; i < priv->num_domains; i++) {
981 priv->pd_dev[i] = dev_pm_domain_attach_by_id(dev, i);
982 if (IS_ERR(priv->pd_dev[i])) {
983 ret = PTR_ERR(priv->pd_dev[i]);
988 * device_link_add will check priv->pd_dev[i], if it is
989 * NULL, then will break.
991 priv->pd_dev_link[i] = device_link_add(dev,
995 if (!priv->pd_dev_link[i]) {
996 dev_pm_domain_detach(priv->pd_dev[i], false);
1006 device_link_del(priv->pd_dev_link[i]);
1007 dev_pm_domain_detach(priv->pd_dev[i], false);
1013 static int imx_dsp_detach_pm_domains(struct imx_dsp_rproc *priv)
1017 if (priv->num_domains <= 1)
1020 for (i = 0; i < priv->num_domains; i++) {
1021 device_link_del(priv->pd_dev_link[i]);
1022 dev_pm_domain_detach(priv->pd_dev[i], false);
1029 * imx_dsp_rproc_detect_mode() - detect DSP control mode
1030 * @priv: private data pointer
1032 * Different platform has different control method for DSP, which depends
1033 * on how the DSP is integrated in platform.
1035 * For i.MX8QXP and i.MX8QM, DSP should be started and stopped by System
1037 * For i.MX8MP and i.MX8ULP, DSP should be started and stopped by system
1038 * integration module.
1040 static int imx_dsp_rproc_detect_mode(struct imx_dsp_rproc *priv)
1042 const struct imx_dsp_rproc_dcfg *dsp_dcfg = priv->dsp_dcfg;
1043 struct device *dev = priv->rproc->dev.parent;
1044 struct regmap *regmap;
1047 switch (dsp_dcfg->dcfg->method) {
1048 case IMX_RPROC_SCU_API:
1049 ret = imx_scu_get_handle(&priv->ipc_handle);
1053 case IMX_RPROC_MMIO:
1054 regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,dsp-ctrl");
1055 if (IS_ERR(regmap)) {
1056 dev_err(dev, "failed to find syscon\n");
1057 return PTR_ERR(regmap);
1060 priv->regmap = regmap;
1070 static const char *imx_dsp_clks_names[DSP_RPROC_CLK_MAX] = {
1072 "core", "ocram", "debug", "ipg", "mu",
1075 static int imx_dsp_rproc_clk_get(struct imx_dsp_rproc *priv)
1077 struct device *dev = priv->rproc->dev.parent;
1078 struct clk_bulk_data *clks = priv->clks;
1081 for (i = 0; i < DSP_RPROC_CLK_MAX; i++)
1082 clks[i].id = imx_dsp_clks_names[i];
1084 return devm_clk_bulk_get_optional(dev, DSP_RPROC_CLK_MAX, clks);
1087 static int imx_dsp_rproc_probe(struct platform_device *pdev)
1089 const struct imx_dsp_rproc_dcfg *dsp_dcfg;
1090 struct device *dev = &pdev->dev;
1091 struct imx_dsp_rproc *priv;
1092 struct rproc *rproc;
1093 const char *fw_name;
1096 dsp_dcfg = of_device_get_match_data(dev);
1100 ret = rproc_of_parse_firmware(dev, 0, &fw_name);
1102 dev_err(dev, "failed to parse firmware-name property, ret = %d\n",
1107 rproc = rproc_alloc(dev, "imx-dsp-rproc", &imx_dsp_rproc_ops, fw_name,
1113 priv->rproc = rproc;
1114 priv->dsp_dcfg = dsp_dcfg;
1117 imx_dsp_rproc_mbox_init = imx_dsp_rproc_mbox_no_alloc;
1119 imx_dsp_rproc_mbox_init = imx_dsp_rproc_mbox_alloc;
1121 dev_set_drvdata(dev, rproc);
1123 INIT_WORK(&priv->rproc_work, imx_dsp_rproc_vq_work);
1125 ret = imx_dsp_rproc_detect_mode(priv);
1127 dev_err(dev, "failed on imx_dsp_rproc_detect_mode\n");
1131 /* There are multiple power domains required by DSP on some platform */
1132 ret = imx_dsp_attach_pm_domains(priv);
1134 dev_err(dev, "failed on imx_dsp_attach_pm_domains\n");
1138 ret = imx_dsp_rproc_clk_get(priv);
1140 dev_err(dev, "failed on imx_dsp_rproc_clk_get\n");
1141 goto err_detach_domains;
1144 init_completion(&priv->pm_comp);
1145 rproc->auto_boot = false;
1146 ret = rproc_add(rproc);
1148 dev_err(dev, "rproc_add failed\n");
1149 goto err_detach_domains;
1152 pm_runtime_enable(dev);
1157 imx_dsp_detach_pm_domains(priv);
1164 static void imx_dsp_rproc_remove(struct platform_device *pdev)
1166 struct rproc *rproc = platform_get_drvdata(pdev);
1167 struct imx_dsp_rproc *priv = rproc->priv;
1169 pm_runtime_disable(&pdev->dev);
1171 imx_dsp_detach_pm_domains(priv);
1175 /* pm runtime functions */
1176 static int imx_dsp_runtime_resume(struct device *dev)
1178 struct rproc *rproc = dev_get_drvdata(dev);
1179 struct imx_dsp_rproc *priv = rproc->priv;
1180 const struct imx_dsp_rproc_dcfg *dsp_dcfg = priv->dsp_dcfg;
1184 * There is power domain attached with mailbox, if setup mailbox
1185 * in probe(), then the power of mailbox is always enabled,
1186 * the power can't be saved.
1187 * So move setup of mailbox to runtime resume.
1189 ret = imx_dsp_rproc_mbox_init(priv);
1191 dev_err(dev, "failed on imx_dsp_rproc_mbox_init\n");
1195 ret = clk_bulk_prepare_enable(DSP_RPROC_CLK_MAX, priv->clks);
1197 dev_err(dev, "failed on clk_bulk_prepare_enable\n");
1201 /* Reset DSP if needed */
1202 if (dsp_dcfg->reset)
1203 dsp_dcfg->reset(priv);
1208 static int imx_dsp_runtime_suspend(struct device *dev)
1210 struct rproc *rproc = dev_get_drvdata(dev);
1211 struct imx_dsp_rproc *priv = rproc->priv;
1213 clk_bulk_disable_unprepare(DSP_RPROC_CLK_MAX, priv->clks);
1215 imx_dsp_rproc_free_mbox(priv);
1220 static void imx_dsp_load_firmware(const struct firmware *fw, void *context)
1222 struct rproc *rproc = context;
1226 * Same flow as start procedure.
1227 * Load the ELF segments to memory firstly.
1229 ret = rproc_load_segments(rproc, fw);
1233 /* Start the remote processor */
1234 ret = rproc->ops->start(rproc);
1238 rproc->ops->kick(rproc, 0);
1241 release_firmware(fw);
1244 static int imx_dsp_suspend(struct device *dev)
1246 struct rproc *rproc = dev_get_drvdata(dev);
1247 struct imx_dsp_rproc *priv = rproc->priv;
1248 __u32 mmsg = RP_MBOX_SUSPEND_SYSTEM;
1251 if (rproc->state != RPROC_RUNNING)
1254 reinit_completion(&priv->pm_comp);
1256 /* Tell DSP that suspend is happening */
1257 ret = mbox_send_message(priv->tx_ch, (void *)&mmsg);
1259 dev_err(dev, "PM mbox_send_message failed: %d\n", ret);
1264 * DSP need to save the context at suspend.
1265 * Here waiting the response for DSP, then power can be disabled.
1267 if (!wait_for_completion_timeout(&priv->pm_comp, msecs_to_jiffies(100)))
1272 * The power of DSP is disabled in suspend, so force pm runtime
1273 * to be suspend, then we can reenable the power and clocks at
1276 return pm_runtime_force_suspend(dev);
1279 static int imx_dsp_resume(struct device *dev)
1281 struct rproc *rproc = dev_get_drvdata(dev);
1284 ret = pm_runtime_force_resume(dev);
1288 if (rproc->state != RPROC_RUNNING)
1292 * The power of DSP is disabled at suspend, the memory of dsp
1293 * is reset, the image segments are lost. So need to reload
1294 * firmware and restart the DSP if it is in running state.
1296 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
1297 rproc->firmware, dev, GFP_KERNEL,
1298 rproc, imx_dsp_load_firmware);
1300 dev_err(dev, "load firmware failed: %d\n", ret);
1307 pm_runtime_force_suspend(dev);
1312 static const struct dev_pm_ops imx_dsp_rproc_pm_ops = {
1313 SYSTEM_SLEEP_PM_OPS(imx_dsp_suspend, imx_dsp_resume)
1314 RUNTIME_PM_OPS(imx_dsp_runtime_suspend, imx_dsp_runtime_resume, NULL)
1317 static const struct of_device_id imx_dsp_rproc_of_match[] = {
1318 { .compatible = "fsl,imx8qxp-hifi4", .data = &imx_dsp_rproc_cfg_imx8qxp },
1319 { .compatible = "fsl,imx8qm-hifi4", .data = &imx_dsp_rproc_cfg_imx8qm },
1320 { .compatible = "fsl,imx8mp-hifi4", .data = &imx_dsp_rproc_cfg_imx8mp },
1321 { .compatible = "fsl,imx8ulp-hifi4", .data = &imx_dsp_rproc_cfg_imx8ulp },
1324 MODULE_DEVICE_TABLE(of, imx_dsp_rproc_of_match);
1326 static struct platform_driver imx_dsp_rproc_driver = {
1327 .probe = imx_dsp_rproc_probe,
1328 .remove_new = imx_dsp_rproc_remove,
1330 .name = "imx-dsp-rproc",
1331 .of_match_table = imx_dsp_rproc_of_match,
1332 .pm = pm_ptr(&imx_dsp_rproc_pm_ops),
1335 module_platform_driver(imx_dsp_rproc_driver);
1337 MODULE_LICENSE("GPL v2");
1338 MODULE_DESCRIPTION("i.MX HiFi Core Remote Processor Control Driver");
1339 MODULE_AUTHOR("Shengjiu Wang <shengjiu.wang@nxp.com>");