drivers/regulator/slg51000-regulator.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // SLG51000 High PSRR, Multi-Output Regulators
   4 // Copyright (C) 2019  Dialog Semiconductor
   5 //
   6 // Author: Eric Jeong <eric.jeong.opensource@diasemi.com>
   7
   8 #include <linux/err.h>
   9 #include <linux/gpio/consumer.h>
  10 #include <linux/i2c.h>
  11 #include <linux/init.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/irq.h>
  14 #include <linux/module.h>
  15 #include <linux/of.h>
  16 #include <linux/regmap.h>
  17 #include <linux/regulator/driver.h>
  18 #include <linux/regulator/machine.h>
  19 #include <linux/regulator/of_regulator.h>
  20 #include "slg51000-regulator.h"
  21
  22 #define SLG51000_SCTL_EVT               7
  23 #define SLG51000_MAX_EVT_REGISTER       8
  24 #define SLG51000_LDOHP_LV_MIN           1200000
  25 #define SLG51000_LDOHP_HV_MIN           2400000
  26
  27 enum slg51000_regulators {
  28         SLG51000_REGULATOR_LDO1 = 0,
  29         SLG51000_REGULATOR_LDO2,
  30         SLG51000_REGULATOR_LDO3,
  31         SLG51000_REGULATOR_LDO4,
  32         SLG51000_REGULATOR_LDO5,
  33         SLG51000_REGULATOR_LDO6,
  34         SLG51000_REGULATOR_LDO7,
  35         SLG51000_MAX_REGULATORS,
  36 };
  37
  38 struct slg51000 {
  39         struct device *dev;
  40         struct regmap *regmap;
  41         struct regulator_desc *rdesc[SLG51000_MAX_REGULATORS];
  42         struct regulator_dev *rdev[SLG51000_MAX_REGULATORS];
  43         struct gpio_desc *cs_gpiod;
  44         int chip_irq;
  45 };
  46
  47 struct slg51000_evt_sta {
  48         unsigned int ereg;
  49         unsigned int sreg;
  50 };
  51
  52 static const struct slg51000_evt_sta es_reg[SLG51000_MAX_EVT_REGISTER] = {
  53         {SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS},
  54         {SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS},
  55         {SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS},
  56         {SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS},
  57         {SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS},
  58         {SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS},
  59         {SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS},
  60         {SLG51000_SYSCTL_EVENT, SLG51000_SYSCTL_STATUS},
  61 };
  62
  63 static const struct regmap_range slg51000_writeable_ranges[] = {
  64         regmap_reg_range(SLG51000_SYSCTL_MATRIX_CONF_A,
  65                          SLG51000_SYSCTL_MATRIX_CONF_A),
  66         regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL),
  67         regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV),
  68         regmap_reg_range(SLG51000_LDO1_IRQ_MASK, SLG51000_LDO1_IRQ_MASK),
  69         regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL),
  70         regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV),
  71         regmap_reg_range(SLG51000_LDO2_IRQ_MASK, SLG51000_LDO2_IRQ_MASK),
  72         regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL),
  73         regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV),
  74         regmap_reg_range(SLG51000_LDO3_IRQ_MASK, SLG51000_LDO3_IRQ_MASK),
  75         regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL),
  76         regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV),
  77         regmap_reg_range(SLG51000_LDO4_IRQ_MASK, SLG51000_LDO4_IRQ_MASK),
  78         regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL),
  79         regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV),
  80         regmap_reg_range(SLG51000_LDO5_IRQ_MASK, SLG51000_LDO5_IRQ_MASK),
  81         regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL),
  82         regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV),
  83         regmap_reg_range(SLG51000_LDO6_IRQ_MASK, SLG51000_LDO6_IRQ_MASK),
  84         regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL),
  85         regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV),
  86         regmap_reg_range(SLG51000_LDO7_IRQ_MASK, SLG51000_LDO7_IRQ_MASK),
  87         regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK),
  88 };
  89
  90 static const struct regmap_range slg51000_readable_ranges[] = {
  91         regmap_reg_range(SLG51000_SYSCTL_PATN_ID_B0,
  92                          SLG51000_SYSCTL_PATN_ID_B2),
  93         regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_A,
  94                          SLG51000_SYSCTL_SYS_CONF_A),
  95         regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_D,
  96                          SLG51000_SYSCTL_MATRIX_CONF_B),
  97         regmap_reg_range(SLG51000_SYSCTL_REFGEN_CONF_C,
  98                          SLG51000_SYSCTL_UVLO_CONF_A),
  99         regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_IRQ_MASK),
 100         regmap_reg_range(SLG51000_IO_GPIO1_CONF, SLG51000_IO_GPIO_STATUS),
 101         regmap_reg_range(SLG51000_LUTARRAY_LUT_VAL_0,
 102                          SLG51000_LUTARRAY_LUT_VAL_11),
 103         regmap_reg_range(SLG51000_MUXARRAY_INPUT_SEL_0,
 104                          SLG51000_MUXARRAY_INPUT_SEL_63),
 105         regmap_reg_range(SLG51000_PWRSEQ_RESOURCE_EN_0,
 106                          SLG51000_PWRSEQ_INPUT_SENSE_CONF_B),
 107         regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL),
 108         regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV),
 109         regmap_reg_range(SLG51000_LDO1_MISC1, SLG51000_LDO1_VSEL_ACTUAL),
 110         regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_IRQ_MASK),
 111         regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL),
 112         regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV),
 113         regmap_reg_range(SLG51000_LDO2_MISC1, SLG51000_LDO2_VSEL_ACTUAL),
 114         regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_IRQ_MASK),
 115         regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL),
 116         regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV),
 117         regmap_reg_range(SLG51000_LDO3_CONF1, SLG51000_LDO3_VSEL_ACTUAL),
 118         regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_IRQ_MASK),
 119         regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL),
 120         regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV),
 121         regmap_reg_range(SLG51000_LDO4_CONF1, SLG51000_LDO4_VSEL_ACTUAL),
 122         regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_IRQ_MASK),
 123         regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL),
 124         regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV),
 125         regmap_reg_range(SLG51000_LDO5_TRIM2, SLG51000_LDO5_TRIM2),
 126         regmap_reg_range(SLG51000_LDO5_CONF1, SLG51000_LDO5_VSEL_ACTUAL),
 127         regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_IRQ_MASK),
 128         regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL),
 129         regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV),
 130         regmap_reg_range(SLG51000_LDO6_TRIM2, SLG51000_LDO6_TRIM2),
 131         regmap_reg_range(SLG51000_LDO6_CONF1, SLG51000_LDO6_VSEL_ACTUAL),
 132         regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_IRQ_MASK),
 133         regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL),
 134         regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV),
 135         regmap_reg_range(SLG51000_LDO7_CONF1, SLG51000_LDO7_VSEL_ACTUAL),
 136         regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_IRQ_MASK),
 137         regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT),
 138         regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK),
 139         regmap_reg_range(SLG51000_OTP_LOCK_OTP_PROG, SLG51000_OTP_LOCK_CTRL),
 140         regmap_reg_range(SLG51000_LOCK_GLOBAL_LOCK_CTRL1,
 141                          SLG51000_LOCK_GLOBAL_LOCK_CTRL1),
 142 };
 143
 144 static const struct regmap_range slg51000_volatile_ranges[] = {
 145         regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_STATUS),
 146         regmap_reg_range(SLG51000_IO_GPIO_STATUS, SLG51000_IO_GPIO_STATUS),
 147         regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS),
 148         regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS),
 149         regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS),
 150         regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS),
 151         regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS),
 152         regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS),
 153         regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS),
 154         regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT),
 155 };
 156
 157 static const struct regmap_access_table slg51000_writeable_table = {
 158         .yes_ranges     = slg51000_writeable_ranges,
 159         .n_yes_ranges   = ARRAY_SIZE(slg51000_writeable_ranges),
 160 };
 161
 162 static const struct regmap_access_table slg51000_readable_table = {
 163         .yes_ranges     = slg51000_readable_ranges,
 164         .n_yes_ranges   = ARRAY_SIZE(slg51000_readable_ranges),
 165 };
 166
 167 static const struct regmap_access_table slg51000_volatile_table = {
 168         .yes_ranges     = slg51000_volatile_ranges,
 169         .n_yes_ranges   = ARRAY_SIZE(slg51000_volatile_ranges),
 170 };
 171
 172 static const struct regmap_config slg51000_regmap_config = {
 173         .reg_bits = 16,
 174         .val_bits = 8,
 175         .max_register = 0x8000,
 176         .wr_table = &slg51000_writeable_table,
 177         .rd_table = &slg51000_readable_table,
 178         .volatile_table = &slg51000_volatile_table,
 179 };
 180
 181 static const struct regulator_ops slg51000_regl_ops = {
 182         .enable = regulator_enable_regmap,
 183         .disable = regulator_disable_regmap,
 184         .is_enabled = regulator_is_enabled_regmap,
 185         .list_voltage = regulator_list_voltage_linear,
 186         .map_voltage = regulator_map_voltage_linear,
 187         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 188         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 189 };
 190
 191 static const struct regulator_ops slg51000_switch_ops = {
 192         .enable = regulator_enable_regmap,
 193         .disable = regulator_disable_regmap,
 194         .is_enabled = regulator_is_enabled_regmap,
 195 };
 196
 197 static int slg51000_of_parse_cb(struct device_node *np,
 198                                 const struct regulator_desc *desc,
 199                                 struct regulator_config *config)
 200 {
 201         struct slg51000 *chip = config->driver_data;
 202         struct gpio_desc *ena_gpiod;
 203         enum gpiod_flags gflags = GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_NONEXCLUSIVE;
 204
 205         ena_gpiod = devm_gpiod_get_from_of_node(chip->dev, np,
 206                                                 "enable-gpios", 0,
 207                                                 gflags, "gpio-en-ldo");
 208         if (!IS_ERR(ena_gpiod)) {
 209                 config->ena_gpiod = ena_gpiod;
 210                 devm_gpiod_unhinge(chip->dev, config->ena_gpiod);
 211         }
 212
 213         return 0;
 214 }
 215
 216 #define SLG51000_REGL_DESC(_id, _name, _s_name, _min, _step) \
 217         [SLG51000_REGULATOR_##_id] = {                             \
 218                 .name = #_name,                                    \
 219                 .supply_name = _s_name,                            \
 220                 .id = SLG51000_REGULATOR_##_id,                    \
 221                 .of_match = of_match_ptr(#_name),                  \
 222                 .of_parse_cb = slg51000_of_parse_cb,               \
 223                 .ops = &slg51000_regl_ops,                         \
 224                 .regulators_node = of_match_ptr("regulators"),     \
 225                 .n_voltages = 256,                                 \
 226                 .min_uV = _min,                                    \
 227                 .uV_step = _step,                                  \
 228                 .linear_min_sel = 0,                               \
 229                 .vsel_mask = SLG51000_VSEL_MASK,                   \
 230                 .vsel_reg = SLG51000_##_id##_VSEL,                 \
 231                 .enable_reg = SLG51000_SYSCTL_MATRIX_CONF_A,       \
 232                 .enable_mask = BIT(SLG51000_REGULATOR_##_id),      \
 233                 .type = REGULATOR_VOLTAGE,                         \
 234                 .owner = THIS_MODULE,                              \
 235         }
 236
 237 static struct regulator_desc regls_desc[SLG51000_MAX_REGULATORS] = {
 238         SLG51000_REGL_DESC(LDO1, ldo1, NULL,   2400000,  5000),
 239         SLG51000_REGL_DESC(LDO2, ldo2, NULL,   2400000,  5000),
 240         SLG51000_REGL_DESC(LDO3, ldo3, "vin3", 1200000, 10000),
 241         SLG51000_REGL_DESC(LDO4, ldo4, "vin4", 1200000, 10000),
 242         SLG51000_REGL_DESC(LDO5, ldo5, "vin5",  400000,  5000),
 243         SLG51000_REGL_DESC(LDO6, ldo6, "vin6",  400000,  5000),
 244         SLG51000_REGL_DESC(LDO7, ldo7, "vin7", 1200000, 10000),
 245 };
 246
 247 static int slg51000_regulator_init(struct slg51000 *chip)
 248 {
 249         struct regulator_config config = { };
 250         struct regulator_desc *rdesc;
 251         unsigned int reg, val;
 252         u8 vsel_range[2];
 253         int id, ret = 0;
 254         const unsigned int min_regs[SLG51000_MAX_REGULATORS] = {
 255                 SLG51000_LDO1_MINV, SLG51000_LDO2_MINV, SLG51000_LDO3_MINV,
 256                 SLG51000_LDO4_MINV, SLG51000_LDO5_MINV, SLG51000_LDO6_MINV,
 257                 SLG51000_LDO7_MINV,
 258         };
 259
 260         for (id = 0; id < SLG51000_MAX_REGULATORS; id++) {
 261                 chip->rdesc[id] = &regls_desc[id];
 262                 rdesc = chip->rdesc[id];
 263                 config.regmap = chip->regmap;
 264                 config.dev = chip->dev;
 265                 config.driver_data = chip;
 266
 267                 ret = regmap_bulk_read(chip->regmap, min_regs[id],
 268                                        vsel_range, 2);
 269                 if (ret < 0) {
 270                         dev_err(chip->dev,
 271                                 "Failed to read the MIN register\n");
 272                         return ret;
 273                 }
 274
 275                 switch (id) {
 276                 case SLG51000_REGULATOR_LDO1:
 277                 case SLG51000_REGULATOR_LDO2:
 278                         if (id == SLG51000_REGULATOR_LDO1)
 279                                 reg = SLG51000_LDO1_MISC1;
 280                         else
 281                                 reg = SLG51000_LDO2_MISC1;
 282
 283                         ret = regmap_read(chip->regmap, reg, &val);
 284                         if (ret < 0) {
 285                                 dev_err(chip->dev,
 286                                         "Failed to read voltage range of ldo%d\n",
 287                                         id + 1);
 288                                 return ret;
 289                         }
 290
 291                         rdesc->linear_min_sel = vsel_range[0];
 292                         rdesc->n_voltages = vsel_range[1] + 1;
 293                         if (val & SLG51000_SEL_VRANGE_MASK)
 294                                 rdesc->min_uV = SLG51000_LDOHP_HV_MIN
 295                                                 + (vsel_range[0]
 296                                                    * rdesc->uV_step);
 297                         else
 298                                 rdesc->min_uV = SLG51000_LDOHP_LV_MIN
 299                                                 + (vsel_range[0]
 300                                                    * rdesc->uV_step);
 301                         break;
 302
 303                 case SLG51000_REGULATOR_LDO5:
 304                 case SLG51000_REGULATOR_LDO6:
 305                         if (id == SLG51000_REGULATOR_LDO5)
 306                                 reg = SLG51000_LDO5_TRIM2;
 307                         else
 308                                 reg = SLG51000_LDO6_TRIM2;
 309
 310                         ret = regmap_read(chip->regmap, reg, &val);
 311                         if (ret < 0) {
 312                                 dev_err(chip->dev,
 313                                         "Failed to read LDO mode register\n");
 314                                 return ret;
 315                         }
 316
 317                         if (val & SLG51000_SEL_BYP_MODE_MASK) {
 318                                 rdesc->ops = &slg51000_switch_ops;
 319                                 rdesc->n_voltages = 0;
 320                                 rdesc->min_uV = 0;
 321                                 rdesc->uV_step = 0;
 322                                 rdesc->linear_min_sel = 0;
 323                                 break;
 324                         }
 325                         /* Fall through - to the check below.*/
 326
 327                 default:
 328                         rdesc->linear_min_sel = vsel_range[0];
 329                         rdesc->n_voltages = vsel_range[1] + 1;
 330                         rdesc->min_uV = rdesc->min_uV
 331                                         + (vsel_range[0] * rdesc->uV_step);
 332                         break;
 333                 }
 334
 335                 chip->rdev[id] = devm_regulator_register(chip->dev, rdesc,
 336                                                          &config);
 337                 if (IS_ERR(chip->rdev[id])) {
 338                         ret = PTR_ERR(chip->rdev[id]);
 339                         dev_err(chip->dev,
 340                                 "Failed to register regulator(%s):%d\n",
 341                                 chip->rdesc[id]->name, ret);
 342                         return ret;
 343                 }
 344         }
 345
 346         return 0;
 347 }
 348
 349 static irqreturn_t slg51000_irq_handler(int irq, void *data)
 350 {
 351         struct slg51000 *chip = data;
 352         struct regmap *regmap = chip->regmap;
 353         enum { R0 = 0, R1, R2, REG_MAX };
 354         u8 evt[SLG51000_MAX_EVT_REGISTER][REG_MAX];
 355         int ret, i, handled = IRQ_NONE;
 356         unsigned int evt_otp, mask_otp;
 357
 358         /* Read event[R0], status[R1] and mask[R2] register */
 359         for (i = 0; i < SLG51000_MAX_EVT_REGISTER; i++) {
 360                 ret = regmap_bulk_read(regmap, es_reg[i].ereg, evt[i], REG_MAX);
 361                 if (ret < 0) {
 362                         dev_err(chip->dev,
 363                                 "Failed to read event registers(%d)\n", ret);
 364                         return IRQ_NONE;
 365                 }
 366         }
 367
 368         ret = regmap_read(regmap, SLG51000_OTP_EVENT, &evt_otp);
 369         if (ret < 0) {
 370                 dev_err(chip->dev,
 371                         "Failed to read otp event registers(%d)\n", ret);
 372                 return IRQ_NONE;
 373         }
 374
 375         ret = regmap_read(regmap, SLG51000_OTP_IRQ_MASK, &mask_otp);
 376         if (ret < 0) {
 377                 dev_err(chip->dev,
 378                         "Failed to read otp mask register(%d)\n", ret);
 379                 return IRQ_NONE;
 380         }
 381
 382         if ((evt_otp & SLG51000_EVT_CRC_MASK) &&
 383             !(mask_otp & SLG51000_IRQ_CRC_MASK)) {
 384                 dev_info(chip->dev,
 385                          "OTP has been read or OTP crc is not zero\n");
 386                 handled = IRQ_HANDLED;
 387         }
 388
 389         for (i = 0; i < SLG51000_MAX_REGULATORS; i++) {
 390                 if (!(evt[i][R2] & SLG51000_IRQ_ILIM_FLAG_MASK) &&
 391                     (evt[i][R0] & SLG51000_EVT_ILIM_FLAG_MASK)) {
 392                         regulator_lock(chip->rdev[i]);
 393                         regulator_notifier_call_chain(chip->rdev[i],
 394                                             REGULATOR_EVENT_OVER_CURRENT, NULL);
 395                         regulator_unlock(chip->rdev[i]);
 396
 397                         if (evt[i][R1] & SLG51000_STA_ILIM_FLAG_MASK)
 398                                 dev_warn(chip->dev,
 399                                          "Over-current limit(ldo%d)\n", i + 1);
 400                         handled = IRQ_HANDLED;
 401                 }
 402         }
 403
 404         if (!(evt[SLG51000_SCTL_EVT][R2] & SLG51000_IRQ_HIGH_TEMP_WARN_MASK) &&
 405             (evt[SLG51000_SCTL_EVT][R0] & SLG51000_EVT_HIGH_TEMP_WARN_MASK)) {
 406                 for (i = 0; i < SLG51000_MAX_REGULATORS; i++) {
 407                         if (!(evt[i][R1] & SLG51000_STA_ILIM_FLAG_MASK) &&
 408                             (evt[i][R1] & SLG51000_STA_VOUT_OK_FLAG_MASK)) {
 409                                 regulator_lock(chip->rdev[i]);
 410                                 regulator_notifier_call_chain(chip->rdev[i],
 411                                                REGULATOR_EVENT_OVER_TEMP, NULL);
 412                                 regulator_unlock(chip->rdev[i]);
 413                         }
 414                 }
 415                 handled = IRQ_HANDLED;
 416                 if (evt[SLG51000_SCTL_EVT][R1] &
 417                     SLG51000_STA_HIGH_TEMP_WARN_MASK)
 418                         dev_warn(chip->dev, "High temperature warning!\n");
 419         }
 420
 421         return handled;
 422 }
 423
 424 static void slg51000_clear_fault_log(struct slg51000 *chip)
 425 {
 426         unsigned int val = 0;
 427         int ret = 0;
 428
 429         ret = regmap_read(chip->regmap, SLG51000_SYSCTL_FAULT_LOG1, &val);
 430         if (ret < 0) {
 431                 dev_err(chip->dev, "Failed to read Fault log register\n");
 432                 return;
 433         }
 434
 435         if (val & SLG51000_FLT_OVER_TEMP_MASK)
 436                 dev_dbg(chip->dev, "Fault log: FLT_OVER_TEMP\n");
 437         if (val & SLG51000_FLT_POWER_SEQ_CRASH_REQ_MASK)
 438                 dev_dbg(chip->dev, "Fault log: FLT_POWER_SEQ_CRASH_REQ\n");
 439         if (val & SLG51000_FLT_RST_MASK)
 440                 dev_dbg(chip->dev, "Fault log: FLT_RST\n");
 441         if (val & SLG51000_FLT_POR_MASK)
 442                 dev_dbg(chip->dev, "Fault log: FLT_POR\n");
 443 }
 444
 445 static int slg51000_i2c_probe(struct i2c_client *client,
 446                               const struct i2c_device_id *id)
 447 {
 448         struct device *dev = &client->dev;
 449         struct slg51000 *chip;
 450         struct gpio_desc *cs_gpiod;
 451         int error, ret;
 452
 453         chip = devm_kzalloc(dev, sizeof(struct slg51000), GFP_KERNEL);
 454         if (!chip)
 455                 return -ENOMEM;
 456
 457         cs_gpiod = devm_gpiod_get_optional(dev, "dlg,cs",
 458                                            GPIOD_OUT_HIGH |
 459                                                 GPIOD_FLAGS_BIT_NONEXCLUSIVE);
 460         if (IS_ERR(cs_gpiod))
 461                 return PTR_ERR(cs_gpiod);
 462
 463         if (cs_gpiod) {
 464                 dev_info(dev, "Found chip selector property\n");
 465                 chip->cs_gpiod = cs_gpiod;
 466         }
 467
 468         i2c_set_clientdata(client, chip);
 469         chip->chip_irq = client->irq;
 470         chip->dev = dev;
 471         chip->regmap = devm_regmap_init_i2c(client, &slg51000_regmap_config);
 472         if (IS_ERR(chip->regmap)) {
 473                 error = PTR_ERR(chip->regmap);
 474                 dev_err(dev, "Failed to allocate register map: %d\n",
 475                         error);
 476                 return error;
 477         }
 478
 479         ret = slg51000_regulator_init(chip);
 480         if (ret < 0) {
 481                 dev_err(chip->dev, "Failed to init regulator(%d)\n", ret);
 482                 return ret;
 483         }
 484
 485         slg51000_clear_fault_log(chip);
 486
 487         if (chip->chip_irq) {
 488                 ret = devm_request_threaded_irq(dev, chip->chip_irq, NULL,
 489                                                 slg51000_irq_handler,
 490                                                 (IRQF_TRIGGER_HIGH |
 491                                                 IRQF_ONESHOT),
 492                                                 "slg51000-irq", chip);
 493                 if (ret != 0) {
 494                         dev_err(dev, "Failed to request IRQ: %d\n",
 495                                 chip->chip_irq);
 496                         return ret;
 497                 }
 498         } else {
 499                 dev_info(dev, "No IRQ configured\n");
 500         }
 501
 502         return ret;
 503 }
 504
 505 static const struct i2c_device_id slg51000_i2c_id[] = {
 506         {"slg51000", 0},
 507         {},
 508 };
 509 MODULE_DEVICE_TABLE(i2c, slg51000_i2c_id);
 510
 511 static struct i2c_driver slg51000_regulator_driver = {
 512         .driver = {
 513                 .name = "slg51000-regulator",
 514         },
 515         .probe = slg51000_i2c_probe,
 516         .id_table = slg51000_i2c_id,
 517 };
 518
 519 module_i2c_driver(slg51000_regulator_driver);
 520
 521 MODULE_AUTHOR("Eric Jeong <eric.jeong.opensource@diasemi.com>");
 522 MODULE_DESCRIPTION("SLG51000 regulator driver");
 523 MODULE_LICENSE("GPL");
 524