drivers/regulator/qcom_smd-regulator.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2015, Sony Mobile Communications AB.
   4  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/of.h>
   9 #include <linux/of_device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/regulator/driver.h>
  12 #include <linux/soc/qcom/smd-rpm.h>
  13
  14 struct qcom_rpm_reg {
  15         struct device *dev;
  16
  17         struct qcom_smd_rpm *rpm;
  18
  19         u32 type;
  20         u32 id;
  21
  22         struct regulator_desc desc;
  23
  24         int is_enabled;
  25         int uV;
  26         u32 load;
  27
  28         unsigned int enabled_updated:1;
  29         unsigned int uv_updated:1;
  30         unsigned int load_updated:1;
  31 };
  32
  33 struct rpm_regulator_req {
  34         __le32 key;
  35         __le32 nbytes;
  36         __le32 value;
  37 };
  38
  39 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
  40 #define RPM_KEY_UV      0x00007675 /* "uv" */
  41 #define RPM_KEY_MA      0x0000616d /* "ma" */
  42
  43 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
  44 {
  45         struct rpm_regulator_req req[3];
  46         int reqlen = 0;
  47         int ret;
  48
  49         if (vreg->enabled_updated) {
  50                 req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
  51                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  52                 req[reqlen].value = cpu_to_le32(vreg->is_enabled);
  53                 reqlen++;
  54         }
  55
  56         if (vreg->uv_updated && vreg->is_enabled) {
  57                 req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
  58                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  59                 req[reqlen].value = cpu_to_le32(vreg->uV);
  60                 reqlen++;
  61         }
  62
  63         if (vreg->load_updated && vreg->is_enabled) {
  64                 req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
  65                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  66                 req[reqlen].value = cpu_to_le32(vreg->load / 1000);
  67                 reqlen++;
  68         }
  69
  70         if (!reqlen)
  71                 return 0;
  72
  73         ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
  74                                  vreg->type, vreg->id,
  75                                  req, sizeof(req[0]) * reqlen);
  76         if (!ret) {
  77                 vreg->enabled_updated = 0;
  78                 vreg->uv_updated = 0;
  79                 vreg->load_updated = 0;
  80         }
  81
  82         return ret;
  83 }
  84
  85 static int rpm_reg_enable(struct regulator_dev *rdev)
  86 {
  87         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  88         int ret;
  89
  90         vreg->is_enabled = 1;
  91         vreg->enabled_updated = 1;
  92
  93         ret = rpm_reg_write_active(vreg);
  94         if (ret)
  95                 vreg->is_enabled = 0;
  96
  97         return ret;
  98 }
  99
 100 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
 101 {
 102         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 103
 104         return vreg->is_enabled;
 105 }
 106
 107 static int rpm_reg_disable(struct regulator_dev *rdev)
 108 {
 109         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 110         int ret;
 111
 112         vreg->is_enabled = 0;
 113         vreg->enabled_updated = 1;
 114
 115         ret = rpm_reg_write_active(vreg);
 116         if (ret)
 117                 vreg->is_enabled = 1;
 118
 119         return ret;
 120 }
 121
 122 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
 123 {
 124         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 125
 126         return vreg->uV;
 127 }
 128
 129 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
 130                                int min_uV,
 131                                int max_uV,
 132                                unsigned *selector)
 133 {
 134         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 135         int ret;
 136         int old_uV = vreg->uV;
 137
 138         vreg->uV = min_uV;
 139         vreg->uv_updated = 1;
 140
 141         ret = rpm_reg_write_active(vreg);
 142         if (ret)
 143                 vreg->uV = old_uV;
 144
 145         return ret;
 146 }
 147
 148 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
 149 {
 150         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 151         u32 old_load = vreg->load;
 152         int ret;
 153
 154         vreg->load = load_uA;
 155         vreg->load_updated = 1;
 156         ret = rpm_reg_write_active(vreg);
 157         if (ret)
 158                 vreg->load = old_load;
 159
 160         return ret;
 161 }
 162
 163 static const struct regulator_ops rpm_smps_ldo_ops = {
 164         .enable = rpm_reg_enable,
 165         .disable = rpm_reg_disable,
 166         .is_enabled = rpm_reg_is_enabled,
 167         .list_voltage = regulator_list_voltage_linear_range,
 168
 169         .get_voltage = rpm_reg_get_voltage,
 170         .set_voltage = rpm_reg_set_voltage,
 171
 172         .set_load = rpm_reg_set_load,
 173 };
 174
 175 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
 176         .enable = rpm_reg_enable,
 177         .disable = rpm_reg_disable,
 178         .is_enabled = rpm_reg_is_enabled,
 179
 180         .get_voltage = rpm_reg_get_voltage,
 181         .set_voltage = rpm_reg_set_voltage,
 182
 183         .set_load = rpm_reg_set_load,
 184 };
 185
 186 static const struct regulator_ops rpm_switch_ops = {
 187         .enable = rpm_reg_enable,
 188         .disable = rpm_reg_disable,
 189         .is_enabled = rpm_reg_is_enabled,
 190 };
 191
 192 static const struct regulator_ops rpm_bob_ops = {
 193         .enable = rpm_reg_enable,
 194         .disable = rpm_reg_disable,
 195         .is_enabled = rpm_reg_is_enabled,
 196
 197         .get_voltage = rpm_reg_get_voltage,
 198         .set_voltage = rpm_reg_set_voltage,
 199 };
 200
 201 static const struct regulator_ops rpm_mp5496_ops = {
 202         .enable = rpm_reg_enable,
 203         .disable = rpm_reg_disable,
 204         .is_enabled = rpm_reg_is_enabled,
 205         .list_voltage = regulator_list_voltage_linear_range,
 206
 207         .set_voltage = rpm_reg_set_voltage,
 208 };
 209
 210 static const struct regulator_desc pma8084_hfsmps = {
 211         .linear_ranges = (struct linear_range[]) {
 212                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
 213                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 214         },
 215         .n_linear_ranges = 2,
 216         .n_voltages = 159,
 217         .ops = &rpm_smps_ldo_ops,
 218 };
 219
 220 static const struct regulator_desc pma8084_ftsmps = {
 221         .linear_ranges = (struct linear_range[]) {
 222                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 223                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 224         },
 225         .n_linear_ranges = 2,
 226         .n_voltages = 262,
 227         .ops = &rpm_smps_ldo_ops,
 228 };
 229
 230 static const struct regulator_desc pma8084_pldo = {
 231         .linear_ranges = (struct linear_range[]) {
 232                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 233                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 234                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 235         },
 236         .n_linear_ranges = 3,
 237         .n_voltages = 164,
 238         .ops = &rpm_smps_ldo_ops,
 239 };
 240
 241 static const struct regulator_desc pma8084_nldo = {
 242         .linear_ranges = (struct linear_range[]) {
 243                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 244         },
 245         .n_linear_ranges = 1,
 246         .n_voltages = 64,
 247         .ops = &rpm_smps_ldo_ops,
 248 };
 249
 250 static const struct regulator_desc pma8084_switch = {
 251         .ops = &rpm_switch_ops,
 252 };
 253
 254 static const struct regulator_desc pm8226_hfsmps = {
 255         .linear_ranges = (struct linear_range[]) {
 256                 REGULATOR_LINEAR_RANGE(375000,   0,  95, 12500),
 257                 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
 258         },
 259         .n_linear_ranges = 2,
 260         .n_voltages = 159,
 261         .ops = &rpm_smps_ldo_ops,
 262 };
 263
 264 static const struct regulator_desc pm8226_ftsmps = {
 265         .linear_ranges = (struct linear_range[]) {
 266                 REGULATOR_LINEAR_RANGE(350000,    0, 184,  5000),
 267                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 268         },
 269         .n_linear_ranges = 2,
 270         .n_voltages = 262,
 271         .ops = &rpm_smps_ldo_ops,
 272 };
 273
 274 static const struct regulator_desc pm8226_pldo = {
 275         .linear_ranges = (struct linear_range[]) {
 276                 REGULATOR_LINEAR_RANGE(750000,    0,  63, 12500),
 277                 REGULATOR_LINEAR_RANGE(1550000,  64, 126, 25000),
 278                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 279         },
 280         .n_linear_ranges = 3,
 281         .n_voltages = 164,
 282         .ops = &rpm_smps_ldo_ops,
 283 };
 284
 285 static const struct regulator_desc pm8226_nldo = {
 286         .linear_ranges = (struct linear_range[]) {
 287                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 288         },
 289         .n_linear_ranges = 1,
 290         .n_voltages = 64,
 291         .ops = &rpm_smps_ldo_ops,
 292 };
 293
 294 static const struct regulator_desc pm8226_switch = {
 295         .ops = &rpm_switch_ops,
 296 };
 297
 298 static const struct regulator_desc pm8x41_hfsmps = {
 299         .linear_ranges = (struct linear_range[]) {
 300                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 301                 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
 302         },
 303         .n_linear_ranges = 2,
 304         .n_voltages = 159,
 305         .ops = &rpm_smps_ldo_ops,
 306 };
 307
 308 static const struct regulator_desc pm8841_ftsmps = {
 309         .linear_ranges = (struct linear_range[]) {
 310                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 311                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 312         },
 313         .n_linear_ranges = 2,
 314         .n_voltages = 262,
 315         .ops = &rpm_smps_ldo_ops,
 316 };
 317
 318 static const struct regulator_desc pm8941_boost = {
 319         .linear_ranges = (struct linear_range[]) {
 320                 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
 321         },
 322         .n_linear_ranges = 1,
 323         .n_voltages = 31,
 324         .ops = &rpm_smps_ldo_ops,
 325 };
 326
 327 static const struct regulator_desc pm8941_pldo = {
 328         .linear_ranges = (struct linear_range[]) {
 329                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 330                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 331                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 332         },
 333         .n_linear_ranges = 3,
 334         .n_voltages = 164,
 335         .ops = &rpm_smps_ldo_ops,
 336 };
 337
 338 static const struct regulator_desc pm8941_nldo = {
 339         .linear_ranges = (struct linear_range[]) {
 340                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 341         },
 342         .n_linear_ranges = 1,
 343         .n_voltages = 64,
 344         .ops = &rpm_smps_ldo_ops,
 345 };
 346
 347 static const struct regulator_desc pm8941_lnldo = {
 348         .fixed_uV = 1740000,
 349         .n_voltages = 1,
 350         .ops = &rpm_smps_ldo_ops_fixed,
 351 };
 352
 353 static const struct regulator_desc pm8941_switch = {
 354         .ops = &rpm_switch_ops,
 355 };
 356
 357 static const struct regulator_desc pm8916_pldo = {
 358         .linear_ranges = (struct linear_range[]) {
 359                 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
 360         },
 361         .n_linear_ranges = 1,
 362         .n_voltages = 209,
 363         .ops = &rpm_smps_ldo_ops,
 364 };
 365
 366 static const struct regulator_desc pm8916_nldo = {
 367         .linear_ranges = (struct linear_range[]) {
 368                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 369         },
 370         .n_linear_ranges = 1,
 371         .n_voltages = 94,
 372         .ops = &rpm_smps_ldo_ops,
 373 };
 374
 375 static const struct regulator_desc pm8916_buck_lvo_smps = {
 376         .linear_ranges = (struct linear_range[]) {
 377                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 378                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
 379         },
 380         .n_linear_ranges = 2,
 381         .n_voltages = 128,
 382         .ops = &rpm_smps_ldo_ops,
 383 };
 384
 385 static const struct regulator_desc pm8916_buck_hvo_smps = {
 386         .linear_ranges = (struct linear_range[]) {
 387                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
 388         },
 389         .n_linear_ranges = 1,
 390         .n_voltages = 32,
 391         .ops = &rpm_smps_ldo_ops,
 392 };
 393
 394 static const struct regulator_desc pm8950_hfsmps = {
 395         .linear_ranges = (struct linear_range[]) {
 396                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 397                 REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
 398         },
 399         .n_linear_ranges = 2,
 400         .n_voltages = 128,
 401         .ops = &rpm_smps_ldo_ops,
 402 };
 403
 404 static const struct regulator_desc pm8950_ftsmps2p5 = {
 405         .linear_ranges = (struct linear_range[]) {
 406                 REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
 407                 REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
 408         },
 409         .n_linear_ranges = 2,
 410         .n_voltages = 461,
 411         .ops = &rpm_smps_ldo_ops,
 412 };
 413
 414 static const struct regulator_desc pm8950_ult_nldo = {
 415         .linear_ranges = (struct linear_range[]) {
 416                 REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
 417         },
 418         .n_linear_ranges = 1,
 419         .n_voltages = 203,
 420         .ops = &rpm_smps_ldo_ops,
 421 };
 422
 423 static const struct regulator_desc pm8950_ult_pldo = {
 424         .linear_ranges = (struct linear_range[]) {
 425                 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
 426         },
 427         .n_linear_ranges = 1,
 428         .n_voltages = 128,
 429         .ops = &rpm_smps_ldo_ops,
 430 };
 431
 432 static const struct regulator_desc pm8950_pldo_lv = {
 433         .linear_ranges = (struct linear_range[]) {
 434                 REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
 435         },
 436         .n_linear_ranges = 1,
 437         .n_voltages = 17,
 438         .ops = &rpm_smps_ldo_ops,
 439 };
 440
 441 static const struct regulator_desc pm8950_pldo = {
 442         .linear_ranges = (struct linear_range[]) {
 443                 REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
 444         },
 445         .n_linear_ranges = 1,
 446         .n_voltages = 165,
 447         .ops = &rpm_smps_ldo_ops,
 448 };
 449
 450 static const struct regulator_desc pm8953_lnldo = {
 451         .linear_ranges = (struct linear_range[]) {
 452                 REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000),
 453                 REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000),
 454         },
 455         .n_linear_ranges = 2,
 456         .n_voltages = 16,
 457         .ops = &rpm_smps_ldo_ops,
 458 };
 459
 460 static const struct regulator_desc pm8953_ult_nldo = {
 461         .linear_ranges = (struct linear_range[]) {
 462                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 463         },
 464         .n_linear_ranges = 1,
 465         .n_voltages = 94,
 466         .ops = &rpm_smps_ldo_ops,
 467 };
 468
 469 static const struct regulator_desc pm8994_hfsmps = {
 470         .linear_ranges = (struct linear_range[]) {
 471                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 472                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 473         },
 474         .n_linear_ranges = 2,
 475         .n_voltages = 159,
 476         .ops = &rpm_smps_ldo_ops,
 477 };
 478
 479 static const struct regulator_desc pm8994_ftsmps = {
 480         .linear_ranges = (struct linear_range[]) {
 481                 REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
 482                 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
 483         },
 484         .n_linear_ranges = 2,
 485         .n_voltages = 350,
 486         .ops = &rpm_smps_ldo_ops,
 487 };
 488
 489 static const struct regulator_desc pm8994_nldo = {
 490         .linear_ranges = (struct linear_range[]) {
 491                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 492         },
 493         .n_linear_ranges = 1,
 494         .n_voltages = 64,
 495         .ops = &rpm_smps_ldo_ops,
 496 };
 497
 498 static const struct regulator_desc pm8994_pldo = {
 499         .linear_ranges = (struct linear_range[]) {
 500                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 501                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 502                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 503         },
 504         .n_linear_ranges = 3,
 505         .n_voltages = 164,
 506         .ops = &rpm_smps_ldo_ops,
 507 };
 508
 509 static const struct regulator_desc pm8994_switch = {
 510         .ops = &rpm_switch_ops,
 511 };
 512
 513 static const struct regulator_desc pm8994_lnldo = {
 514         .fixed_uV = 1740000,
 515         .n_voltages = 1,
 516         .ops = &rpm_smps_ldo_ops_fixed,
 517 };
 518
 519 static const struct regulator_desc pmi8994_ftsmps = {
 520         .linear_ranges = (struct linear_range[]) {
 521                 REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
 522                 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
 523         },
 524         .n_linear_ranges = 2,
 525         .n_voltages = 350,
 526         .ops = &rpm_smps_ldo_ops,
 527 };
 528
 529 static const struct regulator_desc pmi8994_hfsmps = {
 530         .linear_ranges = (struct linear_range[]) {
 531                 REGULATOR_LINEAR_RANGE(350000,  0,  80, 12500),
 532                 REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
 533         },
 534         .n_linear_ranges = 2,
 535         .n_voltages = 142,
 536         .ops = &rpm_smps_ldo_ops,
 537 };
 538
 539 static const struct regulator_desc pmi8994_bby = {
 540         .linear_ranges = (struct linear_range[]) {
 541                 REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
 542         },
 543         .n_linear_ranges = 1,
 544         .n_voltages = 45,
 545         .ops = &rpm_bob_ops,
 546 };
 547
 548 static const struct regulator_desc pm8998_ftsmps = {
 549         .linear_ranges = (struct linear_range[]) {
 550                 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
 551         },
 552         .n_linear_ranges = 1,
 553         .n_voltages = 259,
 554         .ops = &rpm_smps_ldo_ops,
 555 };
 556
 557 static const struct regulator_desc pm8998_hfsmps = {
 558         .linear_ranges = (struct linear_range[]) {
 559                 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
 560         },
 561         .n_linear_ranges = 1,
 562         .n_voltages = 216,
 563         .ops = &rpm_smps_ldo_ops,
 564 };
 565
 566 static const struct regulator_desc pm8998_nldo = {
 567         .linear_ranges = (struct linear_range[]) {
 568                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 569         },
 570         .n_linear_ranges = 1,
 571         .n_voltages = 128,
 572         .ops = &rpm_smps_ldo_ops,
 573 };
 574
 575 static const struct regulator_desc pm8998_pldo = {
 576         .linear_ranges = (struct linear_range[]) {
 577                 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
 578         },
 579         .n_linear_ranges = 1,
 580         .n_voltages = 256,
 581         .ops = &rpm_smps_ldo_ops,
 582 };
 583
 584 static const struct regulator_desc pm8998_pldo_lv = {
 585         .linear_ranges = (struct linear_range[]) {
 586                 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
 587         },
 588         .n_linear_ranges = 1,
 589         .n_voltages = 128,
 590         .ops = &rpm_smps_ldo_ops,
 591 };
 592
 593 static const struct regulator_desc pm8998_switch = {
 594         .ops = &rpm_switch_ops,
 595 };
 596
 597 static const struct regulator_desc pmi8998_bob = {
 598         .linear_ranges = (struct linear_range[]) {
 599                 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
 600         },
 601         .n_linear_ranges = 1,
 602         .n_voltages = 84,
 603         .ops = &rpm_bob_ops,
 604 };
 605
 606 static const struct regulator_desc pm660_ftsmps = {
 607         .linear_ranges = (struct linear_range[]) {
 608                 REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000),
 609         },
 610         .n_linear_ranges = 1,
 611         .n_voltages = 200,
 612         .ops = &rpm_smps_ldo_ops,
 613 };
 614
 615 static const struct regulator_desc pm660_hfsmps = {
 616         .linear_ranges = (struct linear_range[]) {
 617                 REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000),
 618         },
 619         .n_linear_ranges = 1,
 620         .n_voltages = 217,
 621         .ops = &rpm_smps_ldo_ops,
 622 };
 623
 624 static const struct regulator_desc pm660_ht_nldo = {
 625         .linear_ranges = (struct linear_range[]) {
 626                 REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000),
 627         },
 628         .n_linear_ranges = 1,
 629         .n_voltages = 125,
 630         .ops = &rpm_smps_ldo_ops,
 631 };
 632
 633 static const struct regulator_desc pm660_ht_lvpldo = {
 634         .linear_ranges = (struct linear_range[]) {
 635                 REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
 636         },
 637         .n_linear_ranges = 1,
 638         .n_voltages = 63,
 639         .ops = &rpm_smps_ldo_ops,
 640 };
 641
 642 static const struct regulator_desc pm660_nldo660 = {
 643         .linear_ranges = (struct linear_range[]) {
 644                 REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
 645         },
 646         .n_linear_ranges = 1,
 647         .n_voltages = 124,
 648         .ops = &rpm_smps_ldo_ops,
 649 };
 650
 651 static const struct regulator_desc pm660_pldo660 = {
 652         .linear_ranges = (struct linear_range[]) {
 653                 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
 654         },
 655         .n_linear_ranges = 1,
 656         .n_voltages = 256,
 657         .ops = &rpm_smps_ldo_ops,
 658 };
 659
 660 static const struct regulator_desc pm660l_bob = {
 661         .linear_ranges = (struct linear_range[]) {
 662                 REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000),
 663         },
 664         .n_linear_ranges = 1,
 665         .n_voltages = 85,
 666         .ops = &rpm_bob_ops,
 667 };
 668
 669 static const struct regulator_desc pms405_hfsmps3 = {
 670         .linear_ranges = (struct linear_range[]) {
 671                 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
 672         },
 673         .n_linear_ranges = 1,
 674         .n_voltages = 216,
 675         .ops = &rpm_smps_ldo_ops,
 676 };
 677
 678 static const struct regulator_desc pms405_nldo300 = {
 679         .linear_ranges = (struct linear_range[]) {
 680                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 681         },
 682         .n_linear_ranges = 1,
 683         .n_voltages = 128,
 684         .ops = &rpm_smps_ldo_ops,
 685 };
 686
 687 static const struct regulator_desc pms405_nldo1200 = {
 688         .linear_ranges = (struct linear_range[]) {
 689                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 690         },
 691         .n_linear_ranges = 1,
 692         .n_voltages = 128,
 693         .ops = &rpm_smps_ldo_ops,
 694 };
 695
 696 static const struct regulator_desc pms405_pldo50 = {
 697         .linear_ranges = (struct linear_range[]) {
 698                 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
 699         },
 700         .n_linear_ranges = 1,
 701         .n_voltages = 129,
 702         .ops = &rpm_smps_ldo_ops,
 703 };
 704
 705 static const struct regulator_desc pms405_pldo150 = {
 706         .linear_ranges = (struct linear_range[]) {
 707                 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
 708         },
 709         .n_linear_ranges = 1,
 710         .n_voltages = 129,
 711         .ops = &rpm_smps_ldo_ops,
 712 };
 713
 714 static const struct regulator_desc pms405_pldo600 = {
 715         .linear_ranges = (struct linear_range[]) {
 716                 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
 717         },
 718         .n_linear_ranges = 1,
 719         .n_voltages = 99,
 720         .ops = &rpm_smps_ldo_ops,
 721 };
 722
 723 static const struct regulator_desc mp5496_smpa2 = {
 724         .linear_ranges = (struct linear_range[]) {
 725                 REGULATOR_LINEAR_RANGE(725000, 0, 27, 12500),
 726         },
 727         .n_linear_ranges = 1,
 728         .n_voltages = 28,
 729         .ops = &rpm_mp5496_ops,
 730 };
 731
 732 static const struct regulator_desc mp5496_ldoa2 = {
 733         .linear_ranges = (struct linear_range[]) {
 734                 REGULATOR_LINEAR_RANGE(1800000, 0, 60, 25000),
 735         },
 736         .n_linear_ranges = 1,
 737         .n_voltages = 61,
 738         .ops = &rpm_mp5496_ops,
 739 };
 740
 741 struct rpm_regulator_data {
 742         const char *name;
 743         u32 type;
 744         u32 id;
 745         const struct regulator_desc *desc;
 746         const char *supply;
 747 };
 748
 749 static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
 750         { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" },
 751         { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
 752         {}
 753 };
 754
 755 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
 756         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
 757         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
 758         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
 759         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
 760         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
 761         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
 762         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
 763         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
 764         {}
 765 };
 766
 767 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
 768         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 769         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
 770         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
 771         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
 772         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
 773         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
 774         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
 775         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
 776         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
 777         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
 778         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
 779         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 780         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 781         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 782         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 783         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 784         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 785         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 786         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 787         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 788         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 789         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 790         {}
 791 };
 792
 793 static const struct rpm_regulator_data rpm_pm8226_regulators[] = {
 794         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" },
 795         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" },
 796         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" },
 797         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" },
 798         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" },
 799         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
 800         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
 801         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" },
 802         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
 803         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
 804         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 805         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 806         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 807         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 808         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" },
 809         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" },
 810         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" },
 811         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" },
 812         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" },
 813         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
 814         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
 815         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
 816         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
 817         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 818         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 819         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 820         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 821         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 822         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" },
 823         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" },
 824         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" },
 825         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 826         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 827         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" },
 828         {}
 829 };
 830
 831 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
 832         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
 833         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
 834         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
 835         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
 836
 837         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
 838         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
 839         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
 840         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
 841         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
 842         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 843         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
 844         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 845         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 846         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 847         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
 848         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 849         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 850         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 851         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 852         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 853         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 854         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 855         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 856         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 857         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
 858         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 859         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 860         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 861
 862         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 863         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 864         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 865
 866         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
 867         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
 868
 869         {}
 870 };
 871
 872 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
 873         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
 874         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
 875         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
 876         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
 877         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
 878         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
 879         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
 880         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
 881         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
 882         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
 883         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
 884         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
 885
 886         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
 887         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 888         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 889         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 890         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
 891         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 892         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
 893         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
 894         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 895         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 896         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
 897         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 898         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 899         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 900         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 901         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
 902         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
 903         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
 904         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
 905         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 906         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
 907         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
 908         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 909         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 910         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
 911         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 912         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 913
 914         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
 915         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
 916         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
 917         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
 918         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
 919
 920         {}
 921 };
 922
 923 static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
 924         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
 925         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
 926         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
 927         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
 928         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" },
 929         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
 930
 931         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
 932         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
 933         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
 934         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" },
 935         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
 936         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
 937         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
 938         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
 939         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
 940         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
 941         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
 942         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
 943         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
 944         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
 945         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
 946         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16"},
 947         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
 948         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
 949         { "l19", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l1_l19"},
 950         { "l20", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l20"},
 951         { "l21", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l21"},
 952         { "l22", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22"},
 953         { "l23", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l2_l23"},
 954         {}
 955 };
 956
 957 static const struct rpm_regulator_data rpm_pm8953_regulators[] = {
 958         {  "s1", QCOM_SMD_RPM_SMPA,  1, &pm8998_hfsmps, "vdd_s1" },
 959         {  "s2", QCOM_SMD_RPM_SMPA,  2, &pm8998_hfsmps, "vdd_s2" },
 960         {  "s3", QCOM_SMD_RPM_SMPA,  3, &pm8998_hfsmps, "vdd_s3" },
 961         {  "s4", QCOM_SMD_RPM_SMPA,  4, &pm8998_hfsmps, "vdd_s4" },
 962         {  "s5", QCOM_SMD_RPM_SMPA,  5, &pm8950_ftsmps2p5, "vdd_s5" },
 963         {  "s6", QCOM_SMD_RPM_SMPA,  6, &pm8950_ftsmps2p5, "vdd_s6" },
 964         {  "s7", QCOM_SMD_RPM_SMPA,  7, &pm8998_hfsmps, "vdd_s7" },
 965
 966         {  "l1", QCOM_SMD_RPM_LDOA,  1, &pm8953_ult_nldo, "vdd_l1" },
 967         {  "l2", QCOM_SMD_RPM_LDOA,  2, &pm8953_ult_nldo, "vdd_l2_l3" },
 968         {  "l3", QCOM_SMD_RPM_LDOA,  3, &pm8953_ult_nldo, "vdd_l2_l3" },
 969         {  "l4", QCOM_SMD_RPM_LDOA,  4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
 970         {  "l5", QCOM_SMD_RPM_LDOA,  5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
 971         {  "l6", QCOM_SMD_RPM_LDOA,  6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
 972         {  "l7", QCOM_SMD_RPM_LDOA,  7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
 973         {  "l8", QCOM_SMD_RPM_LDOA,  8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
 974         {  "l9", QCOM_SMD_RPM_LDOA,  9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
 975         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
 976         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
 977         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
 978         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
 979         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
 980         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
 981         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
 982         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
 983         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
 984         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" },
 985         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo,    "vdd_l20" },
 986         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo,    "vdd_l21" },
 987         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
 988         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" },
 989         {}
 990 };
 991
 992 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
 993         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
 994         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
 995         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
 996         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
 997         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
 998         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
 999         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
1000         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
1001         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
1002         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
1003         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
1004         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
1005         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
1006         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
1007         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
1008         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
1009         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
1010         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
1011         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
1012         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
1013         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1014         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1015         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
1016         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
1017         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1018         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
1019         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
1020         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
1021         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
1022         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1023         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1024         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
1025         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
1026         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1027         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1028         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1029         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
1030         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
1031         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
1032         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
1033         { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
1034         { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
1035         { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
1036         { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
1037         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
1038         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
1039
1040         {}
1041 };
1042
1043 static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
1044         { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
1045         { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
1046         { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
1047         { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
1048         {}
1049 };
1050
1051 static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
1052         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
1053         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
1054         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
1055         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
1056         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
1057         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
1058         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
1059         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
1060         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
1061         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
1062         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
1063         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
1064         { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
1065         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
1066         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
1067         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
1068         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
1069         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
1070         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
1071         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1072         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
1073         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
1074         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
1075         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
1076         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1077         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
1078         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1079         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1080         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
1081         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
1082         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
1083         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
1084         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
1085         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
1086         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
1087         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
1088         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
1089         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
1090         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
1091         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
1092         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
1093         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
1094         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
1095         {}
1096 };
1097
1098 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
1099         { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
1100         {}
1101 };
1102
1103 static const struct rpm_regulator_data rpm_pm660_regulators[] = {
1104         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
1105         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
1106         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
1107         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
1108         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
1109         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
1110         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
1111         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
1112         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
1113         /* l4 is unaccessible on PM660 */
1114         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
1115         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
1116         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
1117         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1118         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1119         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1120         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1121         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1122         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1123         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1124         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1125         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1126         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1127         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1128         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1129         { }
1130 };
1131
1132 static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
1133         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
1134         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
1135         { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
1136         { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
1137         { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
1138         { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
1139         { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1140         { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
1141         { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1142         { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
1143         { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1144         { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1145         { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
1146         { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
1147         { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
1148         { }
1149 };
1150
1151 static const struct rpm_regulator_data rpm_pms405_regulators[] = {
1152         { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
1153         { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
1154         { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
1155         { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
1156         { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
1157         { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
1158         { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
1159         { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
1160         { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
1161         { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
1162         { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
1163         { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
1164         { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
1165         { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
1166         { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
1167         { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1168         { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1169         { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1170         {}
1171 };
1172
1173 static const struct of_device_id rpm_of_match[] = {
1174         { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
1175         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
1176         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
1177         { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators },
1178         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
1179         { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
1180         { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
1181         { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
1182         { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
1183         { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
1184         { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
1185         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
1186         { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
1187         { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
1188         { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
1189         {}
1190 };
1191 MODULE_DEVICE_TABLE(of, rpm_of_match);
1192
1193 static int rpm_reg_probe(struct platform_device *pdev)
1194 {
1195         const struct rpm_regulator_data *reg;
1196         const struct of_device_id *match;
1197         struct regulator_config config = { };
1198         struct regulator_dev *rdev;
1199         struct qcom_rpm_reg *vreg;
1200         struct qcom_smd_rpm *rpm;
1201
1202         rpm = dev_get_drvdata(pdev->dev.parent);
1203         if (!rpm) {
1204                 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
1205                 return -ENODEV;
1206         }
1207
1208         match = of_match_device(rpm_of_match, &pdev->dev);
1209         if (!match) {
1210                 dev_err(&pdev->dev, "failed to match device\n");
1211                 return -ENODEV;
1212         }
1213
1214         for (reg = match->data; reg->name; reg++) {
1215                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
1216                 if (!vreg)
1217                         return -ENOMEM;
1218
1219                 vreg->dev = &pdev->dev;
1220                 vreg->type = reg->type;
1221                 vreg->id = reg->id;
1222                 vreg->rpm = rpm;
1223
1224                 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
1225
1226                 vreg->desc.id = -1;
1227                 vreg->desc.owner = THIS_MODULE;
1228                 vreg->desc.type = REGULATOR_VOLTAGE;
1229                 vreg->desc.name = reg->name;
1230                 vreg->desc.supply_name = reg->supply;
1231                 vreg->desc.of_match = reg->name;
1232
1233                 config.dev = &pdev->dev;
1234                 config.driver_data = vreg;
1235                 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
1236                 if (IS_ERR(rdev)) {
1237                         dev_err(&pdev->dev, "failed to register %s\n", reg->name);
1238                         return PTR_ERR(rdev);
1239                 }
1240         }
1241
1242         return 0;
1243 }
1244
1245 static struct platform_driver rpm_reg_driver = {
1246         .probe = rpm_reg_probe,
1247         .driver = {
1248                 .name  = "qcom_rpm_smd_regulator",
1249                 .of_match_table = rpm_of_match,
1250         },
1251 };
1252
1253 static int __init rpm_reg_init(void)
1254 {
1255         return platform_driver_register(&rpm_reg_driver);
1256 }
1257 subsys_initcall(rpm_reg_init);
1258
1259 static void __exit rpm_reg_exit(void)
1260 {
1261         platform_driver_unregister(&rpm_reg_driver);
1262 }
1263 module_exit(rpm_reg_exit)
1264
1265 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
1266 MODULE_LICENSE("GPL v2");