drivers/regulator/qcom_smd-regulator.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2015, Sony Mobile Communications AB.
   4  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/of.h>
   9 #include <linux/platform_device.h>
  10 #include <linux/regulator/driver.h>
  11 #include <linux/regulator/of_regulator.h>
  12 #include <linux/soc/qcom/smd-rpm.h>
  13
  14 struct qcom_smd_rpm *smd_vreg_rpm;
  15
  16 struct qcom_rpm_reg {
  17         struct device *dev;
  18         u32 type;
  19         u32 id;
  20
  21         struct regulator_desc desc;
  22
  23         int is_enabled;
  24         int uV;
  25         u32 load;
  26
  27         unsigned int enabled_updated:1;
  28         unsigned int uv_updated:1;
  29         unsigned int load_updated:1;
  30 };
  31
  32 struct rpm_regulator_req {
  33         __le32 key;
  34         __le32 nbytes;
  35         __le32 value;
  36 };
  37
  38 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
  39 #define RPM_KEY_UV      0x00007675 /* "uv" */
  40 #define RPM_KEY_MA      0x0000616d /* "ma" */
  41
  42 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
  43 {
  44         struct rpm_regulator_req req[3];
  45         int reqlen = 0;
  46         int ret;
  47
  48         if (vreg->enabled_updated) {
  49                 req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
  50                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  51                 req[reqlen].value = cpu_to_le32(vreg->is_enabled);
  52                 reqlen++;
  53         }
  54
  55         if (vreg->uv_updated && vreg->is_enabled) {
  56                 req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
  57                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  58                 req[reqlen].value = cpu_to_le32(vreg->uV);
  59                 reqlen++;
  60         }
  61
  62         if (vreg->load_updated && vreg->is_enabled) {
  63                 req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
  64                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  65                 req[reqlen].value = cpu_to_le32(vreg->load / 1000);
  66                 reqlen++;
  67         }
  68
  69         if (!reqlen)
  70                 return 0;
  71
  72         ret = qcom_rpm_smd_write(smd_vreg_rpm, QCOM_SMD_RPM_ACTIVE_STATE,
  73                                  vreg->type, vreg->id,
  74                                  req, sizeof(req[0]) * reqlen);
  75         if (!ret) {
  76                 vreg->enabled_updated = 0;
  77                 vreg->uv_updated = 0;
  78                 vreg->load_updated = 0;
  79         }
  80
  81         return ret;
  82 }
  83
  84 static int rpm_reg_enable(struct regulator_dev *rdev)
  85 {
  86         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  87         int ret;
  88
  89         vreg->is_enabled = 1;
  90         vreg->enabled_updated = 1;
  91
  92         ret = rpm_reg_write_active(vreg);
  93         if (ret)
  94                 vreg->is_enabled = 0;
  95
  96         return ret;
  97 }
  98
  99 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
 100 {
 101         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 102
 103         return vreg->is_enabled;
 104 }
 105
 106 static int rpm_reg_disable(struct regulator_dev *rdev)
 107 {
 108         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 109         int ret;
 110
 111         vreg->is_enabled = 0;
 112         vreg->enabled_updated = 1;
 113
 114         ret = rpm_reg_write_active(vreg);
 115         if (ret)
 116                 vreg->is_enabled = 1;
 117
 118         return ret;
 119 }
 120
 121 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
 122 {
 123         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 124
 125         return vreg->uV;
 126 }
 127
 128 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
 129                                int min_uV,
 130                                int max_uV,
 131                                unsigned *selector)
 132 {
 133         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 134         int ret;
 135         int old_uV = vreg->uV;
 136
 137         vreg->uV = min_uV;
 138         vreg->uv_updated = 1;
 139
 140         ret = rpm_reg_write_active(vreg);
 141         if (ret)
 142                 vreg->uV = old_uV;
 143
 144         return ret;
 145 }
 146
 147 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
 148 {
 149         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 150         u32 old_load = vreg->load;
 151         int ret;
 152
 153         vreg->load = load_uA;
 154         vreg->load_updated = 1;
 155         ret = rpm_reg_write_active(vreg);
 156         if (ret)
 157                 vreg->load = old_load;
 158
 159         return ret;
 160 }
 161
 162 static const struct regulator_ops rpm_smps_ldo_ops = {
 163         .enable = rpm_reg_enable,
 164         .disable = rpm_reg_disable,
 165         .is_enabled = rpm_reg_is_enabled,
 166         .list_voltage = regulator_list_voltage_linear_range,
 167
 168         .get_voltage = rpm_reg_get_voltage,
 169         .set_voltage = rpm_reg_set_voltage,
 170
 171         .set_load = rpm_reg_set_load,
 172 };
 173
 174 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
 175         .enable = rpm_reg_enable,
 176         .disable = rpm_reg_disable,
 177         .is_enabled = rpm_reg_is_enabled,
 178
 179         .get_voltage = rpm_reg_get_voltage,
 180         .set_voltage = rpm_reg_set_voltage,
 181
 182         .set_load = rpm_reg_set_load,
 183 };
 184
 185 static const struct regulator_ops rpm_switch_ops = {
 186         .enable = rpm_reg_enable,
 187         .disable = rpm_reg_disable,
 188         .is_enabled = rpm_reg_is_enabled,
 189 };
 190
 191 static const struct regulator_ops rpm_bob_ops = {
 192         .enable = rpm_reg_enable,
 193         .disable = rpm_reg_disable,
 194         .is_enabled = rpm_reg_is_enabled,
 195
 196         .get_voltage = rpm_reg_get_voltage,
 197         .set_voltage = rpm_reg_set_voltage,
 198 };
 199
 200 static const struct regulator_ops rpm_mp5496_ops = {
 201         .enable = rpm_reg_enable,
 202         .disable = rpm_reg_disable,
 203         .is_enabled = rpm_reg_is_enabled,
 204         .list_voltage = regulator_list_voltage_linear_range,
 205
 206         .get_voltage = rpm_reg_get_voltage,
 207         .set_voltage = rpm_reg_set_voltage,
 208 };
 209
 210 static const struct regulator_desc pma8084_hfsmps = {
 211         .linear_ranges = (struct linear_range[]) {
 212                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
 213                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 214         },
 215         .n_linear_ranges = 2,
 216         .n_voltages = 159,
 217         .ops = &rpm_smps_ldo_ops,
 218 };
 219
 220 static const struct regulator_desc pma8084_ftsmps = {
 221         .linear_ranges = (struct linear_range[]) {
 222                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 223                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 224         },
 225         .n_linear_ranges = 2,
 226         .n_voltages = 262,
 227         .ops = &rpm_smps_ldo_ops,
 228 };
 229
 230 static const struct regulator_desc pma8084_pldo = {
 231         .linear_ranges = (struct linear_range[]) {
 232                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 233                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 234                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 235         },
 236         .n_linear_ranges = 3,
 237         .n_voltages = 164,
 238         .ops = &rpm_smps_ldo_ops,
 239 };
 240
 241 static const struct regulator_desc pma8084_nldo = {
 242         .linear_ranges = (struct linear_range[]) {
 243                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 244         },
 245         .n_linear_ranges = 1,
 246         .n_voltages = 64,
 247         .ops = &rpm_smps_ldo_ops,
 248 };
 249
 250 static const struct regulator_desc pma8084_switch = {
 251         .ops = &rpm_switch_ops,
 252 };
 253
 254 static const struct regulator_desc pm8226_hfsmps = {
 255         .linear_ranges = (struct linear_range[]) {
 256                 REGULATOR_LINEAR_RANGE(375000,   0,  95, 12500),
 257                 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
 258         },
 259         .n_linear_ranges = 2,
 260         .n_voltages = 159,
 261         .ops = &rpm_smps_ldo_ops,
 262 };
 263
 264 static const struct regulator_desc pm8226_ftsmps = {
 265         .linear_ranges = (struct linear_range[]) {
 266                 REGULATOR_LINEAR_RANGE(350000,    0, 184,  5000),
 267                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 268         },
 269         .n_linear_ranges = 2,
 270         .n_voltages = 262,
 271         .ops = &rpm_smps_ldo_ops,
 272 };
 273
 274 static const struct regulator_desc pm8226_pldo = {
 275         .linear_ranges = (struct linear_range[]) {
 276                 REGULATOR_LINEAR_RANGE(750000,    0,  63, 12500),
 277                 REGULATOR_LINEAR_RANGE(1550000,  64, 126, 25000),
 278                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 279         },
 280         .n_linear_ranges = 3,
 281         .n_voltages = 164,
 282         .ops = &rpm_smps_ldo_ops,
 283 };
 284
 285 static const struct regulator_desc pm8226_nldo = {
 286         .linear_ranges = (struct linear_range[]) {
 287                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 288         },
 289         .n_linear_ranges = 1,
 290         .n_voltages = 64,
 291         .ops = &rpm_smps_ldo_ops,
 292 };
 293
 294 static const struct regulator_desc pm8226_switch = {
 295         .ops = &rpm_switch_ops,
 296 };
 297
 298 static const struct regulator_desc pm8x41_hfsmps = {
 299         .linear_ranges = (struct linear_range[]) {
 300                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 301                 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
 302         },
 303         .n_linear_ranges = 2,
 304         .n_voltages = 159,
 305         .ops = &rpm_smps_ldo_ops,
 306 };
 307
 308 static const struct regulator_desc pm8841_ftsmps = {
 309         .linear_ranges = (struct linear_range[]) {
 310                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 311                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 312         },
 313         .n_linear_ranges = 2,
 314         .n_voltages = 262,
 315         .ops = &rpm_smps_ldo_ops,
 316 };
 317
 318 static const struct regulator_desc pm8941_boost = {
 319         .linear_ranges = (struct linear_range[]) {
 320                 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
 321         },
 322         .n_linear_ranges = 1,
 323         .n_voltages = 31,
 324         .ops = &rpm_smps_ldo_ops,
 325 };
 326
 327 static const struct regulator_desc pm8941_pldo = {
 328         .linear_ranges = (struct linear_range[]) {
 329                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 330                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 331                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 332         },
 333         .n_linear_ranges = 3,
 334         .n_voltages = 164,
 335         .ops = &rpm_smps_ldo_ops,
 336 };
 337
 338 static const struct regulator_desc pm8941_nldo = {
 339         .linear_ranges = (struct linear_range[]) {
 340                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 341         },
 342         .n_linear_ranges = 1,
 343         .n_voltages = 64,
 344         .ops = &rpm_smps_ldo_ops,
 345 };
 346
 347 static const struct regulator_desc pm8941_lnldo = {
 348         .fixed_uV = 1740000,
 349         .n_voltages = 1,
 350         .ops = &rpm_smps_ldo_ops_fixed,
 351 };
 352
 353 static const struct regulator_desc pm8941_switch = {
 354         .ops = &rpm_switch_ops,
 355 };
 356
 357 static const struct regulator_desc pm8916_pldo = {
 358         .linear_ranges = (struct linear_range[]) {
 359                 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
 360         },
 361         .n_linear_ranges = 1,
 362         .n_voltages = 128,
 363         .ops = &rpm_smps_ldo_ops,
 364 };
 365
 366 static const struct regulator_desc pm8916_nldo = {
 367         .linear_ranges = (struct linear_range[]) {
 368                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 369         },
 370         .n_linear_ranges = 1,
 371         .n_voltages = 94,
 372         .ops = &rpm_smps_ldo_ops,
 373 };
 374
 375 static const struct regulator_desc pm8916_buck_lvo_smps = {
 376         .linear_ranges = (struct linear_range[]) {
 377                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 378                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
 379         },
 380         .n_linear_ranges = 2,
 381         .n_voltages = 128,
 382         .ops = &rpm_smps_ldo_ops,
 383 };
 384
 385 static const struct regulator_desc pm8916_buck_hvo_smps = {
 386         .linear_ranges = (struct linear_range[]) {
 387                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
 388         },
 389         .n_linear_ranges = 1,
 390         .n_voltages = 32,
 391         .ops = &rpm_smps_ldo_ops,
 392 };
 393
 394 static const struct regulator_desc pm8950_hfsmps = {
 395         .linear_ranges = (struct linear_range[]) {
 396                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 397                 REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
 398         },
 399         .n_linear_ranges = 2,
 400         .n_voltages = 128,
 401         .ops = &rpm_smps_ldo_ops,
 402 };
 403
 404 static const struct regulator_desc pm8950_ftsmps2p5 = {
 405         .linear_ranges = (struct linear_range[]) {
 406                 REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
 407                 REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
 408         },
 409         .n_linear_ranges = 2,
 410         .n_voltages = 461,
 411         .ops = &rpm_smps_ldo_ops,
 412 };
 413
 414 static const struct regulator_desc pm8950_ult_nldo = {
 415         .linear_ranges = (struct linear_range[]) {
 416                 REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
 417         },
 418         .n_linear_ranges = 1,
 419         .n_voltages = 203,
 420         .ops = &rpm_smps_ldo_ops,
 421 };
 422
 423 static const struct regulator_desc pm8950_ult_pldo = {
 424         .linear_ranges = (struct linear_range[]) {
 425                 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
 426         },
 427         .n_linear_ranges = 1,
 428         .n_voltages = 128,
 429         .ops = &rpm_smps_ldo_ops,
 430 };
 431
 432 static const struct regulator_desc pm8950_pldo_lv = {
 433         .linear_ranges = (struct linear_range[]) {
 434                 REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
 435         },
 436         .n_linear_ranges = 1,
 437         .n_voltages = 17,
 438         .ops = &rpm_smps_ldo_ops,
 439 };
 440
 441 static const struct regulator_desc pm8950_pldo = {
 442         .linear_ranges = (struct linear_range[]) {
 443                 REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
 444         },
 445         .n_linear_ranges = 1,
 446         .n_voltages = 165,
 447         .ops = &rpm_smps_ldo_ops,
 448 };
 449
 450 static const struct regulator_desc pm8953_lnldo = {
 451         .linear_ranges = (struct linear_range[]) {
 452                 REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000),
 453                 REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000),
 454         },
 455         .n_linear_ranges = 2,
 456         .n_voltages = 16,
 457         .ops = &rpm_smps_ldo_ops,
 458 };
 459
 460 static const struct regulator_desc pm8953_ult_nldo = {
 461         .linear_ranges = (struct linear_range[]) {
 462                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 463         },
 464         .n_linear_ranges = 1,
 465         .n_voltages = 94,
 466         .ops = &rpm_smps_ldo_ops,
 467 };
 468
 469 static const struct regulator_desc pm8994_hfsmps = {
 470         .linear_ranges = (struct linear_range[]) {
 471                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 472                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 473         },
 474         .n_linear_ranges = 2,
 475         .n_voltages = 159,
 476         .ops = &rpm_smps_ldo_ops,
 477 };
 478
 479 static const struct regulator_desc pm8994_ftsmps = {
 480         .linear_ranges = (struct linear_range[]) {
 481                 REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
 482                 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
 483         },
 484         .n_linear_ranges = 2,
 485         .n_voltages = 350,
 486         .ops = &rpm_smps_ldo_ops,
 487 };
 488
 489 static const struct regulator_desc pm8994_nldo = {
 490         .linear_ranges = (struct linear_range[]) {
 491                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 492         },
 493         .n_linear_ranges = 1,
 494         .n_voltages = 64,
 495         .ops = &rpm_smps_ldo_ops,
 496 };
 497
 498 static const struct regulator_desc pm8994_pldo = {
 499         .linear_ranges = (struct linear_range[]) {
 500                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 501                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 502                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 503         },
 504         .n_linear_ranges = 3,
 505         .n_voltages = 164,
 506         .ops = &rpm_smps_ldo_ops,
 507 };
 508
 509 static const struct regulator_desc pm8994_switch = {
 510         .ops = &rpm_switch_ops,
 511 };
 512
 513 static const struct regulator_desc pm8994_lnldo = {
 514         .fixed_uV = 1740000,
 515         .n_voltages = 1,
 516         .ops = &rpm_smps_ldo_ops_fixed,
 517 };
 518
 519 static const struct regulator_desc pmi8994_ftsmps = {
 520         .linear_ranges = (struct linear_range[]) {
 521                 REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
 522                 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
 523         },
 524         .n_linear_ranges = 2,
 525         .n_voltages = 350,
 526         .ops = &rpm_smps_ldo_ops,
 527 };
 528
 529 static const struct regulator_desc pmi8994_hfsmps = {
 530         .linear_ranges = (struct linear_range[]) {
 531                 REGULATOR_LINEAR_RANGE(350000,  0,  80, 12500),
 532                 REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
 533         },
 534         .n_linear_ranges = 2,
 535         .n_voltages = 142,
 536         .ops = &rpm_smps_ldo_ops,
 537 };
 538
 539 static const struct regulator_desc pmi8994_bby = {
 540         .linear_ranges = (struct linear_range[]) {
 541                 REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
 542         },
 543         .n_linear_ranges = 1,
 544         .n_voltages = 45,
 545         .ops = &rpm_bob_ops,
 546 };
 547
 548 static const struct regulator_desc pm8998_ftsmps = {
 549         .linear_ranges = (struct linear_range[]) {
 550                 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
 551         },
 552         .n_linear_ranges = 1,
 553         .n_voltages = 259,
 554         .ops = &rpm_smps_ldo_ops,
 555 };
 556
 557 static const struct regulator_desc pm8998_hfsmps = {
 558         .linear_ranges = (struct linear_range[]) {
 559                 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
 560         },
 561         .n_linear_ranges = 1,
 562         .n_voltages = 216,
 563         .ops = &rpm_smps_ldo_ops,
 564 };
 565
 566 static const struct regulator_desc pm8998_nldo = {
 567         .linear_ranges = (struct linear_range[]) {
 568                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 569         },
 570         .n_linear_ranges = 1,
 571         .n_voltages = 128,
 572         .ops = &rpm_smps_ldo_ops,
 573 };
 574
 575 static const struct regulator_desc pm8998_pldo = {
 576         .linear_ranges = (struct linear_range[]) {
 577                 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
 578         },
 579         .n_linear_ranges = 1,
 580         .n_voltages = 256,
 581         .ops = &rpm_smps_ldo_ops,
 582 };
 583
 584 static const struct regulator_desc pm8998_pldo_lv = {
 585         .linear_ranges = (struct linear_range[]) {
 586                 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
 587         },
 588         .n_linear_ranges = 1,
 589         .n_voltages = 128,
 590         .ops = &rpm_smps_ldo_ops,
 591 };
 592
 593 static const struct regulator_desc pm8998_switch = {
 594         .ops = &rpm_switch_ops,
 595 };
 596
 597 static const struct regulator_desc pmi8998_bob = {
 598         .linear_ranges = (struct linear_range[]) {
 599                 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
 600         },
 601         .n_linear_ranges = 1,
 602         .n_voltages = 84,
 603         .ops = &rpm_bob_ops,
 604 };
 605
 606 static const struct regulator_desc pm660_ftsmps = {
 607         .linear_ranges = (struct linear_range[]) {
 608                 REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000),
 609         },
 610         .n_linear_ranges = 1,
 611         .n_voltages = 200,
 612         .ops = &rpm_smps_ldo_ops,
 613 };
 614
 615 static const struct regulator_desc pm660_hfsmps = {
 616         .linear_ranges = (struct linear_range[]) {
 617                 REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000),
 618         },
 619         .n_linear_ranges = 1,
 620         .n_voltages = 217,
 621         .ops = &rpm_smps_ldo_ops,
 622 };
 623
 624 static const struct regulator_desc pm660_ht_nldo = {
 625         .linear_ranges = (struct linear_range[]) {
 626                 REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000),
 627         },
 628         .n_linear_ranges = 1,
 629         .n_voltages = 125,
 630         .ops = &rpm_smps_ldo_ops,
 631 };
 632
 633 static const struct regulator_desc pm660_ht_lvpldo = {
 634         .linear_ranges = (struct linear_range[]) {
 635                 REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
 636         },
 637         .n_linear_ranges = 1,
 638         .n_voltages = 63,
 639         .ops = &rpm_smps_ldo_ops,
 640 };
 641
 642 static const struct regulator_desc pm660_nldo660 = {
 643         .linear_ranges = (struct linear_range[]) {
 644                 REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
 645         },
 646         .n_linear_ranges = 1,
 647         .n_voltages = 124,
 648         .ops = &rpm_smps_ldo_ops,
 649 };
 650
 651 static const struct regulator_desc pm660_pldo660 = {
 652         .linear_ranges = (struct linear_range[]) {
 653                 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
 654         },
 655         .n_linear_ranges = 1,
 656         .n_voltages = 256,
 657         .ops = &rpm_smps_ldo_ops,
 658 };
 659
 660 static const struct regulator_desc pm660l_bob = {
 661         .linear_ranges = (struct linear_range[]) {
 662                 REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000),
 663         },
 664         .n_linear_ranges = 1,
 665         .n_voltages = 85,
 666         .ops = &rpm_bob_ops,
 667 };
 668
 669 static const struct regulator_desc pm6125_ftsmps = {
 670         .linear_ranges = (struct linear_range[]) {
 671                 REGULATOR_LINEAR_RANGE(300000, 0, 268, 4000),
 672         },
 673         .n_linear_ranges = 1,
 674         .n_voltages = 269,
 675         .ops = &rpm_smps_ldo_ops,
 676 };
 677
 678 static const struct regulator_desc pmic5_ftsmps520 = {
 679         .linear_ranges = (struct linear_range[]) {
 680                 REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
 681         },
 682         .n_linear_ranges = 1,
 683         .n_voltages = 264,
 684         .ops = &rpm_smps_ldo_ops,
 685 };
 686
 687 static const struct regulator_desc pmic5_hfsmps515 = {
 688         .linear_ranges = (struct linear_range[]) {
 689                 REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
 690         },
 691         .n_linear_ranges = 1,
 692         .n_voltages = 236,
 693         .ops = &rpm_smps_ldo_ops,
 694 };
 695
 696 static const struct regulator_desc pms405_hfsmps3 = {
 697         .linear_ranges = (struct linear_range[]) {
 698                 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
 699         },
 700         .n_linear_ranges = 1,
 701         .n_voltages = 216,
 702         .ops = &rpm_smps_ldo_ops,
 703 };
 704
 705 static const struct regulator_desc pms405_nldo300 = {
 706         .linear_ranges = (struct linear_range[]) {
 707                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 708         },
 709         .n_linear_ranges = 1,
 710         .n_voltages = 128,
 711         .ops = &rpm_smps_ldo_ops,
 712 };
 713
 714 static const struct regulator_desc pms405_nldo1200 = {
 715         .linear_ranges = (struct linear_range[]) {
 716                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 717         },
 718         .n_linear_ranges = 1,
 719         .n_voltages = 128,
 720         .ops = &rpm_smps_ldo_ops,
 721 };
 722
 723 static const struct regulator_desc pms405_pldo50 = {
 724         .linear_ranges = (struct linear_range[]) {
 725                 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
 726         },
 727         .n_linear_ranges = 1,
 728         .n_voltages = 129,
 729         .ops = &rpm_smps_ldo_ops,
 730 };
 731
 732 static const struct regulator_desc pms405_pldo150 = {
 733         .linear_ranges = (struct linear_range[]) {
 734                 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
 735         },
 736         .n_linear_ranges = 1,
 737         .n_voltages = 129,
 738         .ops = &rpm_smps_ldo_ops,
 739 };
 740
 741 static const struct regulator_desc pms405_pldo600 = {
 742         .linear_ranges = (struct linear_range[]) {
 743                 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
 744         },
 745         .n_linear_ranges = 1,
 746         .n_voltages = 99,
 747         .ops = &rpm_smps_ldo_ops,
 748 };
 749
 750 static const struct regulator_desc mp5496_smps = {
 751         .linear_ranges = (struct linear_range[]) {
 752                 REGULATOR_LINEAR_RANGE(600000, 0, 127, 12500),
 753         },
 754         .n_linear_ranges = 1,
 755         .n_voltages = 128,
 756         .ops = &rpm_mp5496_ops,
 757 };
 758
 759 static const struct regulator_desc mp5496_ldoa2 = {
 760         .linear_ranges = (struct linear_range[]) {
 761                 REGULATOR_LINEAR_RANGE(800000, 0, 127, 25000),
 762         },
 763         .n_linear_ranges = 1,
 764         .n_voltages = 128,
 765         .ops = &rpm_mp5496_ops,
 766 };
 767
 768 static const struct regulator_desc pm2250_lvftsmps = {
 769         .linear_ranges = (struct linear_range[]) {
 770                 REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000),
 771         },
 772         .n_linear_ranges = 1,
 773         .n_voltages = 270,
 774         .ops = &rpm_smps_ldo_ops,
 775 };
 776
 777 static const struct regulator_desc pm2250_ftsmps = {
 778         .linear_ranges = (struct linear_range[]) {
 779                 REGULATOR_LINEAR_RANGE(640000, 0, 269, 8000),
 780         },
 781         .n_linear_ranges = 1,
 782         .n_voltages = 270,
 783         .ops = &rpm_smps_ldo_ops,
 784 };
 785
 786 struct rpm_regulator_data {
 787         const char *name;
 788         u32 type;
 789         u32 id;
 790         const struct regulator_desc *desc;
 791         const char *supply;
 792 };
 793
 794 static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
 795         { "s1", QCOM_SMD_RPM_SMPA, 1, &mp5496_smps, "s1" },
 796         { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smps, "s2" },
 797         { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
 798         { "l5", QCOM_SMD_RPM_LDOA, 5, &mp5496_ldoa2, "l5" },
 799         {}
 800 };
 801
 802 static const struct rpm_regulator_data rpm_pm2250_regulators[] = {
 803         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" },
 804         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" },
 805         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" },
 806         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" },
 807         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 808         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 809         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 810         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
 811         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 812         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 813         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 814         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 815         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 816         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 817         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 818         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
 819         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
 820         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
 821         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
 822         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
 823         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
 824         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
 825         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
 826         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
 827         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
 828         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
 829         {}
 830 };
 831
 832 static const struct rpm_regulator_data rpm_pm6125_regulators[] = {
 833         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm6125_ftsmps, "vdd_s1" },
 834         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm6125_ftsmps, "vdd_s2" },
 835         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm6125_ftsmps, "vdd_s3" },
 836         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm6125_ftsmps, "vdd_s4" },
 837         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
 838         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_hfsmps, "vdd_s6" },
 839         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" },
 840         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm6125_ftsmps, "vdd_s8" },
 841         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
 842         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l2_l3_l4" },
 843         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3_l4" },
 844         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_nldo660, "vdd_l2_l3_l4" },
 845         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
 846         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l6_l8" },
 847         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
 848         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l6_l8" },
 849         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l9_l11" },
 850         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
 851         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l9_l11" },
 852         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l12_l16" },
 853         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
 854         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
 855         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
 856         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l12_l16" },
 857         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
 858         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
 859         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
 860         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
 861         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
 862         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
 863         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm660_pldo660, "vdd_l23_l24" },
 864         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm660_pldo660, "vdd_l23_l24" },
 865         { }
 866 };
 867
 868 static const struct rpm_regulator_data rpm_pm660_regulators[] = {
 869         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
 870         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
 871         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
 872         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
 873         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
 874         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
 875         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
 876         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
 877         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
 878         /* l4 is unaccessible on PM660 */
 879         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
 880         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
 881         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
 882         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
 883         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
 884         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
 885         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
 886         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
 887         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
 888         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
 889         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
 890         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
 891         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
 892         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
 893         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
 894         { }
 895 };
 896
 897 static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
 898         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
 899         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
 900         { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
 901         { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
 902         { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
 903         { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
 904         { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
 905         { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
 906         { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
 907         { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
 908         { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
 909         { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
 910         { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
 911         { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
 912         { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
 913         { }
 914 };
 915
 916 static const struct rpm_regulator_data rpm_pm8226_regulators[] = {
 917         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" },
 918         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" },
 919         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" },
 920         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" },
 921         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" },
 922         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
 923         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
 924         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" },
 925         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
 926         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
 927         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 928         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 929         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 930         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 931         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" },
 932         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" },
 933         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" },
 934         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" },
 935         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" },
 936         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
 937         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
 938         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
 939         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
 940         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 941         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 942         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 943         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 944         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 945         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" },
 946         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" },
 947         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" },
 948         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
 949         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
 950         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" },
 951         {}
 952 };
 953
 954 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
 955         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
 956         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
 957         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
 958         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
 959         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
 960         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
 961         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
 962         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
 963         {}
 964 };
 965
 966 static const struct rpm_regulator_data rpm_pm8909_regulators[] = {
 967         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 968         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_hvo_smps, "vdd_s2" },
 969         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1" },
 970         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l2_l5" },
 971         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l3_l6_l10" },
 972         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l7" },
 973         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_pldo, "vdd_l2_l5" },
 974         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l3_l6_l10" },
 975         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l4_l7" },
 976         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
 977         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
 978         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_nldo, "vdd_l3_l6_l10" },
 979         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l8_l11_l15_l18" },
 980         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
 981         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l13" },
 982         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
 983         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
 984         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
 985         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
 986         {}
 987 };
 988
 989 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
 990         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 991         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
 992         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
 993         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
 994         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
 995         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
 996         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
 997         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
 998         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
 999         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
1000         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
1001         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
1002         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
1003         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1004         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1005         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1006         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1007         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1008         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1009         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1010         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1011         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1012         {}
1013 };
1014
1015 static const struct rpm_regulator_data rpm_pm8937_regulators[] = {
1016         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_hfsmps, "vdd_s1" },
1017         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_hfsmps, "vdd_s2" },
1018         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
1019         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
1020         /* S5 - S6 are managed by SPMI */
1021
1022         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1_l19" },
1023         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l23" },
1024         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l3" },
1025         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" },
1026         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" },
1027         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" },
1028         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" },
1029         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1030         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1031         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
1032         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1033         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1034         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1035         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1036         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1037         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" },
1038         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1039         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1040         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l1_l19" },
1041         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20_l21" },
1042         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l20_l21" },
1043         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1044         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_nldo, "vdd_l2_l23" },
1045         {}
1046 };
1047
1048 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
1049         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
1050         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
1051         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
1052         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
1053
1054         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
1055         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
1056         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
1057         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
1058         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
1059         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
1060         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
1061         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
1062         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
1063         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
1064         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
1065         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
1066         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
1067         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
1068         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
1069         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
1070         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
1071         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
1072         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
1073         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
1074         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
1075         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
1076         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
1077         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
1078
1079         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
1080         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
1081         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
1082
1083         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
1084         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
1085
1086         {}
1087 };
1088
1089 static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
1090         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
1091         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
1092         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
1093         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
1094         /* S5 is managed via SPMI. */
1095         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
1096
1097         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
1098         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
1099         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
1100         /* L4 seems not to exist. */
1101         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
1102         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
1103         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
1104         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1105         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1106         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
1107         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1108         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1109         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1110         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1111         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1112         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l5_l6_l7_l16" },
1113         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1114         /* L18 seems not to exist. */
1115         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8950_pldo, "vdd_l1_l19" },
1116         /* L20 & L21 seem not to exist. */
1117         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22" },
1118         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8950_pldo, "vdd_l2_l23" },
1119         {}
1120 };
1121
1122 static const struct rpm_regulator_data rpm_pm8953_regulators[] = {
1123         {  "s1", QCOM_SMD_RPM_SMPA,  1, &pm8998_hfsmps, "vdd_s1" },
1124         {  "s2", QCOM_SMD_RPM_SMPA,  2, &pm8998_hfsmps, "vdd_s2" },
1125         {  "s3", QCOM_SMD_RPM_SMPA,  3, &pm8998_hfsmps, "vdd_s3" },
1126         {  "s4", QCOM_SMD_RPM_SMPA,  4, &pm8998_hfsmps, "vdd_s4" },
1127         {  "s5", QCOM_SMD_RPM_SMPA,  5, &pm8950_ftsmps2p5, "vdd_s5" },
1128         {  "s6", QCOM_SMD_RPM_SMPA,  6, &pm8950_ftsmps2p5, "vdd_s6" },
1129         {  "s7", QCOM_SMD_RPM_SMPA,  7, &pm8998_hfsmps, "vdd_s7" },
1130
1131         {  "l1", QCOM_SMD_RPM_LDOA,  1, &pm8953_ult_nldo, "vdd_l1" },
1132         {  "l2", QCOM_SMD_RPM_LDOA,  2, &pm8953_ult_nldo, "vdd_l2_l3" },
1133         {  "l3", QCOM_SMD_RPM_LDOA,  3, &pm8953_ult_nldo, "vdd_l2_l3" },
1134         {  "l4", QCOM_SMD_RPM_LDOA,  4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1135         {  "l5", QCOM_SMD_RPM_LDOA,  5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1136         {  "l6", QCOM_SMD_RPM_LDOA,  6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1137         {  "l7", QCOM_SMD_RPM_LDOA,  7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1138         {  "l8", QCOM_SMD_RPM_LDOA,  8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1139         {  "l9", QCOM_SMD_RPM_LDOA,  9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1140         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1141         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1142         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1143         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1144         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1145         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1146         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1147         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1148         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1149         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" },
1150         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo,    "vdd_l20" },
1151         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo,    "vdd_l21" },
1152         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1153         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" },
1154         {}
1155 };
1156
1157 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
1158         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
1159         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
1160         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
1161         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
1162         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
1163         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
1164         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
1165         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
1166         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
1167         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
1168         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
1169         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
1170         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
1171         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
1172         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
1173         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
1174         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
1175         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
1176         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
1177         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
1178         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1179         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1180         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
1181         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
1182         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1183         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
1184         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
1185         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
1186         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
1187         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1188         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1189         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
1190         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
1191         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1192         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1193         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1194         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
1195         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
1196         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
1197         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
1198         { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
1199         { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
1200         { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
1201         { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
1202         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
1203         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
1204
1205         {}
1206 };
1207
1208 static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
1209         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
1210         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
1211         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
1212         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
1213         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
1214         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
1215         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
1216         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
1217         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
1218         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
1219         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
1220         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
1221         { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
1222         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
1223         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
1224         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
1225         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
1226         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
1227         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
1228         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1229         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
1230         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
1231         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
1232         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
1233         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1234         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
1235         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1236         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1237         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
1238         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
1239         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
1240         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
1241         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
1242         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
1243         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
1244         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
1245         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
1246         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
1247         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
1248         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
1249         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
1250         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
1251         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
1252         {}
1253 };
1254
1255 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
1256         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
1257         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
1258         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
1259         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
1260         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
1261         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
1262         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
1263         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
1264         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
1265         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
1266         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
1267         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
1268
1269         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
1270         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
1271         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
1272         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
1273         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
1274         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1275         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
1276         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
1277         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1278         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1279         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
1280         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1281         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1282         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1283         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1284         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
1285         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
1286         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
1287         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
1288         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1289         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
1290         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
1291         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1292         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1293         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
1294         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1295         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
1296
1297         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
1298         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
1299         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
1300         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
1301         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
1302
1303         {}
1304 };
1305
1306 static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
1307         { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
1308         { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
1309         { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
1310         { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
1311         {}
1312 };
1313
1314 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
1315         { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
1316         {}
1317 };
1318
1319 static const struct rpm_regulator_data rpm_pmr735a_regulators[] = {
1320         { "s1", QCOM_SMD_RPM_SMPE, 1, &pmic5_ftsmps520, "vdd_s1"},
1321         { "s2", QCOM_SMD_RPM_SMPE, 2, &pmic5_ftsmps520, "vdd_s2"},
1322         { "s3", QCOM_SMD_RPM_SMPE, 3, &pmic5_hfsmps515, "vdd_s3"},
1323         { "l1", QCOM_SMD_RPM_LDOE, 1, &pm660_nldo660, "vdd_l1_l2"},
1324         { "l2", QCOM_SMD_RPM_LDOE, 2, &pm660_nldo660, "vdd_l1_l2"},
1325         { "l3", QCOM_SMD_RPM_LDOE, 3, &pm660_nldo660, "vdd_l3"},
1326         { "l4", QCOM_SMD_RPM_LDOE, 4, &pm660_ht_lvpldo, "vdd_l4"},
1327         { "l5", QCOM_SMD_RPM_LDOE, 5, &pm660_nldo660, "vdd_l5_l6"},
1328         { "l6", QCOM_SMD_RPM_LDOE, 6, &pm660_nldo660, "vdd_l5_l6"},
1329         { "l7", QCOM_SMD_RPM_LDOE, 7, &pm660_pldo660, "vdd_l7_bob"},
1330         {}
1331 };
1332
1333 static const struct rpm_regulator_data rpm_pms405_regulators[] = {
1334         { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
1335         { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
1336         { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
1337         { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
1338         { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
1339         { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
1340         { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
1341         { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
1342         { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
1343         { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
1344         { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
1345         { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
1346         { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
1347         { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
1348         { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
1349         { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1350         { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1351         { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1352         {}
1353 };
1354
1355 static const struct of_device_id rpm_of_match[] = {
1356         { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
1357         { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators },
1358         { .compatible = "qcom,rpm-pm6125-regulators", .data = &rpm_pm6125_regulators },
1359         { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
1360         { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
1361         { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators },
1362         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
1363         { .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators },
1364         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
1365         { .compatible = "qcom,rpm-pm8937-regulators", .data = &rpm_pm8937_regulators },
1366         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
1367         { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
1368         { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
1369         { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
1370         { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
1371         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
1372         { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
1373         { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
1374         { .compatible = "qcom,rpm-pmr735a-regulators", .data = &rpm_pmr735a_regulators },
1375         { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
1376         {}
1377 };
1378 MODULE_DEVICE_TABLE(of, rpm_of_match);
1379
1380 /**
1381  * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator
1382  * @vreg:               Pointer to the individual qcom_smd-regulator resource
1383  * @dev:                Pointer to the top level qcom_smd-regulator PMIC device
1384  * @node:               Pointer to the individual qcom_smd-regulator resource
1385  *                      device node
1386  * @pmic_rpm_data:      Pointer to a null-terminated array of qcom_smd-regulator
1387  *                      resources defined for the top level PMIC device
1388  *
1389  * Return: 0 on success, errno on failure
1390  */
1391 static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev,
1392                                    struct device_node *node,
1393                                    const struct rpm_regulator_data *pmic_rpm_data)
1394 {
1395         struct regulator_config config = {};
1396         const struct rpm_regulator_data *rpm_data;
1397         struct regulator_dev *rdev;
1398         int ret;
1399
1400         for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++)
1401                 if (of_node_name_eq(node, rpm_data->name))
1402                         break;
1403
1404         if (!rpm_data->name) {
1405                 dev_err(dev, "Unknown regulator %pOFn\n", node);
1406                 return -EINVAL;
1407         }
1408
1409         vreg->dev       = dev;
1410         vreg->type      = rpm_data->type;
1411         vreg->id        = rpm_data->id;
1412
1413         memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc));
1414         vreg->desc.name = rpm_data->name;
1415         vreg->desc.supply_name = rpm_data->supply;
1416         vreg->desc.owner = THIS_MODULE;
1417         vreg->desc.type = REGULATOR_VOLTAGE;
1418         vreg->desc.of_match = rpm_data->name;
1419
1420         config.dev              = dev;
1421         config.of_node          = node;
1422         config.driver_data      = vreg;
1423
1424         rdev = devm_regulator_register(dev, &vreg->desc, &config);
1425         if (IS_ERR(rdev)) {
1426                 ret = PTR_ERR(rdev);
1427                 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret);
1428                 return ret;
1429         }
1430
1431         return 0;
1432 }
1433
1434 static int rpm_reg_probe(struct platform_device *pdev)
1435 {
1436         struct device *dev = &pdev->dev;
1437         const struct rpm_regulator_data *vreg_data;
1438         struct device_node *node;
1439         struct qcom_rpm_reg *vreg;
1440         struct qcom_smd_rpm *rpm;
1441         int ret;
1442
1443         rpm = dev_get_drvdata(pdev->dev.parent);
1444         if (!rpm) {
1445                 dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n");
1446                 return -ENODEV;
1447         }
1448
1449         if (smd_vreg_rpm && rpm != smd_vreg_rpm)
1450                 return dev_err_probe(dev, -EINVAL, "RPM mismatch\n");
1451
1452         smd_vreg_rpm = rpm;
1453
1454         vreg_data = of_device_get_match_data(dev);
1455         if (!vreg_data)
1456                 return -ENODEV;
1457
1458         for_each_available_child_of_node(dev->of_node, node) {
1459                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
1460                 if (!vreg) {
1461                         of_node_put(node);
1462                         return -ENOMEM;
1463                 }
1464
1465                 ret = rpm_regulator_init_vreg(vreg, dev, node, vreg_data);
1466                 if (ret < 0) {
1467                         of_node_put(node);
1468                         return ret;
1469                 }
1470         }
1471
1472         return 0;
1473 }
1474
1475 static struct platform_driver rpm_reg_driver = {
1476         .probe = rpm_reg_probe,
1477         .driver = {
1478                 .name  = "qcom_rpm_smd_regulator",
1479                 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1480                 .of_match_table = rpm_of_match,
1481         },
1482 };
1483
1484 static int __init rpm_reg_init(void)
1485 {
1486         return platform_driver_register(&rpm_reg_driver);
1487 }
1488 subsys_initcall(rpm_reg_init);
1489
1490 static void __exit rpm_reg_exit(void)
1491 {
1492         platform_driver_unregister(&rpm_reg_driver);
1493 }
1494 module_exit(rpm_reg_exit)
1495
1496 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
1497 MODULE_LICENSE("GPL v2");