drivers/regulator/ab8500.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) ST-Ericsson SA 2010
   4  *
   5  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   6  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   7  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   8  *
   9  * AB8500 peripheral regulators
  10  *
  11  * AB8500 supports the following regulators:
  12  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  13  *
  14  * AB8505 supports the following regulators:
  15  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  16  */
  17 #include <linux/init.h>
  18 #include <linux/kernel.h>
  19 #include <linux/module.h>
  20 #include <linux/err.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/mfd/abx500.h>
  23 #include <linux/mfd/abx500/ab8500.h>
  24 #include <linux/of.h>
  25 #include <linux/regulator/of_regulator.h>
  26 #include <linux/regulator/driver.h>
  27 #include <linux/regulator/machine.h>
  28 #include <linux/regulator/ab8500.h>
  29 #include <linux/slab.h>
  30
  31 /**
  32  * struct ab8500_shared_mode - is used when mode is shared between
  33  * two regulators.
  34  * @shared_regulator: pointer to the other sharing regulator
  35  * @lp_mode_req: low power mode requested by this regulator
  36  */
  37 struct ab8500_shared_mode {
  38         struct ab8500_regulator_info *shared_regulator;
  39         bool lp_mode_req;
  40 };
  41
  42 /**
  43  * struct ab8500_regulator_info - ab8500 regulator information
  44  * @dev: device pointer
  45  * @desc: regulator description
  46  * @shared_mode: used when mode is shared between two regulators
  47  * @load_lp_uA: maximum load in idle (low power) mode
  48  * @update_bank: bank to control on/off
  49  * @update_reg: register to control on/off
  50  * @update_mask: mask to enable/disable and set mode of regulator
  51  * @update_val: bits holding the regulator current mode
  52  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  53  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  54  * @mode_bank: bank with location of mode register
  55  * @mode_reg: mode register
  56  * @mode_mask: mask for setting mode
  57  * @mode_val_idle: mode setting for low power
  58  * @mode_val_normal: mode setting for normal power
  59  * @voltage_bank: bank to control regulator voltage
  60  * @voltage_reg: register to control regulator voltage
  61  * @voltage_mask: mask to control regulator voltage
  62  * @expand_register:
  63  */
  64 struct ab8500_regulator_info {
  65         struct device           *dev;
  66         struct regulator_desc   desc;
  67         struct ab8500_shared_mode *shared_mode;
  68         int load_lp_uA;
  69         u8 update_bank;
  70         u8 update_reg;
  71         u8 update_mask;
  72         u8 update_val;
  73         u8 update_val_idle;
  74         u8 update_val_normal;
  75         u8 mode_bank;
  76         u8 mode_reg;
  77         u8 mode_mask;
  78         u8 mode_val_idle;
  79         u8 mode_val_normal;
  80         u8 voltage_bank;
  81         u8 voltage_reg;
  82         u8 voltage_mask;
  83 };
  84
  85 /* voltage tables for the vauxn/vintcore supplies */
  86 static const unsigned int ldo_vauxn_voltages[] = {
  87         1100000,
  88         1200000,
  89         1300000,
  90         1400000,
  91         1500000,
  92         1800000,
  93         1850000,
  94         1900000,
  95         2500000,
  96         2650000,
  97         2700000,
  98         2750000,
  99         2800000,
 100         2900000,
 101         3000000,
 102         3300000,
 103 };
 104
 105 static const unsigned int ldo_vaux3_voltages[] = {
 106         1200000,
 107         1500000,
 108         1800000,
 109         2100000,
 110         2500000,
 111         2750000,
 112         2790000,
 113         2910000,
 114 };
 115
 116 static const unsigned int ldo_vaux56_voltages[] = {
 117         1800000,
 118         1050000,
 119         1100000,
 120         1200000,
 121         1500000,
 122         2200000,
 123         2500000,
 124         2790000,
 125 };
 126
 127 static const unsigned int ldo_vintcore_voltages[] = {
 128         1200000,
 129         1225000,
 130         1250000,
 131         1275000,
 132         1300000,
 133         1325000,
 134         1350000,
 135 };
 136
 137 static const unsigned int fixed_1200000_voltage[] = {
 138         1200000,
 139 };
 140
 141 static const unsigned int fixed_1800000_voltage[] = {
 142         1800000,
 143 };
 144
 145 static const unsigned int fixed_2000000_voltage[] = {
 146         2000000,
 147 };
 148
 149 static const unsigned int fixed_2050000_voltage[] = {
 150         2050000,
 151 };
 152
 153 static const unsigned int ldo_vana_voltages[] = {
 154         1050000,
 155         1075000,
 156         1100000,
 157         1125000,
 158         1150000,
 159         1175000,
 160         1200000,
 161         1225000,
 162 };
 163
 164 static const unsigned int ldo_vaudio_voltages[] = {
 165         2000000,
 166         2100000,
 167         2200000,
 168         2300000,
 169         2400000,
 170         2500000,
 171         2600000,
 172         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 173 };
 174
 175 static DEFINE_MUTEX(shared_mode_mutex);
 176 static struct ab8500_shared_mode ldo_anamic1_shared;
 177 static struct ab8500_shared_mode ldo_anamic2_shared;
 178
 179 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 180 {
 181         int ret;
 182         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 183
 184         if (info == NULL) {
 185                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 186                 return -EINVAL;
 187         }
 188
 189         ret = abx500_mask_and_set_register_interruptible(info->dev,
 190                 info->update_bank, info->update_reg,
 191                 info->update_mask, info->update_val);
 192         if (ret < 0) {
 193                 dev_err(rdev_get_dev(rdev),
 194                         "couldn't set enable bits for regulator\n");
 195                 return ret;
 196         }
 197
 198         dev_vdbg(rdev_get_dev(rdev),
 199                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 200                 info->desc.name, info->update_bank, info->update_reg,
 201                 info->update_mask, info->update_val);
 202
 203         return ret;
 204 }
 205
 206 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 207 {
 208         int ret;
 209         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 210
 211         if (info == NULL) {
 212                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 213                 return -EINVAL;
 214         }
 215
 216         ret = abx500_mask_and_set_register_interruptible(info->dev,
 217                 info->update_bank, info->update_reg,
 218                 info->update_mask, 0x0);
 219         if (ret < 0) {
 220                 dev_err(rdev_get_dev(rdev),
 221                         "couldn't set disable bits for regulator\n");
 222                 return ret;
 223         }
 224
 225         dev_vdbg(rdev_get_dev(rdev),
 226                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 227                 info->desc.name, info->update_bank, info->update_reg,
 228                 info->update_mask, 0x0);
 229
 230         return ret;
 231 }
 232
 233 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 234 {
 235         int ret;
 236         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 237         u8 regval;
 238
 239         if (info == NULL) {
 240                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 241                 return -EINVAL;
 242         }
 243
 244         ret = abx500_get_register_interruptible(info->dev,
 245                 info->update_bank, info->update_reg, &regval);
 246         if (ret < 0) {
 247                 dev_err(rdev_get_dev(rdev),
 248                         "couldn't read 0x%x register\n", info->update_reg);
 249                 return ret;
 250         }
 251
 252         dev_vdbg(rdev_get_dev(rdev),
 253                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 254                 " 0x%x\n",
 255                 info->desc.name, info->update_bank, info->update_reg,
 256                 info->update_mask, regval);
 257
 258         if (regval & info->update_mask)
 259                 return 1;
 260         else
 261                 return 0;
 262 }
 263
 264 static unsigned int ab8500_regulator_get_optimum_mode(
 265                 struct regulator_dev *rdev, int input_uV,
 266                 int output_uV, int load_uA)
 267 {
 268         unsigned int mode;
 269
 270         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 271
 272         if (info == NULL) {
 273                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 274                 return -EINVAL;
 275         }
 276
 277         if (load_uA <= info->load_lp_uA)
 278                 mode = REGULATOR_MODE_IDLE;
 279         else
 280                 mode = REGULATOR_MODE_NORMAL;
 281
 282         return mode;
 283 }
 284
 285 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 286                                      unsigned int mode)
 287 {
 288         int ret = 0;
 289         u8 bank, reg, mask, val;
 290         bool lp_mode_req = false;
 291         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 292
 293         if (info == NULL) {
 294                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 295                 return -EINVAL;
 296         }
 297
 298         if (info->mode_mask) {
 299                 bank = info->mode_bank;
 300                 reg = info->mode_reg;
 301                 mask = info->mode_mask;
 302         } else {
 303                 bank = info->update_bank;
 304                 reg = info->update_reg;
 305                 mask = info->update_mask;
 306         }
 307
 308         if (info->shared_mode)
 309                 mutex_lock(&shared_mode_mutex);
 310
 311         switch (mode) {
 312         case REGULATOR_MODE_NORMAL:
 313                 if (info->shared_mode)
 314                         lp_mode_req = false;
 315
 316                 if (info->mode_mask)
 317                         val = info->mode_val_normal;
 318                 else
 319                         val = info->update_val_normal;
 320                 break;
 321         case REGULATOR_MODE_IDLE:
 322                 if (info->shared_mode) {
 323                         struct ab8500_regulator_info *shared_regulator;
 324
 325                         shared_regulator = info->shared_mode->shared_regulator;
 326                         if (!shared_regulator->shared_mode->lp_mode_req) {
 327                                 /* Other regulator prevent LP mode */
 328                                 info->shared_mode->lp_mode_req = true;
 329                                 goto out_unlock;
 330                         }
 331
 332                         lp_mode_req = true;
 333                 }
 334
 335                 if (info->mode_mask)
 336                         val = info->mode_val_idle;
 337                 else
 338                         val = info->update_val_idle;
 339                 break;
 340         default:
 341                 ret = -EINVAL;
 342                 goto out_unlock;
 343         }
 344
 345         if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
 346                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 347                         bank, reg, mask, val);
 348                 if (ret < 0) {
 349                         dev_err(rdev_get_dev(rdev),
 350                                 "couldn't set regulator mode\n");
 351                         goto out_unlock;
 352                 }
 353
 354                 dev_vdbg(rdev_get_dev(rdev),
 355                         "%s-set_mode (bank, reg, mask, value): "
 356                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 357                         info->desc.name, bank, reg,
 358                         mask, val);
 359         }
 360
 361         if (!info->mode_mask)
 362                 info->update_val = val;
 363
 364         if (info->shared_mode)
 365                 info->shared_mode->lp_mode_req = lp_mode_req;
 366
 367 out_unlock:
 368         if (info->shared_mode)
 369                 mutex_unlock(&shared_mode_mutex);
 370
 371         return ret;
 372 }
 373
 374 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 375 {
 376         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 377         int ret;
 378         u8 val;
 379         u8 val_normal;
 380         u8 val_idle;
 381
 382         if (info == NULL) {
 383                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 384                 return -EINVAL;
 385         }
 386
 387         /* Need special handling for shared mode */
 388         if (info->shared_mode) {
 389                 if (info->shared_mode->lp_mode_req)
 390                         return REGULATOR_MODE_IDLE;
 391                 else
 392                         return REGULATOR_MODE_NORMAL;
 393         }
 394
 395         if (info->mode_mask) {
 396                 /* Dedicated register for handling mode */
 397                 ret = abx500_get_register_interruptible(info->dev,
 398                 info->mode_bank, info->mode_reg, &val);
 399                 val = val & info->mode_mask;
 400
 401                 val_normal = info->mode_val_normal;
 402                 val_idle = info->mode_val_idle;
 403         } else {
 404                 /* Mode register same as enable register */
 405                 val = info->update_val;
 406                 val_normal = info->update_val_normal;
 407                 val_idle = info->update_val_idle;
 408         }
 409
 410         if (val == val_normal)
 411                 ret = REGULATOR_MODE_NORMAL;
 412         else if (val == val_idle)
 413                 ret = REGULATOR_MODE_IDLE;
 414         else
 415                 ret = -EINVAL;
 416
 417         return ret;
 418 }
 419
 420 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 421 {
 422         int ret, voltage_shift;
 423         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 424         u8 regval;
 425
 426         if (info == NULL) {
 427                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 428                 return -EINVAL;
 429         }
 430
 431         voltage_shift = ffs(info->voltage_mask) - 1;
 432
 433         ret = abx500_get_register_interruptible(info->dev,
 434                         info->voltage_bank, info->voltage_reg, &regval);
 435         if (ret < 0) {
 436                 dev_err(rdev_get_dev(rdev),
 437                         "couldn't read voltage reg for regulator\n");
 438                 return ret;
 439         }
 440
 441         dev_vdbg(rdev_get_dev(rdev),
 442                 "%s-get_voltage (bank, reg, mask, shift, value): "
 443                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 444                 info->desc.name, info->voltage_bank,
 445                 info->voltage_reg, info->voltage_mask,
 446                 voltage_shift, regval);
 447
 448         return (regval & info->voltage_mask) >> voltage_shift;
 449 }
 450
 451 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 452                                             unsigned selector)
 453 {
 454         int ret, voltage_shift;
 455         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 456         u8 regval;
 457
 458         if (info == NULL) {
 459                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 460                 return -EINVAL;
 461         }
 462
 463         voltage_shift = ffs(info->voltage_mask) - 1;
 464
 465         /* set the registers for the request */
 466         regval = (u8)selector << voltage_shift;
 467         ret = abx500_mask_and_set_register_interruptible(info->dev,
 468                         info->voltage_bank, info->voltage_reg,
 469                         info->voltage_mask, regval);
 470         if (ret < 0)
 471                 dev_err(rdev_get_dev(rdev),
 472                 "couldn't set voltage reg for regulator\n");
 473
 474         dev_vdbg(rdev_get_dev(rdev),
 475                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 476                 " 0x%x\n",
 477                 info->desc.name, info->voltage_bank, info->voltage_reg,
 478                 info->voltage_mask, regval);
 479
 480         return ret;
 481 }
 482
 483 static const struct regulator_ops ab8500_regulator_volt_mode_ops = {
 484         .enable                 = ab8500_regulator_enable,
 485         .disable                = ab8500_regulator_disable,
 486         .is_enabled             = ab8500_regulator_is_enabled,
 487         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 488         .set_mode               = ab8500_regulator_set_mode,
 489         .get_mode               = ab8500_regulator_get_mode,
 490         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 491         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 492         .list_voltage           = regulator_list_voltage_table,
 493 };
 494
 495 static const struct regulator_ops ab8500_regulator_volt_ops = {
 496         .enable         = ab8500_regulator_enable,
 497         .disable        = ab8500_regulator_disable,
 498         .is_enabled     = ab8500_regulator_is_enabled,
 499         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 500         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 501         .list_voltage   = regulator_list_voltage_table,
 502 };
 503
 504 static const struct regulator_ops ab8500_regulator_mode_ops = {
 505         .enable                 = ab8500_regulator_enable,
 506         .disable                = ab8500_regulator_disable,
 507         .is_enabled             = ab8500_regulator_is_enabled,
 508         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 509         .set_mode               = ab8500_regulator_set_mode,
 510         .get_mode               = ab8500_regulator_get_mode,
 511         .list_voltage           = regulator_list_voltage_table,
 512 };
 513
 514 static const struct regulator_ops ab8500_regulator_ops = {
 515         .enable                 = ab8500_regulator_enable,
 516         .disable                = ab8500_regulator_disable,
 517         .is_enabled             = ab8500_regulator_is_enabled,
 518         .list_voltage           = regulator_list_voltage_table,
 519 };
 520
 521 static const struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 522         .enable         = ab8500_regulator_enable,
 523         .disable        = ab8500_regulator_disable,
 524         .is_enabled     = ab8500_regulator_is_enabled,
 525         .set_mode       = ab8500_regulator_set_mode,
 526         .get_mode       = ab8500_regulator_get_mode,
 527         .list_voltage   = regulator_list_voltage_table,
 528 };
 529
 530 /* AB8500 regulator information */
 531 static struct ab8500_regulator_info
 532                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 533         /*
 534          * Variable Voltage Regulators
 535          *   name, min mV, max mV,
 536          *   update bank, reg, mask, enable val
 537          *   volt bank, reg, mask
 538          */
 539         [AB8500_LDO_AUX1] = {
 540                 .desc = {
 541                         .name           = "LDO-AUX1",
 542                         .ops            = &ab8500_regulator_volt_mode_ops,
 543                         .type           = REGULATOR_VOLTAGE,
 544                         .id             = AB8500_LDO_AUX1,
 545                         .owner          = THIS_MODULE,
 546                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 547                         .volt_table     = ldo_vauxn_voltages,
 548                         .enable_time    = 200,
 549                         .supply_name    = "vin",
 550                 },
 551                 .load_lp_uA             = 5000,
 552                 .update_bank            = 0x04,
 553                 .update_reg             = 0x09,
 554                 .update_mask            = 0x03,
 555                 .update_val             = 0x01,
 556                 .update_val_idle        = 0x03,
 557                 .update_val_normal      = 0x01,
 558                 .voltage_bank           = 0x04,
 559                 .voltage_reg            = 0x1f,
 560                 .voltage_mask           = 0x0f,
 561         },
 562         [AB8500_LDO_AUX2] = {
 563                 .desc = {
 564                         .name           = "LDO-AUX2",
 565                         .ops            = &ab8500_regulator_volt_mode_ops,
 566                         .type           = REGULATOR_VOLTAGE,
 567                         .id             = AB8500_LDO_AUX2,
 568                         .owner          = THIS_MODULE,
 569                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 570                         .volt_table     = ldo_vauxn_voltages,
 571                         .enable_time    = 200,
 572                         .supply_name    = "vin",
 573                 },
 574                 .load_lp_uA             = 5000,
 575                 .update_bank            = 0x04,
 576                 .update_reg             = 0x09,
 577                 .update_mask            = 0x0c,
 578                 .update_val             = 0x04,
 579                 .update_val_idle        = 0x0c,
 580                 .update_val_normal      = 0x04,
 581                 .voltage_bank           = 0x04,
 582                 .voltage_reg            = 0x20,
 583                 .voltage_mask           = 0x0f,
 584         },
 585         [AB8500_LDO_AUX3] = {
 586                 .desc = {
 587                         .name           = "LDO-AUX3",
 588                         .ops            = &ab8500_regulator_volt_mode_ops,
 589                         .type           = REGULATOR_VOLTAGE,
 590                         .id             = AB8500_LDO_AUX3,
 591                         .owner          = THIS_MODULE,
 592                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 593                         .volt_table     = ldo_vaux3_voltages,
 594                         .enable_time    = 450,
 595                         .supply_name    = "vin",
 596                 },
 597                 .load_lp_uA             = 5000,
 598                 .update_bank            = 0x04,
 599                 .update_reg             = 0x0a,
 600                 .update_mask            = 0x03,
 601                 .update_val             = 0x01,
 602                 .update_val_idle        = 0x03,
 603                 .update_val_normal      = 0x01,
 604                 .voltage_bank           = 0x04,
 605                 .voltage_reg            = 0x21,
 606                 .voltage_mask           = 0x07,
 607         },
 608         [AB8500_LDO_INTCORE] = {
 609                 .desc = {
 610                         .name           = "LDO-INTCORE",
 611                         .ops            = &ab8500_regulator_volt_mode_ops,
 612                         .type           = REGULATOR_VOLTAGE,
 613                         .id             = AB8500_LDO_INTCORE,
 614                         .owner          = THIS_MODULE,
 615                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 616                         .volt_table     = ldo_vintcore_voltages,
 617                         .enable_time    = 750,
 618                 },
 619                 .load_lp_uA             = 5000,
 620                 .update_bank            = 0x03,
 621                 .update_reg             = 0x80,
 622                 .update_mask            = 0x44,
 623                 .update_val             = 0x44,
 624                 .update_val_idle        = 0x44,
 625                 .update_val_normal      = 0x04,
 626                 .voltage_bank           = 0x03,
 627                 .voltage_reg            = 0x80,
 628                 .voltage_mask           = 0x38,
 629         },
 630
 631         /*
 632          * Fixed Voltage Regulators
 633          *   name, fixed mV,
 634          *   update bank, reg, mask, enable val
 635          */
 636         [AB8500_LDO_TVOUT] = {
 637                 .desc = {
 638                         .name           = "LDO-TVOUT",
 639                         .ops            = &ab8500_regulator_mode_ops,
 640                         .type           = REGULATOR_VOLTAGE,
 641                         .id             = AB8500_LDO_TVOUT,
 642                         .owner          = THIS_MODULE,
 643                         .n_voltages     = 1,
 644                         .volt_table     = fixed_2000000_voltage,
 645                         .enable_time    = 500,
 646                 },
 647                 .load_lp_uA             = 1000,
 648                 .update_bank            = 0x03,
 649                 .update_reg             = 0x80,
 650                 .update_mask            = 0x82,
 651                 .update_val             = 0x02,
 652                 .update_val_idle        = 0x82,
 653                 .update_val_normal      = 0x02,
 654         },
 655         [AB8500_LDO_AUDIO] = {
 656                 .desc = {
 657                         .name           = "LDO-AUDIO",
 658                         .ops            = &ab8500_regulator_ops,
 659                         .type           = REGULATOR_VOLTAGE,
 660                         .id             = AB8500_LDO_AUDIO,
 661                         .owner          = THIS_MODULE,
 662                         .n_voltages     = 1,
 663                         .enable_time    = 140,
 664                         .volt_table     = fixed_2000000_voltage,
 665                 },
 666                 .update_bank            = 0x03,
 667                 .update_reg             = 0x83,
 668                 .update_mask            = 0x02,
 669                 .update_val             = 0x02,
 670         },
 671         [AB8500_LDO_ANAMIC1] = {
 672                 .desc = {
 673                         .name           = "LDO-ANAMIC1",
 674                         .ops            = &ab8500_regulator_ops,
 675                         .type           = REGULATOR_VOLTAGE,
 676                         .id             = AB8500_LDO_ANAMIC1,
 677                         .owner          = THIS_MODULE,
 678                         .n_voltages     = 1,
 679                         .enable_time    = 500,
 680                         .volt_table     = fixed_2050000_voltage,
 681                 },
 682                 .update_bank            = 0x03,
 683                 .update_reg             = 0x83,
 684                 .update_mask            = 0x08,
 685                 .update_val             = 0x08,
 686         },
 687         [AB8500_LDO_ANAMIC2] = {
 688                 .desc = {
 689                         .name           = "LDO-ANAMIC2",
 690                         .ops            = &ab8500_regulator_ops,
 691                         .type           = REGULATOR_VOLTAGE,
 692                         .id             = AB8500_LDO_ANAMIC2,
 693                         .owner          = THIS_MODULE,
 694                         .n_voltages     = 1,
 695                         .enable_time    = 500,
 696                         .volt_table     = fixed_2050000_voltage,
 697                 },
 698                 .update_bank            = 0x03,
 699                 .update_reg             = 0x83,
 700                 .update_mask            = 0x10,
 701                 .update_val             = 0x10,
 702         },
 703         [AB8500_LDO_DMIC] = {
 704                 .desc = {
 705                         .name           = "LDO-DMIC",
 706                         .ops            = &ab8500_regulator_ops,
 707                         .type           = REGULATOR_VOLTAGE,
 708                         .id             = AB8500_LDO_DMIC,
 709                         .owner          = THIS_MODULE,
 710                         .n_voltages     = 1,
 711                         .enable_time    = 420,
 712                         .volt_table     = fixed_1800000_voltage,
 713                 },
 714                 .update_bank            = 0x03,
 715                 .update_reg             = 0x83,
 716                 .update_mask            = 0x04,
 717                 .update_val             = 0x04,
 718         },
 719
 720         /*
 721          * Regulators with fixed voltage and normal/idle modes
 722          */
 723         [AB8500_LDO_ANA] = {
 724                 .desc = {
 725                         .name           = "LDO-ANA",
 726                         .ops            = &ab8500_regulator_mode_ops,
 727                         .type           = REGULATOR_VOLTAGE,
 728                         .id             = AB8500_LDO_ANA,
 729                         .owner          = THIS_MODULE,
 730                         .n_voltages     = 1,
 731                         .enable_time    = 140,
 732                         .volt_table     = fixed_1200000_voltage,
 733                 },
 734                 .load_lp_uA             = 1000,
 735                 .update_bank            = 0x04,
 736                 .update_reg             = 0x06,
 737                 .update_mask            = 0x0c,
 738                 .update_val             = 0x04,
 739                 .update_val_idle        = 0x0c,
 740                 .update_val_normal      = 0x04,
 741         },
 742 };
 743
 744 /* AB8505 regulator information */
 745 static struct ab8500_regulator_info
 746                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 747         /*
 748          * Variable Voltage Regulators
 749          *   name, min mV, max mV,
 750          *   update bank, reg, mask, enable val
 751          *   volt bank, reg, mask
 752          */
 753         [AB8505_LDO_AUX1] = {
 754                 .desc = {
 755                         .name           = "LDO-AUX1",
 756                         .ops            = &ab8500_regulator_volt_mode_ops,
 757                         .type           = REGULATOR_VOLTAGE,
 758                         .id             = AB8505_LDO_AUX1,
 759                         .owner          = THIS_MODULE,
 760                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 761                         .volt_table     = ldo_vauxn_voltages,
 762                 },
 763                 .load_lp_uA             = 5000,
 764                 .update_bank            = 0x04,
 765                 .update_reg             = 0x09,
 766                 .update_mask            = 0x03,
 767                 .update_val             = 0x01,
 768                 .update_val_idle        = 0x03,
 769                 .update_val_normal      = 0x01,
 770                 .voltage_bank           = 0x04,
 771                 .voltage_reg            = 0x1f,
 772                 .voltage_mask           = 0x0f,
 773         },
 774         [AB8505_LDO_AUX2] = {
 775                 .desc = {
 776                         .name           = "LDO-AUX2",
 777                         .ops            = &ab8500_regulator_volt_mode_ops,
 778                         .type           = REGULATOR_VOLTAGE,
 779                         .id             = AB8505_LDO_AUX2,
 780                         .owner          = THIS_MODULE,
 781                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 782                         .volt_table     = ldo_vauxn_voltages,
 783                 },
 784                 .load_lp_uA             = 5000,
 785                 .update_bank            = 0x04,
 786                 .update_reg             = 0x09,
 787                 .update_mask            = 0x0c,
 788                 .update_val             = 0x04,
 789                 .update_val_idle        = 0x0c,
 790                 .update_val_normal      = 0x04,
 791                 .voltage_bank           = 0x04,
 792                 .voltage_reg            = 0x20,
 793                 .voltage_mask           = 0x0f,
 794         },
 795         [AB8505_LDO_AUX3] = {
 796                 .desc = {
 797                         .name           = "LDO-AUX3",
 798                         .ops            = &ab8500_regulator_volt_mode_ops,
 799                         .type           = REGULATOR_VOLTAGE,
 800                         .id             = AB8505_LDO_AUX3,
 801                         .owner          = THIS_MODULE,
 802                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 803                         .volt_table     = ldo_vaux3_voltages,
 804                 },
 805                 .load_lp_uA             = 5000,
 806                 .update_bank            = 0x04,
 807                 .update_reg             = 0x0a,
 808                 .update_mask            = 0x03,
 809                 .update_val             = 0x01,
 810                 .update_val_idle        = 0x03,
 811                 .update_val_normal      = 0x01,
 812                 .voltage_bank           = 0x04,
 813                 .voltage_reg            = 0x21,
 814                 .voltage_mask           = 0x07,
 815         },
 816         [AB8505_LDO_AUX4] = {
 817                 .desc = {
 818                         .name           = "LDO-AUX4",
 819                         .ops            = &ab8500_regulator_volt_mode_ops,
 820                         .type           = REGULATOR_VOLTAGE,
 821                         .id             = AB8505_LDO_AUX4,
 822                         .owner          = THIS_MODULE,
 823                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 824                         .volt_table     = ldo_vauxn_voltages,
 825                 },
 826                 .load_lp_uA             = 5000,
 827                 /* values for Vaux4Regu register */
 828                 .update_bank            = 0x04,
 829                 .update_reg             = 0x2e,
 830                 .update_mask            = 0x03,
 831                 .update_val             = 0x01,
 832                 .update_val_idle        = 0x03,
 833                 .update_val_normal      = 0x01,
 834                 /* values for Vaux4SEL register */
 835                 .voltage_bank           = 0x04,
 836                 .voltage_reg            = 0x2f,
 837                 .voltage_mask           = 0x0f,
 838         },
 839         [AB8505_LDO_AUX5] = {
 840                 .desc = {
 841                         .name           = "LDO-AUX5",
 842                         .ops            = &ab8500_regulator_volt_mode_ops,
 843                         .type           = REGULATOR_VOLTAGE,
 844                         .id             = AB8505_LDO_AUX5,
 845                         .owner          = THIS_MODULE,
 846                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 847                         .volt_table     = ldo_vaux56_voltages,
 848                 },
 849                 .load_lp_uA             = 2000,
 850                 /* values for CtrlVaux5 register */
 851                 .update_bank            = 0x01,
 852                 .update_reg             = 0x55,
 853                 .update_mask            = 0x18,
 854                 .update_val             = 0x10,
 855                 .update_val_idle        = 0x18,
 856                 .update_val_normal      = 0x10,
 857                 .voltage_bank           = 0x01,
 858                 .voltage_reg            = 0x55,
 859                 .voltage_mask           = 0x07,
 860         },
 861         [AB8505_LDO_AUX6] = {
 862                 .desc = {
 863                         .name           = "LDO-AUX6",
 864                         .ops            = &ab8500_regulator_volt_mode_ops,
 865                         .type           = REGULATOR_VOLTAGE,
 866                         .id             = AB8505_LDO_AUX6,
 867                         .owner          = THIS_MODULE,
 868                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 869                         .volt_table     = ldo_vaux56_voltages,
 870                 },
 871                 .load_lp_uA             = 2000,
 872                 /* values for CtrlVaux6 register */
 873                 .update_bank            = 0x01,
 874                 .update_reg             = 0x56,
 875                 .update_mask            = 0x18,
 876                 .update_val             = 0x10,
 877                 .update_val_idle        = 0x18,
 878                 .update_val_normal      = 0x10,
 879                 .voltage_bank           = 0x01,
 880                 .voltage_reg            = 0x56,
 881                 .voltage_mask           = 0x07,
 882         },
 883         [AB8505_LDO_INTCORE] = {
 884                 .desc = {
 885                         .name           = "LDO-INTCORE",
 886                         .ops            = &ab8500_regulator_volt_mode_ops,
 887                         .type           = REGULATOR_VOLTAGE,
 888                         .id             = AB8505_LDO_INTCORE,
 889                         .owner          = THIS_MODULE,
 890                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 891                         .volt_table     = ldo_vintcore_voltages,
 892                 },
 893                 .load_lp_uA             = 5000,
 894                 .update_bank            = 0x03,
 895                 .update_reg             = 0x80,
 896                 .update_mask            = 0x44,
 897                 .update_val             = 0x04,
 898                 .update_val_idle        = 0x44,
 899                 .update_val_normal      = 0x04,
 900                 .voltage_bank           = 0x03,
 901                 .voltage_reg            = 0x80,
 902                 .voltage_mask           = 0x38,
 903         },
 904
 905         /*
 906          * Fixed Voltage Regulators
 907          *   name, fixed mV,
 908          *   update bank, reg, mask, enable val
 909          */
 910         [AB8505_LDO_ADC] = {
 911                 .desc = {
 912                         .name           = "LDO-ADC",
 913                         .ops            = &ab8500_regulator_mode_ops,
 914                         .type           = REGULATOR_VOLTAGE,
 915                         .id             = AB8505_LDO_ADC,
 916                         .owner          = THIS_MODULE,
 917                         .n_voltages     = 1,
 918                         .volt_table     = fixed_2000000_voltage,
 919                         .enable_time    = 10000,
 920                 },
 921                 .load_lp_uA             = 1000,
 922                 .update_bank            = 0x03,
 923                 .update_reg             = 0x80,
 924                 .update_mask            = 0x82,
 925                 .update_val             = 0x02,
 926                 .update_val_idle        = 0x82,
 927                 .update_val_normal      = 0x02,
 928         },
 929         [AB8505_LDO_AUDIO] = {
 930                 .desc = {
 931                         .name           = "LDO-AUDIO",
 932                         .ops            = &ab8500_regulator_volt_ops,
 933                         .type           = REGULATOR_VOLTAGE,
 934                         .id             = AB8505_LDO_AUDIO,
 935                         .owner          = THIS_MODULE,
 936                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
 937                         .volt_table     = ldo_vaudio_voltages,
 938                 },
 939                 .update_bank            = 0x03,
 940                 .update_reg             = 0x83,
 941                 .update_mask            = 0x02,
 942                 .update_val             = 0x02,
 943                 .voltage_bank           = 0x01,
 944                 .voltage_reg            = 0x57,
 945                 .voltage_mask           = 0x70,
 946         },
 947         [AB8505_LDO_ANAMIC1] = {
 948                 .desc = {
 949                         .name           = "LDO-ANAMIC1",
 950                         .ops            = &ab8500_regulator_anamic_mode_ops,
 951                         .type           = REGULATOR_VOLTAGE,
 952                         .id             = AB8505_LDO_ANAMIC1,
 953                         .owner          = THIS_MODULE,
 954                         .n_voltages     = 1,
 955                         .volt_table     = fixed_2050000_voltage,
 956                 },
 957                 .shared_mode            = &ldo_anamic1_shared,
 958                 .update_bank            = 0x03,
 959                 .update_reg             = 0x83,
 960                 .update_mask            = 0x08,
 961                 .update_val             = 0x08,
 962                 .mode_bank              = 0x01,
 963                 .mode_reg               = 0x54,
 964                 .mode_mask              = 0x04,
 965                 .mode_val_idle          = 0x04,
 966                 .mode_val_normal        = 0x00,
 967         },
 968         [AB8505_LDO_ANAMIC2] = {
 969                 .desc = {
 970                         .name           = "LDO-ANAMIC2",
 971                         .ops            = &ab8500_regulator_anamic_mode_ops,
 972                         .type           = REGULATOR_VOLTAGE,
 973                         .id             = AB8505_LDO_ANAMIC2,
 974                         .owner          = THIS_MODULE,
 975                         .n_voltages     = 1,
 976                         .volt_table     = fixed_2050000_voltage,
 977                 },
 978                 .shared_mode            = &ldo_anamic2_shared,
 979                 .update_bank            = 0x03,
 980                 .update_reg             = 0x83,
 981                 .update_mask            = 0x10,
 982                 .update_val             = 0x10,
 983                 .mode_bank              = 0x01,
 984                 .mode_reg               = 0x54,
 985                 .mode_mask              = 0x04,
 986                 .mode_val_idle          = 0x04,
 987                 .mode_val_normal        = 0x00,
 988         },
 989         [AB8505_LDO_AUX8] = {
 990                 .desc = {
 991                         .name           = "LDO-AUX8",
 992                         .ops            = &ab8500_regulator_ops,
 993                         .type           = REGULATOR_VOLTAGE,
 994                         .id             = AB8505_LDO_AUX8,
 995                         .owner          = THIS_MODULE,
 996                         .n_voltages     = 1,
 997                         .volt_table     = fixed_1800000_voltage,
 998                 },
 999                 .update_bank            = 0x03,
1000                 .update_reg             = 0x83,
1001                 .update_mask            = 0x04,
1002                 .update_val             = 0x04,
1003         },
1004         /*
1005          * Regulators with fixed voltage and normal/idle modes
1006          */
1007         [AB8505_LDO_ANA] = {
1008                 .desc = {
1009                         .name           = "LDO-ANA",
1010                         .ops            = &ab8500_regulator_volt_mode_ops,
1011                         .type           = REGULATOR_VOLTAGE,
1012                         .id             = AB8505_LDO_ANA,
1013                         .owner          = THIS_MODULE,
1014                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1015                         .volt_table     = ldo_vana_voltages,
1016                 },
1017                 .load_lp_uA             = 1000,
1018                 .update_bank            = 0x04,
1019                 .update_reg             = 0x06,
1020                 .update_mask            = 0x0c,
1021                 .update_val             = 0x04,
1022                 .update_val_idle        = 0x0c,
1023                 .update_val_normal      = 0x04,
1024                 .voltage_bank           = 0x04,
1025                 .voltage_reg            = 0x29,
1026                 .voltage_mask           = 0x7,
1027         },
1028 };
1029
1030 static struct ab8500_shared_mode ldo_anamic1_shared = {
1031         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1032 };
1033
1034 static struct ab8500_shared_mode ldo_anamic2_shared = {
1035         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1036 };
1037
1038 struct ab8500_reg_init {
1039         u8 bank;
1040         u8 addr;
1041         u8 mask;
1042 };
1043
1044 #define REG_INIT(_id, _bank, _addr, _mask)      \
1045         [_id] = {                               \
1046                 .bank = _bank,                  \
1047                 .addr = _addr,                  \
1048                 .mask = _mask,                  \
1049         }
1050
1051 /* AB8500 register init */
1052 static struct ab8500_reg_init ab8500_reg_init[] = {
1053         /*
1054          * 0x30, VanaRequestCtrl
1055          * 0xc0, VextSupply1RequestCtrl
1056          */
1057         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1058         /*
1059          * 0x03, VextSupply2RequestCtrl
1060          * 0x0c, VextSupply3RequestCtrl
1061          * 0x30, Vaux1RequestCtrl
1062          * 0xc0, Vaux2RequestCtrl
1063          */
1064         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1065         /*
1066          * 0x03, Vaux3RequestCtrl
1067          * 0x04, SwHPReq
1068          */
1069         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1070         /*
1071          * 0x08, VanaSysClkReq1HPValid
1072          * 0x20, Vaux1SysClkReq1HPValid
1073          * 0x40, Vaux2SysClkReq1HPValid
1074          * 0x80, Vaux3SysClkReq1HPValid
1075          */
1076         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1077         /*
1078          * 0x10, VextSupply1SysClkReq1HPValid
1079          * 0x20, VextSupply2SysClkReq1HPValid
1080          * 0x40, VextSupply3SysClkReq1HPValid
1081          */
1082         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1083         /*
1084          * 0x08, VanaHwHPReq1Valid
1085          * 0x20, Vaux1HwHPReq1Valid
1086          * 0x40, Vaux2HwHPReq1Valid
1087          * 0x80, Vaux3HwHPReq1Valid
1088          */
1089         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1090         /*
1091          * 0x01, VextSupply1HwHPReq1Valid
1092          * 0x02, VextSupply2HwHPReq1Valid
1093          * 0x04, VextSupply3HwHPReq1Valid
1094          */
1095         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1096         /*
1097          * 0x08, VanaHwHPReq2Valid
1098          * 0x20, Vaux1HwHPReq2Valid
1099          * 0x40, Vaux2HwHPReq2Valid
1100          * 0x80, Vaux3HwHPReq2Valid
1101          */
1102         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1103         /*
1104          * 0x01, VextSupply1HwHPReq2Valid
1105          * 0x02, VextSupply2HwHPReq2Valid
1106          * 0x04, VextSupply3HwHPReq2Valid
1107          */
1108         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1109         /*
1110          * 0x20, VanaSwHPReqValid
1111          * 0x80, Vaux1SwHPReqValid
1112          */
1113         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1114         /*
1115          * 0x01, Vaux2SwHPReqValid
1116          * 0x02, Vaux3SwHPReqValid
1117          * 0x04, VextSupply1SwHPReqValid
1118          * 0x08, VextSupply2SwHPReqValid
1119          * 0x10, VextSupply3SwHPReqValid
1120          */
1121         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1122         /*
1123          * 0x02, SysClkReq2Valid1
1124          * 0x04, SysClkReq3Valid1
1125          * 0x08, SysClkReq4Valid1
1126          * 0x10, SysClkReq5Valid1
1127          * 0x20, SysClkReq6Valid1
1128          * 0x40, SysClkReq7Valid1
1129          * 0x80, SysClkReq8Valid1
1130          */
1131         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1132         /*
1133          * 0x02, SysClkReq2Valid2
1134          * 0x04, SysClkReq3Valid2
1135          * 0x08, SysClkReq4Valid2
1136          * 0x10, SysClkReq5Valid2
1137          * 0x20, SysClkReq6Valid2
1138          * 0x40, SysClkReq7Valid2
1139          * 0x80, SysClkReq8Valid2
1140          */
1141         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1142         /*
1143          * 0x02, VTVoutEna
1144          * 0x04, Vintcore12Ena
1145          * 0x38, Vintcore12Sel
1146          * 0x40, Vintcore12LP
1147          * 0x80, VTVoutLP
1148          */
1149         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1150         /*
1151          * 0x02, VaudioEna
1152          * 0x04, VdmicEna
1153          * 0x08, Vamic1Ena
1154          * 0x10, Vamic2Ena
1155          */
1156         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1157         /*
1158          * 0x01, Vamic1_dzout
1159          * 0x02, Vamic2_dzout
1160          */
1161         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1162         /*
1163          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1164          * 0x0c, VanaRegu
1165          */
1166         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1167         /*
1168          * 0x01, VrefDDREna
1169          * 0x02, VrefDDRSleepMode
1170          */
1171         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1172         /*
1173          * 0x03, VextSupply1Regu
1174          * 0x0c, VextSupply2Regu
1175          * 0x30, VextSupply3Regu
1176          * 0x40, ExtSupply2Bypass
1177          * 0x80, ExtSupply3Bypass
1178          */
1179         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1180         /*
1181          * 0x03, Vaux1Regu
1182          * 0x0c, Vaux2Regu
1183          */
1184         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1185         /*
1186          * 0x03, Vaux3Regu
1187          */
1188         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1189         /*
1190          * 0x0f, Vaux1Sel
1191          */
1192         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1193         /*
1194          * 0x0f, Vaux2Sel
1195          */
1196         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1197         /*
1198          * 0x07, Vaux3Sel
1199          */
1200         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1201         /*
1202          * 0x01, VextSupply12LP
1203          */
1204         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1205         /*
1206          * 0x04, Vaux1Disch
1207          * 0x08, Vaux2Disch
1208          * 0x10, Vaux3Disch
1209          * 0x20, Vintcore12Disch
1210          * 0x40, VTVoutDisch
1211          * 0x80, VaudioDisch
1212          */
1213         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1214         /*
1215          * 0x02, VanaDisch
1216          * 0x04, VdmicPullDownEna
1217          * 0x10, VdmicDisch
1218          */
1219         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1220 };
1221
1222 /* AB8505 register init */
1223 static struct ab8500_reg_init ab8505_reg_init[] = {
1224         /*
1225          * 0x03, VarmRequestCtrl
1226          * 0x0c, VsmpsCRequestCtrl
1227          * 0x30, VsmpsARequestCtrl
1228          * 0xc0, VsmpsBRequestCtrl
1229          */
1230         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1231         /*
1232          * 0x03, VsafeRequestCtrl
1233          * 0x0c, VpllRequestCtrl
1234          * 0x30, VanaRequestCtrl
1235          */
1236         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1237         /*
1238          * 0x30, Vaux1RequestCtrl
1239          * 0xc0, Vaux2RequestCtrl
1240          */
1241         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1242         /*
1243          * 0x03, Vaux3RequestCtrl
1244          * 0x04, SwHPReq
1245          */
1246         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1247         /*
1248          * 0x01, VsmpsASysClkReq1HPValid
1249          * 0x02, VsmpsBSysClkReq1HPValid
1250          * 0x04, VsafeSysClkReq1HPValid
1251          * 0x08, VanaSysClkReq1HPValid
1252          * 0x10, VpllSysClkReq1HPValid
1253          * 0x20, Vaux1SysClkReq1HPValid
1254          * 0x40, Vaux2SysClkReq1HPValid
1255          * 0x80, Vaux3SysClkReq1HPValid
1256          */
1257         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1258         /*
1259          * 0x01, VsmpsCSysClkReq1HPValid
1260          * 0x02, VarmSysClkReq1HPValid
1261          * 0x04, VbbSysClkReq1HPValid
1262          * 0x08, VsmpsMSysClkReq1HPValid
1263          */
1264         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1265         /*
1266          * 0x01, VsmpsAHwHPReq1Valid
1267          * 0x02, VsmpsBHwHPReq1Valid
1268          * 0x04, VsafeHwHPReq1Valid
1269          * 0x08, VanaHwHPReq1Valid
1270          * 0x10, VpllHwHPReq1Valid
1271          * 0x20, Vaux1HwHPReq1Valid
1272          * 0x40, Vaux2HwHPReq1Valid
1273          * 0x80, Vaux3HwHPReq1Valid
1274          */
1275         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
1276         /*
1277          * 0x08, VsmpsMHwHPReq1Valid
1278          */
1279         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
1280         /*
1281          * 0x01, VsmpsAHwHPReq2Valid
1282          * 0x02, VsmpsBHwHPReq2Valid
1283          * 0x04, VsafeHwHPReq2Valid
1284          * 0x08, VanaHwHPReq2Valid
1285          * 0x10, VpllHwHPReq2Valid
1286          * 0x20, Vaux1HwHPReq2Valid
1287          * 0x40, Vaux2HwHPReq2Valid
1288          * 0x80, Vaux3HwHPReq2Valid
1289          */
1290         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
1291         /*
1292          * 0x08, VsmpsMHwHPReq2Valid
1293          */
1294         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
1295         /*
1296          * 0x01, VsmpsCSwHPReqValid
1297          * 0x02, VarmSwHPReqValid
1298          * 0x04, VsmpsASwHPReqValid
1299          * 0x08, VsmpsBSwHPReqValid
1300          * 0x10, VsafeSwHPReqValid
1301          * 0x20, VanaSwHPReqValid
1302          * 0x40, VpllSwHPReqValid
1303          * 0x80, Vaux1SwHPReqValid
1304          */
1305         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
1306         /*
1307          * 0x01, Vaux2SwHPReqValid
1308          * 0x02, Vaux3SwHPReqValid
1309          * 0x20, VsmpsMSwHPReqValid
1310          */
1311         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
1312         /*
1313          * 0x02, SysClkReq2Valid1
1314          * 0x04, SysClkReq3Valid1
1315          * 0x08, SysClkReq4Valid1
1316          */
1317         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
1318         /*
1319          * 0x02, SysClkReq2Valid2
1320          * 0x04, SysClkReq3Valid2
1321          * 0x08, SysClkReq4Valid2
1322          */
1323         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
1324         /*
1325          * 0x01, Vaux4SwHPReqValid
1326          * 0x02, Vaux4HwHPReq2Valid
1327          * 0x04, Vaux4HwHPReq1Valid
1328          * 0x08, Vaux4SysClkReq1HPValid
1329          */
1330         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
1331         /*
1332          * 0x02, VadcEna
1333          * 0x04, VintCore12Ena
1334          * 0x38, VintCore12Sel
1335          * 0x40, VintCore12LP
1336          * 0x80, VadcLP
1337          */
1338         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
1339         /*
1340          * 0x02, VaudioEna
1341          * 0x04, VdmicEna
1342          * 0x08, Vamic1Ena
1343          * 0x10, Vamic2Ena
1344          */
1345         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1346         /*
1347          * 0x01, Vamic1_dzout
1348          * 0x02, Vamic2_dzout
1349          */
1350         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1351         /*
1352          * 0x03, VsmpsARegu
1353          * 0x0c, VsmpsASelCtrl
1354          * 0x10, VsmpsAAutoMode
1355          * 0x20, VsmpsAPWMMode
1356          */
1357         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
1358         /*
1359          * 0x03, VsmpsBRegu
1360          * 0x0c, VsmpsBSelCtrl
1361          * 0x10, VsmpsBAutoMode
1362          * 0x20, VsmpsBPWMMode
1363          */
1364         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
1365         /*
1366          * 0x03, VsafeRegu
1367          * 0x0c, VsafeSelCtrl
1368          * 0x10, VsafeAutoMode
1369          * 0x20, VsafePWMMode
1370          */
1371         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
1372         /*
1373          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1374          * 0x0c, VanaRegu
1375          */
1376         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1377         /*
1378          * 0x03, VextSupply1Regu
1379          * 0x0c, VextSupply2Regu
1380          * 0x30, VextSupply3Regu
1381          * 0x40, ExtSupply2Bypass
1382          * 0x80, ExtSupply3Bypass
1383          */
1384         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1385         /*
1386          * 0x03, Vaux1Regu
1387          * 0x0c, Vaux2Regu
1388          */
1389         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
1390         /*
1391          * 0x0f, Vaux3Regu
1392          */
1393         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
1394         /*
1395          * 0x3f, VsmpsASel1
1396          */
1397         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
1398         /*
1399          * 0x3f, VsmpsASel2
1400          */
1401         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
1402         /*
1403          * 0x3f, VsmpsASel3
1404          */
1405         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
1406         /*
1407          * 0x3f, VsmpsBSel1
1408          */
1409         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
1410         /*
1411          * 0x3f, VsmpsBSel2
1412          */
1413         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
1414         /*
1415          * 0x3f, VsmpsBSel3
1416          */
1417         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
1418         /*
1419          * 0x7f, VsafeSel1
1420          */
1421         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
1422         /*
1423          * 0x3f, VsafeSel2
1424          */
1425         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
1426         /*
1427          * 0x3f, VsafeSel3
1428          */
1429         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
1430         /*
1431          * 0x0f, Vaux1Sel
1432          */
1433         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
1434         /*
1435          * 0x0f, Vaux2Sel
1436          */
1437         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
1438         /*
1439          * 0x07, Vaux3Sel
1440          * 0x30, VRF1Sel
1441          */
1442         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
1443         /*
1444          * 0x03, Vaux4RequestCtrl
1445          */
1446         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
1447         /*
1448          * 0x03, Vaux4Regu
1449          */
1450         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
1451         /*
1452          * 0x0f, Vaux4Sel
1453          */
1454         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
1455         /*
1456          * 0x04, Vaux1Disch
1457          * 0x08, Vaux2Disch
1458          * 0x10, Vaux3Disch
1459          * 0x20, Vintcore12Disch
1460          * 0x40, VTVoutDisch
1461          * 0x80, VaudioDisch
1462          */
1463         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1464         /*
1465          * 0x02, VanaDisch
1466          * 0x04, VdmicPullDownEna
1467          * 0x10, VdmicDisch
1468          */
1469         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1470         /*
1471          * 0x01, Vaux4Disch
1472          */
1473         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
1474         /*
1475          * 0x07, Vaux5Sel
1476          * 0x08, Vaux5LP
1477          * 0x10, Vaux5Ena
1478          * 0x20, Vaux5Disch
1479          * 0x40, Vaux5DisSfst
1480          * 0x80, Vaux5DisPulld
1481          */
1482         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
1483         /*
1484          * 0x07, Vaux6Sel
1485          * 0x08, Vaux6LP
1486          * 0x10, Vaux6Ena
1487          * 0x80, Vaux6DisPulld
1488          */
1489         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
1490 };
1491
1492 static struct of_regulator_match ab8500_regulator_match[] = {
1493         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
1494         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
1495         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
1496         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
1497         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
1498         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
1499         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
1500         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
1501         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
1502         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
1503 };
1504
1505 static struct of_regulator_match ab8505_regulator_match[] = {
1506         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
1507         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
1508         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
1509         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
1510         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
1511         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
1512         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
1513         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
1514         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
1515         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
1516         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
1517         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
1518         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
1519 };
1520
1521 static struct {
1522         struct ab8500_regulator_info *info;
1523         int info_size;
1524         struct ab8500_reg_init *init;
1525         int init_size;
1526         struct of_regulator_match *match;
1527         int match_size;
1528 } abx500_regulator;
1529
1530 static void abx500_get_regulator_info(struct ab8500 *ab8500)
1531 {
1532         if (is_ab8505(ab8500)) {
1533                 abx500_regulator.info = ab8505_regulator_info;
1534                 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
1535                 abx500_regulator.init = ab8505_reg_init;
1536                 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
1537                 abx500_regulator.match = ab8505_regulator_match;
1538                 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
1539         } else {
1540                 abx500_regulator.info = ab8500_regulator_info;
1541                 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
1542                 abx500_regulator.init = ab8500_reg_init;
1543                 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
1544                 abx500_regulator.match = ab8500_regulator_match;
1545                 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
1546         }
1547 }
1548
1549 static int ab8500_regulator_register(struct platform_device *pdev,
1550                                      struct regulator_init_data *init_data,
1551                                      int id, struct device_node *np)
1552 {
1553         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1554         struct ab8500_regulator_info *info = NULL;
1555         struct regulator_config config = { };
1556         struct regulator_dev *rdev;
1557
1558         /* assign per-regulator data */
1559         info = &abx500_regulator.info[id];
1560         info->dev = &pdev->dev;
1561
1562         config.dev = &pdev->dev;
1563         config.init_data = init_data;
1564         config.driver_data = info;
1565         config.of_node = np;
1566
1567         /* fix for hardware before ab8500v2.0 */
1568         if (is_ab8500_1p1_or_earlier(ab8500)) {
1569                 if (info->desc.id == AB8500_LDO_AUX3) {
1570                         info->desc.n_voltages =
1571                                 ARRAY_SIZE(ldo_vauxn_voltages);
1572                         info->desc.volt_table = ldo_vauxn_voltages;
1573                         info->voltage_mask = 0xf;
1574                 }
1575         }
1576
1577         /* register regulator with framework */
1578         rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
1579         if (IS_ERR(rdev)) {
1580                 dev_err(&pdev->dev, "failed to register regulator %s\n",
1581                         info->desc.name);
1582                 return PTR_ERR(rdev);
1583         }
1584
1585         return 0;
1586 }
1587
1588 static int ab8500_regulator_probe(struct platform_device *pdev)
1589 {
1590         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1591         struct device_node *np = pdev->dev.of_node;
1592         struct of_regulator_match *match;
1593         int err, i;
1594
1595         if (!ab8500) {
1596                 dev_err(&pdev->dev, "null mfd parent\n");
1597                 return -EINVAL;
1598         }
1599
1600         abx500_get_regulator_info(ab8500);
1601
1602         err = of_regulator_match(&pdev->dev, np,
1603                                  abx500_regulator.match,
1604                                  abx500_regulator.match_size);
1605         if (err < 0) {
1606                 dev_err(&pdev->dev,
1607                         "Error parsing regulator init data: %d\n", err);
1608                 return err;
1609         }
1610
1611         match = abx500_regulator.match;
1612         for (i = 0; i < abx500_regulator.info_size; i++) {
1613                 err = ab8500_regulator_register(pdev, match[i].init_data, i,
1614                                                 match[i].of_node);
1615                 if (err)
1616                         return err;
1617         }
1618
1619         return 0;
1620 }
1621
1622 static struct platform_driver ab8500_regulator_driver = {
1623         .probe = ab8500_regulator_probe,
1624         .driver         = {
1625                 .name   = "ab8500-regulator",
1626         },
1627 };
1628
1629 static int __init ab8500_regulator_init(void)
1630 {
1631         int ret;
1632
1633         ret = platform_driver_register(&ab8500_regulator_driver);
1634         if (ret != 0)
1635                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1636
1637         return ret;
1638 }
1639 subsys_initcall(ab8500_regulator_init);
1640
1641 static void __exit ab8500_regulator_exit(void)
1642 {
1643         platform_driver_unregister(&ab8500_regulator_driver);
1644 }
1645 module_exit(ab8500_regulator_exit);
1646
1647 MODULE_LICENSE("GPL v2");
1648 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
1649 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
1650 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
1651 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1652 MODULE_ALIAS("platform:ab8500-regulator");