1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2012 Texas Instruments, Inc. - https://www.ti.com/
8 #include <linux/module.h>
9 #include <linux/platform_device.h>
11 #include <linux/err.h>
12 #include <linux/clk.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/pwm.h>
17 /* ECAP registers and bits definitions */
23 #define ECCTL2_APWM_POL_LOW BIT(10)
24 #define ECCTL2_APWM_MODE BIT(9)
25 #define ECCTL2_SYNC_SEL_DISA (BIT(7) | BIT(6))
26 #define ECCTL2_TSCTR_FREERUN BIT(4)
34 struct ecap_pwm_chip {
35 unsigned int clk_rate;
36 void __iomem *mmio_base;
37 struct ecap_context ctx;
40 static inline struct ecap_pwm_chip *to_ecap_pwm_chip(struct pwm_chip *chip)
42 return pwmchip_get_drvdata(chip);
46 * period_ns = 10^9 * period_cycles / PWM_CLK_RATE
47 * duty_ns = 10^9 * duty_cycles / PWM_CLK_RATE
49 static int ecap_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
50 int duty_ns, int period_ns, int enabled)
52 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip);
53 u32 period_cycles, duty_cycles;
59 do_div(c, NSEC_PER_SEC);
60 period_cycles = (u32)c;
62 if (period_cycles < 1) {
68 do_div(c, NSEC_PER_SEC);
72 pm_runtime_get_sync(pwmchip_parent(chip));
74 value = readw(pc->mmio_base + ECCTL2);
76 /* Configure APWM mode & disable sync option */
77 value |= ECCTL2_APWM_MODE | ECCTL2_SYNC_SEL_DISA;
79 writew(value, pc->mmio_base + ECCTL2);
82 /* Update active registers if not running */
83 writel(duty_cycles, pc->mmio_base + CAP2);
84 writel(period_cycles, pc->mmio_base + CAP1);
87 * Update shadow registers to configure period and
88 * compare values. This helps current PWM period to
89 * complete on reconfiguring
91 writel(duty_cycles, pc->mmio_base + CAP4);
92 writel(period_cycles, pc->mmio_base + CAP3);
96 value = readw(pc->mmio_base + ECCTL2);
97 /* Disable APWM mode to put APWM output Low */
98 value &= ~ECCTL2_APWM_MODE;
99 writew(value, pc->mmio_base + ECCTL2);
102 pm_runtime_put_sync(pwmchip_parent(chip));
107 static int ecap_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
108 enum pwm_polarity polarity)
110 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip);
113 pm_runtime_get_sync(pwmchip_parent(chip));
115 value = readw(pc->mmio_base + ECCTL2);
117 if (polarity == PWM_POLARITY_INVERSED)
118 /* Duty cycle defines LOW period of PWM */
119 value |= ECCTL2_APWM_POL_LOW;
121 /* Duty cycle defines HIGH period of PWM */
122 value &= ~ECCTL2_APWM_POL_LOW;
124 writew(value, pc->mmio_base + ECCTL2);
126 pm_runtime_put_sync(pwmchip_parent(chip));
131 static int ecap_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
133 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip);
136 /* Leave clock enabled on enabling PWM */
137 pm_runtime_get_sync(pwmchip_parent(chip));
140 * Enable 'Free run Time stamp counter mode' to start counter
141 * and 'APWM mode' to enable APWM output
143 value = readw(pc->mmio_base + ECCTL2);
144 value |= ECCTL2_TSCTR_FREERUN | ECCTL2_APWM_MODE;
145 writew(value, pc->mmio_base + ECCTL2);
150 static void ecap_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
152 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip);
156 * Disable 'Free run Time stamp counter mode' to stop counter
157 * and 'APWM mode' to put APWM output to low
159 value = readw(pc->mmio_base + ECCTL2);
160 value &= ~(ECCTL2_TSCTR_FREERUN | ECCTL2_APWM_MODE);
161 writew(value, pc->mmio_base + ECCTL2);
163 /* Disable clock on PWM disable */
164 pm_runtime_put_sync(pwmchip_parent(chip));
167 static int ecap_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
168 const struct pwm_state *state)
171 int enabled = pwm->state.enabled;
173 if (state->polarity != pwm->state.polarity) {
176 ecap_pwm_disable(chip, pwm);
180 err = ecap_pwm_set_polarity(chip, pwm, state->polarity);
185 if (!state->enabled) {
187 ecap_pwm_disable(chip, pwm);
191 if (state->period > NSEC_PER_SEC)
194 err = ecap_pwm_config(chip, pwm, state->duty_cycle,
195 state->period, enabled);
200 return ecap_pwm_enable(chip, pwm);
205 static const struct pwm_ops ecap_pwm_ops = {
206 .apply = ecap_pwm_apply,
209 static const struct of_device_id ecap_of_match[] = {
210 { .compatible = "ti,am3352-ecap" },
211 { .compatible = "ti,am33xx-ecap" },
214 MODULE_DEVICE_TABLE(of, ecap_of_match);
216 static int ecap_pwm_probe(struct platform_device *pdev)
218 struct device_node *np = pdev->dev.of_node;
219 struct ecap_pwm_chip *pc;
220 struct pwm_chip *chip;
224 chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*pc));
226 return PTR_ERR(chip);
227 pc = to_ecap_pwm_chip(chip);
229 clk = devm_clk_get(&pdev->dev, "fck");
231 if (of_device_is_compatible(np, "ti,am33xx-ecap")) {
232 dev_warn(&pdev->dev, "Binding is obsolete.\n");
233 clk = devm_clk_get(pdev->dev.parent, "fck");
238 dev_err(&pdev->dev, "failed to get clock\n");
242 pc->clk_rate = clk_get_rate(clk);
244 dev_err(&pdev->dev, "failed to get clock rate\n");
248 chip->ops = &ecap_pwm_ops;
250 pc->mmio_base = devm_platform_ioremap_resource(pdev, 0);
251 if (IS_ERR(pc->mmio_base))
252 return PTR_ERR(pc->mmio_base);
254 ret = devm_pwmchip_add(&pdev->dev, chip);
256 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
260 platform_set_drvdata(pdev, chip);
261 pm_runtime_enable(&pdev->dev);
266 static void ecap_pwm_remove(struct platform_device *pdev)
268 pm_runtime_disable(&pdev->dev);
271 static void ecap_pwm_save_context(struct pwm_chip *chip)
273 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip);
275 pm_runtime_get_sync(pwmchip_parent(chip));
276 pc->ctx.ecctl2 = readw(pc->mmio_base + ECCTL2);
277 pc->ctx.cap4 = readl(pc->mmio_base + CAP4);
278 pc->ctx.cap3 = readl(pc->mmio_base + CAP3);
279 pm_runtime_put_sync(pwmchip_parent(chip));
282 static void ecap_pwm_restore_context(struct pwm_chip *chip)
284 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip);
286 writel(pc->ctx.cap3, pc->mmio_base + CAP3);
287 writel(pc->ctx.cap4, pc->mmio_base + CAP4);
288 writew(pc->ctx.ecctl2, pc->mmio_base + ECCTL2);
291 static int ecap_pwm_suspend(struct device *dev)
293 struct pwm_chip *chip = dev_get_drvdata(dev);
294 struct pwm_device *pwm = chip->pwms;
296 ecap_pwm_save_context(chip);
298 /* Disable explicitly if PWM is running */
299 if (pwm_is_enabled(pwm))
300 pm_runtime_put_sync(dev);
305 static int ecap_pwm_resume(struct device *dev)
307 struct pwm_chip *chip = dev_get_drvdata(dev);
308 struct pwm_device *pwm = chip->pwms;
310 /* Enable explicitly if PWM was running */
311 if (pwm_is_enabled(pwm))
312 pm_runtime_get_sync(dev);
314 ecap_pwm_restore_context(chip);
318 static DEFINE_SIMPLE_DEV_PM_OPS(ecap_pwm_pm_ops, ecap_pwm_suspend, ecap_pwm_resume);
320 static struct platform_driver ecap_pwm_driver = {
323 .of_match_table = ecap_of_match,
324 .pm = pm_ptr(&ecap_pwm_pm_ops),
326 .probe = ecap_pwm_probe,
327 .remove_new = ecap_pwm_remove,
329 module_platform_driver(ecap_pwm_driver);
331 MODULE_DESCRIPTION("ECAP PWM driver");
332 MODULE_AUTHOR("Texas Instruments");
333 MODULE_LICENSE("GPL");