1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2014 Bart Tanghe <bart.tanghe@thomasmore.be>
9 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/pwm.h>
14 #define PWM_CONTROL 0x000
15 #define PWM_CONTROL_SHIFT(x) ((x) * 8)
16 #define PWM_CONTROL_MASK 0xff
17 #define PWM_MODE 0x80 /* set timer in PWM mode */
18 #define PWM_ENABLE (1 << 0)
19 #define PWM_POLARITY (1 << 4)
21 #define PERIOD(x) (((x) * 0x10) + 0x10)
22 #define DUTY(x) (((x) * 0x10) + 0x14)
24 #define PERIOD_MIN 0x2
33 static inline struct bcm2835_pwm *to_bcm2835_pwm(struct pwm_chip *chip)
35 return container_of(chip, struct bcm2835_pwm, chip);
38 static int bcm2835_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
40 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
43 value = readl(pc->base + PWM_CONTROL);
44 value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));
45 value |= (PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm));
46 writel(value, pc->base + PWM_CONTROL);
51 static void bcm2835_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
53 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
56 value = readl(pc->base + PWM_CONTROL);
57 value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));
58 writel(value, pc->base + PWM_CONTROL);
61 static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
62 const struct pwm_state *state)
65 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
66 unsigned long rate = clk_get_rate(pc->clk);
67 unsigned long long period;
72 dev_err(pc->dev, "failed to get clock rate\n");
76 scaler = DIV_ROUND_CLOSEST(NSEC_PER_SEC, rate);
78 period = DIV_ROUND_CLOSEST_ULL(state->period, scaler);
80 /* dont accept a period that is too small or has been truncated */
81 if ((period < PERIOD_MIN) || (period > U32_MAX))
84 writel(period, pc->base + PERIOD(pwm->hwpwm));
87 val = DIV_ROUND_CLOSEST_ULL(state->duty_cycle, scaler);
88 writel(val, pc->base + DUTY(pwm->hwpwm));
91 val = readl(pc->base + PWM_CONTROL);
93 if (state->polarity == PWM_POLARITY_NORMAL)
94 val &= ~(PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm));
96 val |= PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm);
100 val |= PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm);
102 val &= ~(PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm));
104 writel(val, pc->base + PWM_CONTROL);
109 static const struct pwm_ops bcm2835_pwm_ops = {
110 .request = bcm2835_pwm_request,
111 .free = bcm2835_pwm_free,
112 .apply = bcm2835_pwm_apply,
113 .owner = THIS_MODULE,
116 static int bcm2835_pwm_probe(struct platform_device *pdev)
118 struct bcm2835_pwm *pc;
121 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
125 pc->dev = &pdev->dev;
127 pc->base = devm_platform_ioremap_resource(pdev, 0);
128 if (IS_ERR(pc->base))
129 return PTR_ERR(pc->base);
131 pc->clk = devm_clk_get(&pdev->dev, NULL);
133 return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
134 "clock not found\n");
136 ret = clk_prepare_enable(pc->clk);
140 pc->chip.dev = &pdev->dev;
141 pc->chip.ops = &bcm2835_pwm_ops;
144 pc->chip.of_xlate = of_pwm_xlate_with_flags;
145 pc->chip.of_pwm_n_cells = 3;
147 platform_set_drvdata(pdev, pc);
149 ret = pwmchip_add(&pc->chip);
156 clk_disable_unprepare(pc->clk);
160 static int bcm2835_pwm_remove(struct platform_device *pdev)
162 struct bcm2835_pwm *pc = platform_get_drvdata(pdev);
164 clk_disable_unprepare(pc->clk);
166 return pwmchip_remove(&pc->chip);
169 static const struct of_device_id bcm2835_pwm_of_match[] = {
170 { .compatible = "brcm,bcm2835-pwm", },
173 MODULE_DEVICE_TABLE(of, bcm2835_pwm_of_match);
175 static struct platform_driver bcm2835_pwm_driver = {
177 .name = "bcm2835-pwm",
178 .of_match_table = bcm2835_pwm_of_match,
180 .probe = bcm2835_pwm_probe,
181 .remove = bcm2835_pwm_remove,
183 module_platform_driver(bcm2835_pwm_driver);
185 MODULE_AUTHOR("Bart Tanghe <bart.tanghe@thomasmore.be>");
186 MODULE_DESCRIPTION("Broadcom BCM2835 PWM driver");
187 MODULE_LICENSE("GPL v2");