1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock for Freescale QorIQ 1588 timer
5 * Copyright (C) 2010 OMICRON electronics GmbH
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10 #include <linux/device.h>
11 #include <linux/hrtimer.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
15 #include <linux/of_platform.h>
16 #include <linux/timex.h>
17 #include <linux/slab.h>
18 #include <linux/clk.h>
20 #include <linux/fsl/ptp_qoriq.h>
23 * Register access functions
26 /* Caller must hold ptp_qoriq->lock. */
27 static u64 tmr_cnt_read(struct ptp_qoriq *ptp_qoriq)
29 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
33 lo = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_l);
34 hi = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_h);
35 ns = ((u64) hi) << 32;
40 /* Caller must hold ptp_qoriq->lock. */
41 static void tmr_cnt_write(struct ptp_qoriq *ptp_qoriq, u64 ns)
43 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
45 u32 lo = ns & 0xffffffff;
47 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_l, lo);
48 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_h, hi);
51 /* Caller must hold ptp_qoriq->lock. */
52 static void set_alarm(struct ptp_qoriq *ptp_qoriq)
54 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
58 ns = tmr_cnt_read(ptp_qoriq) + 1500000000ULL;
59 ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
60 ns -= ptp_qoriq->tclk_period;
63 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_l, lo);
64 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_h, hi);
67 /* Caller must hold ptp_qoriq->lock. */
68 static void set_fipers(struct ptp_qoriq *ptp_qoriq)
70 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
73 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
74 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
77 int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index, bool update_event)
79 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
80 struct ptp_clock_event event;
81 void __iomem *reg_etts_l;
82 void __iomem *reg_etts_h;
88 reg_etts_l = ®s->etts_regs->tmr_etts1_l;
89 reg_etts_h = ®s->etts_regs->tmr_etts1_h;
93 reg_etts_l = ®s->etts_regs->tmr_etts2_l;
94 reg_etts_h = ®s->etts_regs->tmr_etts2_h;
100 event.type = PTP_CLOCK_EXTTS;
103 if (ptp_qoriq->extts_fifo_support)
104 if (!(ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid))
108 lo = ptp_qoriq->read(reg_etts_l);
109 hi = ptp_qoriq->read(reg_etts_h);
112 event.timestamp = ((u64) hi) << 32;
113 event.timestamp |= lo;
114 ptp_clock_event(ptp_qoriq->clock, &event);
117 if (!ptp_qoriq->extts_fifo_support)
119 } while (ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid);
123 EXPORT_SYMBOL_GPL(extts_clean_up);
126 * Interrupt service routine
129 irqreturn_t ptp_qoriq_isr(int irq, void *priv)
131 struct ptp_qoriq *ptp_qoriq = priv;
132 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
133 struct ptp_clock_event event;
135 u32 ack = 0, lo, hi, mask, val, irqs;
137 spin_lock(&ptp_qoriq->lock);
139 val = ptp_qoriq->read(®s->ctrl_regs->tmr_tevent);
140 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
142 spin_unlock(&ptp_qoriq->lock);
148 extts_clean_up(ptp_qoriq, 0, true);
153 extts_clean_up(ptp_qoriq, 1, true);
158 if (ptp_qoriq->alarm_value) {
159 event.type = PTP_CLOCK_ALARM;
161 event.timestamp = ptp_qoriq->alarm_value;
162 ptp_clock_event(ptp_qoriq->clock, &event);
164 if (ptp_qoriq->alarm_interval) {
165 ns = ptp_qoriq->alarm_value + ptp_qoriq->alarm_interval;
167 lo = ns & 0xffffffff;
168 ptp_qoriq->write(®s->alarm_regs->tmr_alarm2_l, lo);
169 ptp_qoriq->write(®s->alarm_regs->tmr_alarm2_h, hi);
170 ptp_qoriq->alarm_value = ns;
172 spin_lock(&ptp_qoriq->lock);
173 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
175 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
176 spin_unlock(&ptp_qoriq->lock);
177 ptp_qoriq->alarm_value = 0;
178 ptp_qoriq->alarm_interval = 0;
184 event.type = PTP_CLOCK_PPS;
185 ptp_clock_event(ptp_qoriq->clock, &event);
189 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, ack);
194 EXPORT_SYMBOL_GPL(ptp_qoriq_isr);
197 * PTP clock operations
200 int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
205 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
206 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
208 if (scaled_ppm < 0) {
210 scaled_ppm = -scaled_ppm;
212 tmr_add = ptp_qoriq->tmr_add;
215 /* calculate diff as adj*(scaled_ppm/65536)/1000000
216 * and round() to the nearest integer
219 diff = div_u64(adj, 8000000);
220 diff = (diff >> 13) + ((diff >> 12) & 1);
222 tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
224 ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add);
228 EXPORT_SYMBOL_GPL(ptp_qoriq_adjfine);
230 int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta)
234 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
236 spin_lock_irqsave(&ptp_qoriq->lock, flags);
238 now = tmr_cnt_read(ptp_qoriq);
240 tmr_cnt_write(ptp_qoriq, now);
241 set_fipers(ptp_qoriq);
243 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
247 EXPORT_SYMBOL_GPL(ptp_qoriq_adjtime);
249 int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
253 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
255 spin_lock_irqsave(&ptp_qoriq->lock, flags);
257 ns = tmr_cnt_read(ptp_qoriq);
259 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
261 *ts = ns_to_timespec64(ns);
265 EXPORT_SYMBOL_GPL(ptp_qoriq_gettime);
267 int ptp_qoriq_settime(struct ptp_clock_info *ptp,
268 const struct timespec64 *ts)
272 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
274 ns = timespec64_to_ns(ts);
276 spin_lock_irqsave(&ptp_qoriq->lock, flags);
278 tmr_cnt_write(ptp_qoriq, ns);
279 set_fipers(ptp_qoriq);
281 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
285 EXPORT_SYMBOL_GPL(ptp_qoriq_settime);
287 int ptp_qoriq_enable(struct ptp_clock_info *ptp,
288 struct ptp_clock_request *rq, int on)
290 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
291 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
296 case PTP_CLK_REQ_EXTTS:
297 switch (rq->extts.index) {
309 extts_clean_up(ptp_qoriq, rq->extts.index, false);
312 case PTP_CLK_REQ_PPS:
319 spin_lock_irqsave(&ptp_qoriq->lock, flags);
321 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
324 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, bit);
329 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
331 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
334 EXPORT_SYMBOL_GPL(ptp_qoriq_enable);
336 static const struct ptp_clock_info ptp_qoriq_caps = {
337 .owner = THIS_MODULE,
338 .name = "qoriq ptp clock",
341 .n_ext_ts = N_EXT_TS,
345 .adjfine = ptp_qoriq_adjfine,
346 .adjtime = ptp_qoriq_adjtime,
347 .gettime64 = ptp_qoriq_gettime,
348 .settime64 = ptp_qoriq_settime,
349 .enable = ptp_qoriq_enable,
353 * ptp_qoriq_nominal_freq - calculate nominal frequency according to
354 * reference clock frequency
356 * @clk_src: reference clock frequency
358 * The nominal frequency is the desired clock frequency.
359 * It should be less than the reference clock frequency.
360 * It should be a factor of 1000MHz.
362 * Return the nominal frequency
364 static u32 ptp_qoriq_nominal_freq(u32 clk_src)
369 remainder = clk_src % 100;
371 clk_src -= remainder;
378 } while (1000 % clk_src);
380 return clk_src * 1000000;
384 * ptp_qoriq_auto_config - calculate a set of default configurations
386 * @ptp_qoriq: pointer to ptp_qoriq
387 * @node: pointer to device_node
389 * If below dts properties are not provided, this function will be
390 * called to calculate a set of default configurations for them.
398 * Return 0 if success
400 static int ptp_qoriq_auto_config(struct ptp_qoriq *ptp_qoriq,
401 struct device_node *node)
410 ptp_qoriq->cksel = DEFAULT_CKSEL;
412 clk = of_clk_get(node, 0);
414 clk_src = clk_get_rate(clk);
418 if (clk_src <= 100000000UL) {
419 pr_err("error reference clock value, or lower than 100MHz\n");
423 nominal_freq = ptp_qoriq_nominal_freq(clk_src);
427 ptp_qoriq->tclk_period = 1000000000UL / nominal_freq;
428 ptp_qoriq->tmr_prsc = DEFAULT_TMR_PRSC;
430 /* Calculate initial frequency compensation value for TMR_ADD register.
431 * freq_comp = ceil(2^32 / freq_ratio)
432 * freq_ratio = reference_clock_freq / nominal_freq
434 freq_comp = ((u64)1 << 32) * nominal_freq;
435 freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
439 ptp_qoriq->tmr_add = freq_comp;
440 ptp_qoriq->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - ptp_qoriq->tclk_period;
441 ptp_qoriq->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - ptp_qoriq->tclk_period;
443 /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1
444 * freq_ratio = reference_clock_freq / nominal_freq
446 max_adj = 1000000000ULL * (clk_src - nominal_freq);
447 max_adj = div_u64(max_adj, nominal_freq) - 1;
448 ptp_qoriq->caps.max_adj = max_adj;
453 int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base,
454 const struct ptp_clock_info *caps)
456 struct device_node *node = ptp_qoriq->dev->of_node;
457 struct ptp_qoriq_registers *regs;
458 struct timespec64 now;
465 ptp_qoriq->base = base;
466 ptp_qoriq->caps = *caps;
468 if (of_property_read_u32(node, "fsl,cksel", &ptp_qoriq->cksel))
469 ptp_qoriq->cksel = DEFAULT_CKSEL;
471 if (of_property_read_bool(node, "fsl,extts-fifo"))
472 ptp_qoriq->extts_fifo_support = true;
474 ptp_qoriq->extts_fifo_support = false;
476 if (of_property_read_u32(node,
477 "fsl,tclk-period", &ptp_qoriq->tclk_period) ||
478 of_property_read_u32(node,
479 "fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) ||
480 of_property_read_u32(node,
481 "fsl,tmr-add", &ptp_qoriq->tmr_add) ||
482 of_property_read_u32(node,
483 "fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) ||
484 of_property_read_u32(node,
485 "fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) ||
486 of_property_read_u32(node,
487 "fsl,max-adj", &ptp_qoriq->caps.max_adj)) {
488 pr_warn("device tree node missing required elements, try automatic configuration\n");
490 if (ptp_qoriq_auto_config(ptp_qoriq, node))
494 if (of_property_read_bool(node, "little-endian")) {
495 ptp_qoriq->read = qoriq_read_le;
496 ptp_qoriq->write = qoriq_write_le;
498 ptp_qoriq->read = qoriq_read_be;
499 ptp_qoriq->write = qoriq_write_be;
502 /* The eTSEC uses differnt memory map with DPAA/ENETC */
503 if (of_device_is_compatible(node, "fsl,etsec-ptp")) {
504 ptp_qoriq->regs.ctrl_regs = base + ETSEC_CTRL_REGS_OFFSET;
505 ptp_qoriq->regs.alarm_regs = base + ETSEC_ALARM_REGS_OFFSET;
506 ptp_qoriq->regs.fiper_regs = base + ETSEC_FIPER_REGS_OFFSET;
507 ptp_qoriq->regs.etts_regs = base + ETSEC_ETTS_REGS_OFFSET;
509 ptp_qoriq->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
510 ptp_qoriq->regs.alarm_regs = base + ALARM_REGS_OFFSET;
511 ptp_qoriq->regs.fiper_regs = base + FIPER_REGS_OFFSET;
512 ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET;
515 spin_lock_init(&ptp_qoriq->lock);
517 ktime_get_real_ts64(&now);
518 ptp_qoriq_settime(&ptp_qoriq->caps, &now);
521 (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
522 (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT;
524 spin_lock_irqsave(&ptp_qoriq->lock, flags);
526 regs = &ptp_qoriq->regs;
527 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl);
528 ptp_qoriq->write(®s->ctrl_regs->tmr_add, ptp_qoriq->tmr_add);
529 ptp_qoriq->write(®s->ctrl_regs->tmr_prsc, ptp_qoriq->tmr_prsc);
530 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
531 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
532 set_alarm(ptp_qoriq);
533 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl,
534 tmr_ctrl|FIPERST|RTPE|TE|FRD);
536 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
538 ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev);
539 if (IS_ERR(ptp_qoriq->clock))
540 return PTR_ERR(ptp_qoriq->clock);
542 ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock);
543 ptp_qoriq_create_debugfs(ptp_qoriq);
546 EXPORT_SYMBOL_GPL(ptp_qoriq_init);
548 void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq)
550 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
552 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, 0);
553 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, 0);
555 ptp_qoriq_remove_debugfs(ptp_qoriq);
556 ptp_clock_unregister(ptp_qoriq->clock);
557 iounmap(ptp_qoriq->base);
558 free_irq(ptp_qoriq->irq, ptp_qoriq);
560 EXPORT_SYMBOL_GPL(ptp_qoriq_free);
562 static int ptp_qoriq_probe(struct platform_device *dev)
564 struct ptp_qoriq *ptp_qoriq;
568 ptp_qoriq = kzalloc(sizeof(*ptp_qoriq), GFP_KERNEL);
572 ptp_qoriq->dev = &dev->dev;
576 ptp_qoriq->irq = platform_get_irq(dev, 0);
577 if (ptp_qoriq->irq < 0) {
578 pr_err("irq not in device tree\n");
581 if (request_irq(ptp_qoriq->irq, ptp_qoriq_isr, IRQF_SHARED,
582 DRIVER, ptp_qoriq)) {
583 pr_err("request_irq failed\n");
587 ptp_qoriq->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
588 if (!ptp_qoriq->rsrc) {
589 pr_err("no resource\n");
592 if (request_resource(&iomem_resource, ptp_qoriq->rsrc)) {
593 pr_err("resource busy\n");
597 base = ioremap(ptp_qoriq->rsrc->start,
598 resource_size(ptp_qoriq->rsrc));
600 pr_err("ioremap ptp registers failed\n");
604 err = ptp_qoriq_init(ptp_qoriq, base, &ptp_qoriq_caps);
608 platform_set_drvdata(dev, ptp_qoriq);
612 iounmap(ptp_qoriq->base);
614 release_resource(ptp_qoriq->rsrc);
616 free_irq(ptp_qoriq->irq, ptp_qoriq);
623 static int ptp_qoriq_remove(struct platform_device *dev)
625 struct ptp_qoriq *ptp_qoriq = platform_get_drvdata(dev);
627 ptp_qoriq_free(ptp_qoriq);
628 release_resource(ptp_qoriq->rsrc);
633 static const struct of_device_id match_table[] = {
634 { .compatible = "fsl,etsec-ptp" },
635 { .compatible = "fsl,fman-ptp-timer" },
638 MODULE_DEVICE_TABLE(of, match_table);
640 static struct platform_driver ptp_qoriq_driver = {
643 .of_match_table = match_table,
645 .probe = ptp_qoriq_probe,
646 .remove = ptp_qoriq_remove,
649 module_platform_driver(ptp_qoriq_driver);
651 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
652 MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer");
653 MODULE_LICENSE("GPL");