1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock for Freescale QorIQ 1588 timer
5 * Copyright (C) 2010 OMICRON electronics GmbH
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10 #include <linux/device.h>
11 #include <linux/hrtimer.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
15 #include <linux/of_platform.h>
16 #include <linux/timex.h>
17 #include <linux/slab.h>
18 #include <linux/clk.h>
20 #include <linux/fsl/ptp_qoriq.h>
23 * Register access functions
26 /* Caller must hold ptp_qoriq->lock. */
27 static u64 tmr_cnt_read(struct ptp_qoriq *ptp_qoriq)
29 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
33 lo = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_l);
34 hi = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_h);
35 ns = ((u64) hi) << 32;
40 /* Caller must hold ptp_qoriq->lock. */
41 static void tmr_cnt_write(struct ptp_qoriq *ptp_qoriq, u64 ns)
43 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
45 u32 lo = ns & 0xffffffff;
47 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_l, lo);
48 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_h, hi);
51 /* Caller must hold ptp_qoriq->lock. */
52 static void set_alarm(struct ptp_qoriq *ptp_qoriq)
54 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
58 ns = tmr_cnt_read(ptp_qoriq) + 1500000000ULL;
59 ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
60 ns -= ptp_qoriq->tclk_period;
63 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_l, lo);
64 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_h, hi);
67 /* Caller must hold ptp_qoriq->lock. */
68 static void set_fipers(struct ptp_qoriq *ptp_qoriq)
70 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
73 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
74 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
77 static int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index,
80 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
81 struct ptp_clock_event event;
82 void __iomem *reg_etts_l;
83 void __iomem *reg_etts_h;
84 u32 valid, stat, lo, hi;
89 reg_etts_l = ®s->etts_regs->tmr_etts1_l;
90 reg_etts_h = ®s->etts_regs->tmr_etts1_h;
94 reg_etts_l = ®s->etts_regs->tmr_etts2_l;
95 reg_etts_h = ®s->etts_regs->tmr_etts2_h;
101 event.type = PTP_CLOCK_EXTTS;
105 lo = ptp_qoriq->read(reg_etts_l);
106 hi = ptp_qoriq->read(reg_etts_h);
109 event.timestamp = ((u64) hi) << 32;
110 event.timestamp |= lo;
111 ptp_clock_event(ptp_qoriq->clock, &event);
114 stat = ptp_qoriq->read(®s->ctrl_regs->tmr_stat);
115 } while (ptp_qoriq->extts_fifo_support && (stat & valid));
121 * Interrupt service routine
124 irqreturn_t ptp_qoriq_isr(int irq, void *priv)
126 struct ptp_qoriq *ptp_qoriq = priv;
127 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
128 struct ptp_clock_event event;
130 u32 ack = 0, lo, hi, mask, val, irqs;
132 spin_lock(&ptp_qoriq->lock);
134 val = ptp_qoriq->read(®s->ctrl_regs->tmr_tevent);
135 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
137 spin_unlock(&ptp_qoriq->lock);
143 extts_clean_up(ptp_qoriq, 0, true);
148 extts_clean_up(ptp_qoriq, 1, true);
153 if (ptp_qoriq->alarm_value) {
154 event.type = PTP_CLOCK_ALARM;
156 event.timestamp = ptp_qoriq->alarm_value;
157 ptp_clock_event(ptp_qoriq->clock, &event);
159 if (ptp_qoriq->alarm_interval) {
160 ns = ptp_qoriq->alarm_value + ptp_qoriq->alarm_interval;
162 lo = ns & 0xffffffff;
163 ptp_qoriq->write(®s->alarm_regs->tmr_alarm2_l, lo);
164 ptp_qoriq->write(®s->alarm_regs->tmr_alarm2_h, hi);
165 ptp_qoriq->alarm_value = ns;
167 spin_lock(&ptp_qoriq->lock);
168 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
170 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
171 spin_unlock(&ptp_qoriq->lock);
172 ptp_qoriq->alarm_value = 0;
173 ptp_qoriq->alarm_interval = 0;
179 event.type = PTP_CLOCK_PPS;
180 ptp_clock_event(ptp_qoriq->clock, &event);
184 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, ack);
189 EXPORT_SYMBOL_GPL(ptp_qoriq_isr);
192 * PTP clock operations
195 int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
200 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
201 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
203 if (scaled_ppm < 0) {
205 scaled_ppm = -scaled_ppm;
207 tmr_add = ptp_qoriq->tmr_add;
210 /* calculate diff as adj*(scaled_ppm/65536)/1000000
211 * and round() to the nearest integer
214 diff = div_u64(adj, 8000000);
215 diff = (diff >> 13) + ((diff >> 12) & 1);
217 tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
219 ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add);
223 EXPORT_SYMBOL_GPL(ptp_qoriq_adjfine);
225 int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta)
229 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
231 spin_lock_irqsave(&ptp_qoriq->lock, flags);
233 now = tmr_cnt_read(ptp_qoriq);
235 tmr_cnt_write(ptp_qoriq, now);
236 set_fipers(ptp_qoriq);
238 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
242 EXPORT_SYMBOL_GPL(ptp_qoriq_adjtime);
244 int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
248 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
250 spin_lock_irqsave(&ptp_qoriq->lock, flags);
252 ns = tmr_cnt_read(ptp_qoriq);
254 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
256 *ts = ns_to_timespec64(ns);
260 EXPORT_SYMBOL_GPL(ptp_qoriq_gettime);
262 int ptp_qoriq_settime(struct ptp_clock_info *ptp,
263 const struct timespec64 *ts)
267 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
269 ns = timespec64_to_ns(ts);
271 spin_lock_irqsave(&ptp_qoriq->lock, flags);
273 tmr_cnt_write(ptp_qoriq, ns);
274 set_fipers(ptp_qoriq);
276 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
280 EXPORT_SYMBOL_GPL(ptp_qoriq_settime);
282 int ptp_qoriq_enable(struct ptp_clock_info *ptp,
283 struct ptp_clock_request *rq, int on)
285 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
286 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
291 case PTP_CLK_REQ_EXTTS:
292 switch (rq->extts.index) {
304 extts_clean_up(ptp_qoriq, rq->extts.index, false);
307 case PTP_CLK_REQ_PPS:
314 spin_lock_irqsave(&ptp_qoriq->lock, flags);
316 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
319 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, bit);
324 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
326 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
329 EXPORT_SYMBOL_GPL(ptp_qoriq_enable);
331 static const struct ptp_clock_info ptp_qoriq_caps = {
332 .owner = THIS_MODULE,
333 .name = "qoriq ptp clock",
336 .n_ext_ts = N_EXT_TS,
340 .adjfine = ptp_qoriq_adjfine,
341 .adjtime = ptp_qoriq_adjtime,
342 .gettime64 = ptp_qoriq_gettime,
343 .settime64 = ptp_qoriq_settime,
344 .enable = ptp_qoriq_enable,
348 * ptp_qoriq_nominal_freq - calculate nominal frequency according to
349 * reference clock frequency
351 * @clk_src: reference clock frequency
353 * The nominal frequency is the desired clock frequency.
354 * It should be less than the reference clock frequency.
355 * It should be a factor of 1000MHz.
357 * Return the nominal frequency
359 static u32 ptp_qoriq_nominal_freq(u32 clk_src)
364 remainder = clk_src % 100;
366 clk_src -= remainder;
373 } while (1000 % clk_src);
375 return clk_src * 1000000;
379 * ptp_qoriq_auto_config - calculate a set of default configurations
381 * @ptp_qoriq: pointer to ptp_qoriq
382 * @node: pointer to device_node
384 * If below dts properties are not provided, this function will be
385 * called to calculate a set of default configurations for them.
393 * Return 0 if success
395 static int ptp_qoriq_auto_config(struct ptp_qoriq *ptp_qoriq,
396 struct device_node *node)
405 ptp_qoriq->cksel = DEFAULT_CKSEL;
407 clk = of_clk_get(node, 0);
409 clk_src = clk_get_rate(clk);
413 if (clk_src <= 100000000UL) {
414 pr_err("error reference clock value, or lower than 100MHz\n");
418 nominal_freq = ptp_qoriq_nominal_freq(clk_src);
422 ptp_qoriq->tclk_period = 1000000000UL / nominal_freq;
423 ptp_qoriq->tmr_prsc = DEFAULT_TMR_PRSC;
425 /* Calculate initial frequency compensation value for TMR_ADD register.
426 * freq_comp = ceil(2^32 / freq_ratio)
427 * freq_ratio = reference_clock_freq / nominal_freq
429 freq_comp = ((u64)1 << 32) * nominal_freq;
430 freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
434 ptp_qoriq->tmr_add = freq_comp;
435 ptp_qoriq->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - ptp_qoriq->tclk_period;
436 ptp_qoriq->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - ptp_qoriq->tclk_period;
438 /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1
439 * freq_ratio = reference_clock_freq / nominal_freq
441 max_adj = 1000000000ULL * (clk_src - nominal_freq);
442 max_adj = div_u64(max_adj, nominal_freq) - 1;
443 ptp_qoriq->caps.max_adj = max_adj;
448 int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base,
449 const struct ptp_clock_info *caps)
451 struct device_node *node = ptp_qoriq->dev->of_node;
452 struct ptp_qoriq_registers *regs;
453 struct timespec64 now;
460 ptp_qoriq->base = base;
461 ptp_qoriq->caps = *caps;
463 if (of_property_read_u32(node, "fsl,cksel", &ptp_qoriq->cksel))
464 ptp_qoriq->cksel = DEFAULT_CKSEL;
466 if (of_property_read_bool(node, "fsl,extts-fifo"))
467 ptp_qoriq->extts_fifo_support = true;
469 ptp_qoriq->extts_fifo_support = false;
471 if (of_property_read_u32(node,
472 "fsl,tclk-period", &ptp_qoriq->tclk_period) ||
473 of_property_read_u32(node,
474 "fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) ||
475 of_property_read_u32(node,
476 "fsl,tmr-add", &ptp_qoriq->tmr_add) ||
477 of_property_read_u32(node,
478 "fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) ||
479 of_property_read_u32(node,
480 "fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) ||
481 of_property_read_u32(node,
482 "fsl,max-adj", &ptp_qoriq->caps.max_adj)) {
483 pr_warn("device tree node missing required elements, try automatic configuration\n");
485 if (ptp_qoriq_auto_config(ptp_qoriq, node))
489 if (of_property_read_bool(node, "little-endian")) {
490 ptp_qoriq->read = qoriq_read_le;
491 ptp_qoriq->write = qoriq_write_le;
493 ptp_qoriq->read = qoriq_read_be;
494 ptp_qoriq->write = qoriq_write_be;
497 /* The eTSEC uses differnt memory map with DPAA/ENETC */
498 if (of_device_is_compatible(node, "fsl,etsec-ptp")) {
499 ptp_qoriq->regs.ctrl_regs = base + ETSEC_CTRL_REGS_OFFSET;
500 ptp_qoriq->regs.alarm_regs = base + ETSEC_ALARM_REGS_OFFSET;
501 ptp_qoriq->regs.fiper_regs = base + ETSEC_FIPER_REGS_OFFSET;
502 ptp_qoriq->regs.etts_regs = base + ETSEC_ETTS_REGS_OFFSET;
504 ptp_qoriq->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
505 ptp_qoriq->regs.alarm_regs = base + ALARM_REGS_OFFSET;
506 ptp_qoriq->regs.fiper_regs = base + FIPER_REGS_OFFSET;
507 ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET;
510 spin_lock_init(&ptp_qoriq->lock);
512 ktime_get_real_ts64(&now);
513 ptp_qoriq_settime(&ptp_qoriq->caps, &now);
516 (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
517 (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT;
519 spin_lock_irqsave(&ptp_qoriq->lock, flags);
521 regs = &ptp_qoriq->regs;
522 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl);
523 ptp_qoriq->write(®s->ctrl_regs->tmr_add, ptp_qoriq->tmr_add);
524 ptp_qoriq->write(®s->ctrl_regs->tmr_prsc, ptp_qoriq->tmr_prsc);
525 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
526 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
527 set_alarm(ptp_qoriq);
528 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl,
529 tmr_ctrl|FIPERST|RTPE|TE|FRD);
531 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
533 ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev);
534 if (IS_ERR(ptp_qoriq->clock))
535 return PTR_ERR(ptp_qoriq->clock);
537 ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock);
538 ptp_qoriq_create_debugfs(ptp_qoriq);
541 EXPORT_SYMBOL_GPL(ptp_qoriq_init);
543 void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq)
545 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
547 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, 0);
548 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, 0);
550 ptp_qoriq_remove_debugfs(ptp_qoriq);
551 ptp_clock_unregister(ptp_qoriq->clock);
552 iounmap(ptp_qoriq->base);
553 free_irq(ptp_qoriq->irq, ptp_qoriq);
555 EXPORT_SYMBOL_GPL(ptp_qoriq_free);
557 static int ptp_qoriq_probe(struct platform_device *dev)
559 struct ptp_qoriq *ptp_qoriq;
563 ptp_qoriq = kzalloc(sizeof(*ptp_qoriq), GFP_KERNEL);
567 ptp_qoriq->dev = &dev->dev;
571 ptp_qoriq->irq = platform_get_irq(dev, 0);
572 if (ptp_qoriq->irq < 0) {
573 pr_err("irq not in device tree\n");
576 if (request_irq(ptp_qoriq->irq, ptp_qoriq_isr, IRQF_SHARED,
577 DRIVER, ptp_qoriq)) {
578 pr_err("request_irq failed\n");
582 ptp_qoriq->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
583 if (!ptp_qoriq->rsrc) {
584 pr_err("no resource\n");
587 if (request_resource(&iomem_resource, ptp_qoriq->rsrc)) {
588 pr_err("resource busy\n");
592 base = ioremap(ptp_qoriq->rsrc->start,
593 resource_size(ptp_qoriq->rsrc));
595 pr_err("ioremap ptp registers failed\n");
599 err = ptp_qoriq_init(ptp_qoriq, base, &ptp_qoriq_caps);
603 platform_set_drvdata(dev, ptp_qoriq);
607 iounmap(ptp_qoriq->base);
609 release_resource(ptp_qoriq->rsrc);
611 free_irq(ptp_qoriq->irq, ptp_qoriq);
618 static int ptp_qoriq_remove(struct platform_device *dev)
620 struct ptp_qoriq *ptp_qoriq = platform_get_drvdata(dev);
622 ptp_qoriq_free(ptp_qoriq);
623 release_resource(ptp_qoriq->rsrc);
628 static const struct of_device_id match_table[] = {
629 { .compatible = "fsl,etsec-ptp" },
630 { .compatible = "fsl,fman-ptp-timer" },
633 MODULE_DEVICE_TABLE(of, match_table);
635 static struct platform_driver ptp_qoriq_driver = {
638 .of_match_table = match_table,
640 .probe = ptp_qoriq_probe,
641 .remove = ptp_qoriq_remove,
644 module_platform_driver(ptp_qoriq_driver);
646 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
647 MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer");
648 MODULE_LICENSE("GPL");