2 * Atmel SAMA5D2-Compatible Shutdown Controller (SHDWC) driver.
3 * Found on some SoCs as the sama5d2 (obviously).
5 * Copyright (C) 2015 Atmel Corporation,
6 * Nicolas Ferre <nicolas.ferre@atmel.com>
8 * Evolved from driver at91-poweroff.c.
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
15 * - addition to status of other wake-up inputs [1 - 15]
16 * - Analog Comparator wake-up alarm
17 * - Serial RX wake-up alarm
18 * - low power debouncer
21 #include <linux/clk.h>
22 #include <linux/clk/at91_pmc.h>
24 #include <linux/module.h>
26 #include <linux/of_address.h>
27 #include <linux/platform_device.h>
28 #include <linux/printk.h>
30 #include <soc/at91/at91sam9_ddrsdr.h>
32 #define SLOW_CLOCK_FREQ 32768
34 #define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
35 #define AT91_SHDW_SHDW BIT(0) /* Shut Down command */
36 #define AT91_SHDW_KEY (0xa5UL << 24) /* KEY Password */
38 #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
39 #define AT91_SHDW_WKUPDBC_SHIFT 24
40 #define AT91_SHDW_WKUPDBC_MASK GENMASK(26, 24)
41 #define AT91_SHDW_WKUPDBC(x) (((x) << AT91_SHDW_WKUPDBC_SHIFT) \
42 & AT91_SHDW_WKUPDBC_MASK)
44 #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
45 #define AT91_SHDW_WKUPIS_SHIFT 16
46 #define AT91_SHDW_WKUPIS_MASK GENMASK(31, 16)
47 #define AT91_SHDW_WKUPIS(x) ((1 << (x)) << AT91_SHDW_WKUPIS_SHIFT \
48 & AT91_SHDW_WKUPIS_MASK)
50 #define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
51 #define AT91_SHDW_WKUPEN_MASK GENMASK(15, 0)
52 #define AT91_SHDW_WKUPEN(x) ((1 << (x)) & AT91_SHDW_WKUPEN_MASK)
53 #define AT91_SHDW_WKUPT_SHIFT 16
54 #define AT91_SHDW_WKUPT_MASK GENMASK(31, 16)
55 #define AT91_SHDW_WKUPT(x) ((1 << (x)) << AT91_SHDW_WKUPT_SHIFT \
56 & AT91_SHDW_WKUPT_MASK)
58 #define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
59 #define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
60 #define SHDW_RTTWK(reg, cfg) (((reg) >> ((cfg)->sr_rttwk_shift)) & 0x1)
61 #define SHDW_RTCWKEN(cfg) (1 << ((cfg)->mr_rtcwk_shift))
62 #define SHDW_RTTWKEN(cfg) (1 << ((cfg)->mr_rttwk_shift))
64 #define DBC_PERIOD_US(x) DIV_ROUND_UP_ULL((1000000 * (x)), \
67 #define SHDW_CFG_NOT_USED (32)
69 struct shdwc_reg_config {
77 struct pmc_reg_config {
81 struct ddrc_reg_config {
87 struct shdwc_reg_config shdwc;
88 struct pmc_reg_config pmc;
89 struct ddrc_reg_config ddrc;
93 const struct reg_config *rcfg;
95 void __iomem *shdwc_base;
96 void __iomem *mpddrc_base;
97 void __iomem *pmc_base;
101 * Hold configuration here, cannot be more than one instance of the driver
102 * since pm_power_off itself is global.
104 static struct shdwc *at91_shdwc;
106 static const unsigned long long sdwc_dbc_period[] = {
107 0, 3, 32, 512, 4096, 32768,
110 static void at91_wakeup_status(struct platform_device *pdev)
112 struct shdwc *shdw = platform_get_drvdata(pdev);
113 const struct reg_config *rcfg = shdw->rcfg;
115 char *reason = "unknown";
117 reg = readl(shdw->shdwc_base + AT91_SHDW_SR);
119 dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
121 /* Simple power-on, just bail out */
125 if (SHDW_WK_PIN(reg, &rcfg->shdwc))
127 else if (SHDW_RTCWK(reg, &rcfg->shdwc))
129 else if (SHDW_RTTWK(reg, &rcfg->shdwc))
132 pr_info("AT91: Wake-Up source: %s\n", reason);
135 static void at91_poweroff(void)
138 /* Align to cache lines */
141 /* Ensure AT91_SHDW_CR is in the TLB by reading it */
142 " ldr r6, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
144 /* Power down SDRAM0 */
147 " str %1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
149 /* Switch the master clock source to slow clock. */
150 "1: ldr r6, [%4, %5]\n\t"
151 " bic r6, r6, #" __stringify(AT91_PMC_CSS) "\n\t"
152 " str r6, [%4, %5]\n\t"
153 /* Wait for clock switch. */
154 "2: ldr r6, [%4, #" __stringify(AT91_PMC_SR) "]\n\t"
155 " tst r6, #" __stringify(AT91_PMC_MCKRDY) "\n\t"
159 " str %3, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
163 : "r" (at91_shdwc->mpddrc_base),
164 "r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF),
165 "r" (at91_shdwc->shdwc_base),
166 "r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW),
167 "r" (at91_shdwc->pmc_base),
168 "r" (at91_shdwc->rcfg->pmc.mckr)
172 static u32 at91_shdwc_debouncer_value(struct platform_device *pdev,
176 int max_idx = ARRAY_SIZE(sdwc_dbc_period) - 1;
177 unsigned long long period_us;
178 unsigned long long max_period_us = DBC_PERIOD_US(sdwc_dbc_period[max_idx]);
180 if (in_period_us > max_period_us) {
182 "debouncer period %u too big, reduced to %llu us\n",
183 in_period_us, max_period_us);
187 for (i = max_idx - 1; i > 0; i--) {
188 period_us = DBC_PERIOD_US(sdwc_dbc_period[i]);
189 dev_dbg(&pdev->dev, "%s: ref[%d] = %llu\n",
190 __func__, i, period_us);
191 if (in_period_us > period_us)
198 static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev,
199 struct device_node *np)
201 struct device_node *cnp;
206 for_each_child_of_node(np, cnp) {
207 if (of_property_read_u32(cnp, "reg", &wk_input)) {
208 dev_warn(&pdev->dev, "reg property is missing for %pOF\n",
213 wk_input_mask = 1 << wk_input;
214 if (!(wk_input_mask & AT91_SHDW_WKUPEN_MASK)) {
216 "wake-up input %d out of bounds ignore\n",
220 wuir |= wk_input_mask;
222 if (of_property_read_bool(cnp, "atmel,wakeup-active-high"))
223 wuir |= AT91_SHDW_WKUPT(wk_input);
225 dev_dbg(&pdev->dev, "%s: (child %d) wuir = %#x\n",
226 __func__, wk_input, wuir);
232 static void at91_shdwc_dt_configure(struct platform_device *pdev)
234 struct shdwc *shdw = platform_get_drvdata(pdev);
235 const struct reg_config *rcfg = shdw->rcfg;
236 struct device_node *np = pdev->dev.of_node;
237 u32 mode = 0, tmp, input;
240 dev_err(&pdev->dev, "device node not found\n");
244 if (!of_property_read_u32(np, "debounce-delay-us", &tmp))
245 mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev, tmp));
247 if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
248 mode |= SHDW_RTCWKEN(&rcfg->shdwc);
250 if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
251 mode |= SHDW_RTTWKEN(&rcfg->shdwc);
253 dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
254 writel(mode, shdw->shdwc_base + AT91_SHDW_MR);
256 input = at91_shdwc_get_wakeup_input(pdev, np);
257 writel(input, shdw->shdwc_base + AT91_SHDW_WUIR);
260 static const struct reg_config sama5d2_reg_config = {
263 .mr_rtcwk_shift = 17,
264 .mr_rttwk_shift = SHDW_CFG_NOT_USED,
266 .sr_rttwk_shift = SHDW_CFG_NOT_USED,
272 .type_offset = AT91_DDRSDRC_MDR,
273 .type_mask = AT91_DDRSDRC_MD
277 static const struct reg_config sam9x60_reg_config = {
280 .mr_rtcwk_shift = 17,
281 .mr_rttwk_shift = 16,
289 .type_offset = AT91_DDRSDRC_MDR,
290 .type_mask = AT91_DDRSDRC_MD
294 static const struct reg_config sama7g5_reg_config = {
297 .mr_rtcwk_shift = 17,
298 .mr_rttwk_shift = 16,
307 static const struct of_device_id at91_shdwc_of_match[] = {
309 .compatible = "atmel,sama5d2-shdwc",
310 .data = &sama5d2_reg_config,
313 .compatible = "microchip,sam9x60-shdwc",
314 .data = &sam9x60_reg_config,
317 .compatible = "microchip,sama7g5-shdwc",
318 .data = &sama7g5_reg_config,
323 MODULE_DEVICE_TABLE(of, at91_shdwc_of_match);
325 static const struct of_device_id at91_pmc_ids[] = {
326 { .compatible = "atmel,sama5d2-pmc" },
327 { .compatible = "microchip,sam9x60-pmc" },
328 { .compatible = "microchip,sama7g5-pmc" },
332 static int at91_shdwc_probe(struct platform_device *pdev)
334 const struct of_device_id *match;
335 struct device_node *np;
339 if (!pdev->dev.of_node)
345 at91_shdwc = devm_kzalloc(&pdev->dev, sizeof(*at91_shdwc), GFP_KERNEL);
349 platform_set_drvdata(pdev, at91_shdwc);
351 at91_shdwc->shdwc_base = devm_platform_ioremap_resource(pdev, 0);
352 if (IS_ERR(at91_shdwc->shdwc_base))
353 return PTR_ERR(at91_shdwc->shdwc_base);
355 match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
356 at91_shdwc->rcfg = match->data;
358 at91_shdwc->sclk = devm_clk_get(&pdev->dev, NULL);
359 if (IS_ERR(at91_shdwc->sclk))
360 return PTR_ERR(at91_shdwc->sclk);
362 ret = clk_prepare_enable(at91_shdwc->sclk);
364 dev_err(&pdev->dev, "Could not enable slow clock\n");
368 at91_wakeup_status(pdev);
370 at91_shdwc_dt_configure(pdev);
372 np = of_find_matching_node(NULL, at91_pmc_ids);
378 at91_shdwc->pmc_base = of_iomap(np, 0);
381 if (!at91_shdwc->pmc_base) {
386 if (at91_shdwc->rcfg->ddrc.type_mask) {
387 np = of_find_compatible_node(NULL, NULL,
388 "atmel,sama5d3-ddramc");
394 at91_shdwc->mpddrc_base = of_iomap(np, 0);
397 if (!at91_shdwc->mpddrc_base) {
402 ddr_type = readl(at91_shdwc->mpddrc_base +
403 at91_shdwc->rcfg->ddrc.type_offset) &
404 at91_shdwc->rcfg->ddrc.type_mask;
405 if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
406 ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
407 iounmap(at91_shdwc->mpddrc_base);
408 at91_shdwc->mpddrc_base = NULL;
412 pm_power_off = at91_poweroff;
417 iounmap(at91_shdwc->pmc_base);
419 clk_disable_unprepare(at91_shdwc->sclk);
424 static void at91_shdwc_remove(struct platform_device *pdev)
426 struct shdwc *shdw = platform_get_drvdata(pdev);
428 if (pm_power_off == at91_poweroff)
431 /* Reset values to disable wake-up features */
432 writel(0, shdw->shdwc_base + AT91_SHDW_MR);
433 writel(0, shdw->shdwc_base + AT91_SHDW_WUIR);
435 if (shdw->mpddrc_base)
436 iounmap(shdw->mpddrc_base);
437 iounmap(shdw->pmc_base);
439 clk_disable_unprepare(shdw->sclk);
442 static struct platform_driver at91_shdwc_driver = {
443 .probe = at91_shdwc_probe,
444 .remove_new = at91_shdwc_remove,
446 .name = "at91-shdwc",
447 .of_match_table = at91_shdwc_of_match,
450 module_platform_driver(at91_shdwc_driver);
452 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
453 MODULE_DESCRIPTION("Atmel shutdown controller driver");
454 MODULE_LICENSE("GPL v2");