1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
4 // Copyright (C) 2012 Google, Inc
6 #include <linux/delay.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/mfd/cros_ec.h>
10 #include <linux/mfd/cros_ec_commands.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/spi/spi.h>
15 #include <uapi/linux/sched/types.h>
17 /* The header byte, which follows the preamble */
18 #define EC_MSG_HEADER 0xec
21 * Number of EC preamble bytes we read at a time. Since it takes
22 * about 400-500us for the EC to respond there is not a lot of
23 * point in tuning this. If the EC could respond faster then
24 * we could increase this so that might expect the preamble and
25 * message to occur in a single transaction. However, the maximum
26 * SPI transfer size is 256 bytes, so at 5MHz we need a response
27 * time of perhaps <320us (200 bytes / 1600 bits).
29 #define EC_MSG_PREAMBLE_COUNT 32
32 * Allow for a long time for the EC to respond. We support i2c
33 * tunneling and support fairly long messages for the tunnel (249
34 * bytes long at the moment). If we're talking to a 100 kHz device
35 * on the other end and need to transfer ~256 bytes, then we need:
36 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
38 * We'll wait 8 times that to handle clock stretching and other
39 * paranoia. Note that some battery gas gauge ICs claim to have a
40 * clock stretch of 144ms in rare situations. That's incentive for
41 * not directly passing i2c through, but it's too late for that for
44 * It's pretty unlikely that we'll really see a 249 byte tunnel in
45 * anything other than testing. If this was more common we might
46 * consider having slow commands like this require a GET_STATUS
47 * wait loop. The 'flash write' command would be another candidate
48 * for this, clocking in at 2-3ms.
50 #define EC_MSG_DEADLINE_MS 200
53 * Time between raising the SPI chip select (for the end of a
54 * transaction) and dropping it again (for the next transaction).
55 * If we go too fast, the EC will miss the transaction. We know that we
56 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
59 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
62 * struct cros_ec_spi - information about a SPI-connected EC
64 * @spi: SPI device we are connected to
65 * @last_transfer_ns: time that we last finished a transfer.
66 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
67 * is sent when we want to turn on CS at the start of a transaction.
68 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
69 * is sent when we want to turn off CS at the end of a transaction.
70 * @high_pri_worker: Used to schedule high priority work.
73 struct spi_device *spi;
75 unsigned int start_of_msg_delay;
76 unsigned int end_of_msg_delay;
77 struct kthread_worker *high_pri_worker;
80 typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev,
81 struct cros_ec_command *ec_msg);
84 * struct cros_ec_xfer_work_params - params for our high priority workers
86 * @work: The work_struct needed to queue work
87 * @fn: The function to use to transfer
88 * @ec_dev: ChromeOS EC device
89 * @ec_msg: Message to transfer
90 * @ret: The return value of the function
93 struct cros_ec_xfer_work_params {
94 struct kthread_work work;
96 struct cros_ec_device *ec_dev;
97 struct cros_ec_command *ec_msg;
101 static void debug_packet(struct device *dev, const char *name, u8 *ptr,
107 dev_dbg(dev, "%s: ", name);
108 for (i = 0; i < len; i++)
109 pr_cont(" %02x", ptr[i]);
115 static int terminate_request(struct cros_ec_device *ec_dev)
117 struct cros_ec_spi *ec_spi = ec_dev->priv;
118 struct spi_message msg;
119 struct spi_transfer trans;
123 * Turn off CS, possibly adding a delay to ensure the rising edge
124 * doesn't come too soon after the end of the data.
126 spi_message_init(&msg);
127 memset(&trans, 0, sizeof(trans));
128 trans.delay_usecs = ec_spi->end_of_msg_delay;
129 spi_message_add_tail(&trans, &msg);
131 ret = spi_sync_locked(ec_spi->spi, &msg);
133 /* Reset end-of-response timer */
134 ec_spi->last_transfer_ns = ktime_get_ns();
137 "cs-deassert spi transfer failed: %d\n",
145 * receive_n_bytes - receive n bytes from the EC.
147 * Assumes buf is a pointer into the ec_dev->din buffer
149 static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
151 struct cros_ec_spi *ec_spi = ec_dev->priv;
152 struct spi_transfer trans;
153 struct spi_message msg;
156 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
158 memset(&trans, 0, sizeof(trans));
163 spi_message_init(&msg);
164 spi_message_add_tail(&trans, &msg);
165 ret = spi_sync_locked(ec_spi->spi, &msg);
167 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
173 * cros_ec_spi_receive_packet - Receive a packet from the EC.
175 * This function has two phases: reading the preamble bytes (since if we read
176 * data from the EC before it is ready to send, we just get preamble) and
177 * reading the actual message.
179 * The received data is placed into ec_dev->din.
181 * @ec_dev: ChromeOS EC device
182 * @need_len: Number of message bytes we need to read
184 static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
187 struct ec_host_response *response;
190 unsigned long deadline;
193 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
195 /* Receive data until we see the header byte */
196 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
198 unsigned long start_jiffies = jiffies;
200 ret = receive_n_bytes(ec_dev,
202 EC_MSG_PREAMBLE_COUNT);
207 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
208 if (*ptr == EC_SPI_FRAME_START) {
209 dev_dbg(ec_dev->dev, "msg found at %zd\n",
218 * Use the time at the start of the loop as a timeout. This
219 * gives us one last shot at getting the transfer and is useful
220 * in case we got context switched out for a while.
222 if (time_after(start_jiffies, deadline)) {
223 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
229 * ptr now points to the header byte. Copy any valid data to the
230 * start of our buffer
233 BUG_ON(todo < 0 || todo > ec_dev->din_size);
234 todo = min(todo, need_len);
235 memmove(ec_dev->din, ptr, todo);
236 ptr = ec_dev->din + todo;
237 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
241 /* If the entire response struct wasn't read, get the rest of it. */
242 if (todo < sizeof(*response)) {
243 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
246 ptr += (sizeof(*response) - todo);
247 todo = sizeof(*response);
250 response = (struct ec_host_response *)ec_dev->din;
252 /* Abort if data_len is too large. */
253 if (response->data_len > ec_dev->din_size)
256 /* Receive data until we have it all */
257 while (need_len > 0) {
259 * We can't support transfers larger than the SPI FIFO size
260 * unless we have DMA. We don't have DMA on the ISP SPI ports
261 * for Exynos. We need a way of asking SPI driver for
262 * maximum-supported transfer size.
264 todo = min(need_len, 256);
265 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
266 todo, need_len, ptr - ec_dev->din);
268 ret = receive_n_bytes(ec_dev, ptr, todo);
276 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
282 * cros_ec_spi_receive_response - Receive a response from the EC.
284 * This function has two phases: reading the preamble bytes (since if we read
285 * data from the EC before it is ready to send, we just get preamble) and
286 * reading the actual message.
288 * The received data is placed into ec_dev->din.
290 * @ec_dev: ChromeOS EC device
291 * @need_len: Number of message bytes we need to read
293 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
298 unsigned long deadline;
301 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
303 /* Receive data until we see the header byte */
304 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
306 unsigned long start_jiffies = jiffies;
308 ret = receive_n_bytes(ec_dev,
310 EC_MSG_PREAMBLE_COUNT);
315 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
316 if (*ptr == EC_SPI_FRAME_START) {
317 dev_dbg(ec_dev->dev, "msg found at %zd\n",
326 * Use the time at the start of the loop as a timeout. This
327 * gives us one last shot at getting the transfer and is useful
328 * in case we got context switched out for a while.
330 if (time_after(start_jiffies, deadline)) {
331 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
337 * ptr now points to the header byte. Copy any valid data to the
338 * start of our buffer
341 BUG_ON(todo < 0 || todo > ec_dev->din_size);
342 todo = min(todo, need_len);
343 memmove(ec_dev->din, ptr, todo);
344 ptr = ec_dev->din + todo;
345 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
349 /* Receive data until we have it all */
350 while (need_len > 0) {
352 * We can't support transfers larger than the SPI FIFO size
353 * unless we have DMA. We don't have DMA on the ISP SPI ports
354 * for Exynos. We need a way of asking SPI driver for
355 * maximum-supported transfer size.
357 todo = min(need_len, 256);
358 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
359 todo, need_len, ptr - ec_dev->din);
361 ret = receive_n_bytes(ec_dev, ptr, todo);
365 debug_packet(ec_dev->dev, "interim", ptr, todo);
370 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
376 * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
378 * @ec_dev: ChromeOS EC device
379 * @ec_msg: Message to transfer
381 static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
382 struct cros_ec_command *ec_msg)
384 struct ec_host_response *response;
385 struct cros_ec_spi *ec_spi = ec_dev->priv;
386 struct spi_transfer trans, trans_delay;
387 struct spi_message msg;
393 int ret = 0, final_ret;
396 len = cros_ec_prepare_tx(ec_dev, ec_msg);
397 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
399 /* If it's too soon to do another transaction, wait */
400 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
401 if (delay < EC_SPI_RECOVERY_TIME_NS)
402 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
404 rx_buf = kzalloc(len, GFP_KERNEL);
408 spi_bus_lock(ec_spi->spi->master);
411 * Leave a gap between CS assertion and clocking of data to allow the
414 spi_message_init(&msg);
415 if (ec_spi->start_of_msg_delay) {
416 memset(&trans_delay, 0, sizeof(trans_delay));
417 trans_delay.delay_usecs = ec_spi->start_of_msg_delay;
418 spi_message_add_tail(&trans_delay, &msg);
421 /* Transmit phase - send our message */
422 memset(&trans, 0, sizeof(trans));
423 trans.tx_buf = ec_dev->dout;
424 trans.rx_buf = rx_buf;
427 spi_message_add_tail(&trans, &msg);
428 ret = spi_sync_locked(ec_spi->spi, &msg);
430 /* Get the response */
432 /* Verify that EC can process command */
433 for (i = 0; i < len; i++) {
436 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
437 * markers are all signs that the EC didn't fully
438 * receive our command. e.g., if the EC is flashing
439 * itself, it can't respond to any commands and instead
440 * clocks out EC_SPI_PAST_END from its SPI hardware
441 * buffer. Similar occurrences can happen if the AP is
442 * too slow to clock out data after asserting CS -- the
443 * EC will abort and fill its buffer with
444 * EC_SPI_RX_BAD_DATA.
446 * In all cases, these errors should be safe to retry.
447 * Report -EAGAIN and let the caller decide what to do
450 if (rx_byte == EC_SPI_PAST_END ||
451 rx_byte == EC_SPI_RX_BAD_DATA ||
452 rx_byte == EC_SPI_NOT_READY) {
460 ret = cros_ec_spi_receive_packet(ec_dev,
461 ec_msg->insize + sizeof(*response));
462 else if (ret != -EAGAIN)
463 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
465 final_ret = terminate_request(ec_dev);
467 spi_bus_unlock(ec_spi->spi->master);
476 /* check response error code */
477 response = (struct ec_host_response *)ptr;
478 ec_msg->result = response->result;
480 ret = cros_ec_check_result(ec_dev, ec_msg);
484 len = response->data_len;
486 if (len > ec_msg->insize) {
487 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
488 len, ec_msg->insize);
493 for (i = 0; i < sizeof(*response); i++)
496 /* copy response packet payload and compute checksum */
497 memcpy(ec_msg->data, ptr + sizeof(*response), len);
498 for (i = 0; i < len; i++)
499 sum += ec_msg->data[i];
503 "bad packet checksum, calculated %x\n",
512 if (ec_msg->command == EC_CMD_REBOOT_EC)
513 msleep(EC_REBOOT_DELAY_MS);
519 * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
521 * @ec_dev: ChromeOS EC device
522 * @ec_msg: Message to transfer
524 static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
525 struct cros_ec_command *ec_msg)
527 struct cros_ec_spi *ec_spi = ec_dev->priv;
528 struct spi_transfer trans;
529 struct spi_message msg;
535 int ret = 0, final_ret;
538 len = cros_ec_prepare_tx(ec_dev, ec_msg);
539 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
541 /* If it's too soon to do another transaction, wait */
542 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
543 if (delay < EC_SPI_RECOVERY_TIME_NS)
544 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
546 rx_buf = kzalloc(len, GFP_KERNEL);
550 spi_bus_lock(ec_spi->spi->master);
552 /* Transmit phase - send our message */
553 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
554 memset(&trans, 0, sizeof(trans));
555 trans.tx_buf = ec_dev->dout;
556 trans.rx_buf = rx_buf;
559 spi_message_init(&msg);
560 spi_message_add_tail(&trans, &msg);
561 ret = spi_sync_locked(ec_spi->spi, &msg);
563 /* Get the response */
565 /* Verify that EC can process command */
566 for (i = 0; i < len; i++) {
568 /* See comments in cros_ec_pkt_xfer_spi() */
569 if (rx_byte == EC_SPI_PAST_END ||
570 rx_byte == EC_SPI_RX_BAD_DATA ||
571 rx_byte == EC_SPI_NOT_READY) {
579 ret = cros_ec_spi_receive_response(ec_dev,
580 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
581 else if (ret != -EAGAIN)
582 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
584 final_ret = terminate_request(ec_dev);
586 spi_bus_unlock(ec_spi->spi->master);
595 /* check response error code */
596 ec_msg->result = ptr[0];
597 ret = cros_ec_check_result(ec_dev, ec_msg);
602 sum = ptr[0] + ptr[1];
603 if (len > ec_msg->insize) {
604 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
605 len, ec_msg->insize);
610 /* copy response packet payload and compute checksum */
611 for (i = 0; i < len; i++) {
614 ec_msg->data[i] = ptr[i + 2];
618 debug_packet(ec_dev->dev, "in", ptr, len + 3);
620 if (sum != ptr[len + 2]) {
622 "bad packet checksum, expected %02x, got %02x\n",
631 if (ec_msg->command == EC_CMD_REBOOT_EC)
632 msleep(EC_REBOOT_DELAY_MS);
637 static void cros_ec_xfer_high_pri_work(struct kthread_work *work)
639 struct cros_ec_xfer_work_params *params;
641 params = container_of(work, struct cros_ec_xfer_work_params, work);
642 params->ret = params->fn(params->ec_dev, params->ec_msg);
645 static int cros_ec_xfer_high_pri(struct cros_ec_device *ec_dev,
646 struct cros_ec_command *ec_msg,
647 cros_ec_xfer_fn_t fn)
649 struct cros_ec_spi *ec_spi = ec_dev->priv;
650 struct cros_ec_xfer_work_params params = {
651 .work = KTHREAD_WORK_INIT(params.work,
652 cros_ec_xfer_high_pri_work),
659 * This looks a bit ridiculous. Why do the work on a
660 * different thread if we're just going to block waiting for
661 * the thread to finish? The key here is that the thread is
662 * running at high priority but the calling context might not
663 * be. We need to be at high priority to avoid getting
664 * context switched out for too long and the EC giving up on
667 kthread_queue_work(ec_spi->high_pri_worker, ¶ms.work);
668 kthread_flush_work(¶ms.work);
673 static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
674 struct cros_ec_command *ec_msg)
676 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_pkt_xfer_spi);
679 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
680 struct cros_ec_command *ec_msg)
682 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi);
685 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
687 struct device_node *np = dev->of_node;
691 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
693 ec_spi->start_of_msg_delay = val;
695 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
697 ec_spi->end_of_msg_delay = val;
700 static void cros_ec_spi_high_pri_release(void *worker)
702 kthread_destroy_worker(worker);
705 static int cros_ec_spi_devm_high_pri_alloc(struct device *dev,
706 struct cros_ec_spi *ec_spi)
708 struct sched_param sched_priority = {
709 .sched_priority = MAX_RT_PRIO - 1,
713 ec_spi->high_pri_worker =
714 kthread_create_worker(0, "cros_ec_spi_high_pri");
716 if (IS_ERR(ec_spi->high_pri_worker)) {
717 err = PTR_ERR(ec_spi->high_pri_worker);
718 dev_err(dev, "Can't create cros_ec high pri worker: %d\n", err);
722 err = devm_add_action_or_reset(dev, cros_ec_spi_high_pri_release,
723 ec_spi->high_pri_worker);
727 err = sched_setscheduler_nocheck(ec_spi->high_pri_worker->task,
728 SCHED_FIFO, &sched_priority);
730 dev_err(dev, "Can't set cros_ec high pri priority: %d\n", err);
734 static int cros_ec_spi_probe(struct spi_device *spi)
736 struct device *dev = &spi->dev;
737 struct cros_ec_device *ec_dev;
738 struct cros_ec_spi *ec_spi;
741 spi->bits_per_word = 8;
742 spi->mode = SPI_MODE_0;
744 err = spi_setup(spi);
748 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
752 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
756 /* Check for any DT properties */
757 cros_ec_spi_dt_probe(ec_spi, dev);
759 spi_set_drvdata(spi, ec_dev);
761 ec_dev->priv = ec_spi;
762 ec_dev->irq = spi->irq;
763 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
764 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
765 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
766 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
767 sizeof(struct ec_host_response) +
768 sizeof(struct ec_response_get_protocol_info);
769 ec_dev->dout_size = sizeof(struct ec_host_request);
771 ec_spi->last_transfer_ns = ktime_get_ns();
773 err = cros_ec_spi_devm_high_pri_alloc(dev, ec_spi);
777 err = cros_ec_register(ec_dev);
779 dev_err(dev, "cannot register EC\n");
783 device_init_wakeup(&spi->dev, true);
788 #ifdef CONFIG_PM_SLEEP
789 static int cros_ec_spi_suspend(struct device *dev)
791 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
793 return cros_ec_suspend(ec_dev);
796 static int cros_ec_spi_resume(struct device *dev)
798 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
800 return cros_ec_resume(ec_dev);
804 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
807 static const struct of_device_id cros_ec_spi_of_match[] = {
808 { .compatible = "google,cros-ec-spi", },
811 MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
813 static const struct spi_device_id cros_ec_spi_id[] = {
814 { "cros-ec-spi", 0 },
817 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
819 static struct spi_driver cros_ec_driver_spi = {
821 .name = "cros-ec-spi",
822 .of_match_table = cros_ec_spi_of_match,
823 .pm = &cros_ec_spi_pm_ops,
825 .probe = cros_ec_spi_probe,
826 .id_table = cros_ec_spi_id,
829 module_spi_driver(cros_ec_driver_spi);
831 MODULE_LICENSE("GPL v2");
832 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");