1 // SPDX-License-Identifier: GPL-2.0
2 // LPC interface for ChromeOS Embedded Controller
4 // Copyright (C) 2012-2015 Google, Inc
6 // This driver uses the ChromeOS EC byte-level message-based protocol for
7 // communicating the keyboard state (which keys are pressed) from a keyboard EC
8 // to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
9 // but everything else (including deghosting) is done here. The main
10 // motivation for this is to keep the EC firmware as simple as possible, since
11 // it cannot be easily upgraded and EC flash/IRAM space is relatively
14 #include <linux/acpi.h>
15 #include <linux/dmi.h>
16 #include <linux/delay.h>
18 #include <linux/interrupt.h>
19 #include <linux/mfd/cros_ec.h>
20 #include <linux/mfd/cros_ec_commands.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/printk.h>
24 #include <linux/suspend.h>
26 #include "cros_ec_lpc_mec.h"
28 #define DRV_NAME "cros_ec_lpcs"
29 #define ACPI_DRV_NAME "GOOG0004"
31 /* True if ACPI device is present */
32 static bool cros_ec_lpc_acpi_device_found;
35 * struct lpc_driver_ops - LPC driver operations
36 * @read: Copy length bytes from EC address offset into buffer dest. Returns
37 * the 8-bit checksum of all bytes read.
38 * @write: Copy length bytes from buffer msg into EC address offset. Returns
39 * the 8-bit checksum of all bytes written.
41 struct lpc_driver_ops {
42 u8 (*read)(unsigned int offset, unsigned int length, u8 *dest);
43 u8 (*write)(unsigned int offset, unsigned int length, const u8 *msg);
46 static struct lpc_driver_ops cros_ec_lpc_ops = { };
49 * A generic instance of the read function of struct lpc_driver_ops, used for
52 static u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length,
58 for (i = 0; i < length; ++i) {
59 dest[i] = inb(offset + i);
63 /* Return checksum of all bytes read */
68 * A generic instance of the write function of struct lpc_driver_ops, used for
71 static u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length,
77 for (i = 0; i < length; ++i) {
78 outb(msg[i], offset + i);
82 /* Return checksum of all bytes written */
87 * An instance of the read function of struct lpc_driver_ops, used for the
88 * MEC variant of LPC EC.
90 static u8 cros_ec_lpc_mec_read_bytes(unsigned int offset, unsigned int length,
93 int in_range = cros_ec_lpc_mec_in_range(offset, length);
99 cros_ec_lpc_io_bytes_mec(MEC_IO_READ,
100 offset - EC_HOST_CMD_REGION0,
102 cros_ec_lpc_read_bytes(offset, length, dest);
106 * An instance of the write function of struct lpc_driver_ops, used for the
107 * MEC variant of LPC EC.
109 static u8 cros_ec_lpc_mec_write_bytes(unsigned int offset, unsigned int length,
112 int in_range = cros_ec_lpc_mec_in_range(offset, length);
118 cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE,
119 offset - EC_HOST_CMD_REGION0,
121 cros_ec_lpc_write_bytes(offset, length, msg);
124 static int ec_response_timed_out(void)
126 unsigned long one_second = jiffies + HZ;
129 usleep_range(200, 300);
131 if (!(cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_CMD, 1, &data) &
132 EC_LPC_STATUS_BUSY_MASK))
134 usleep_range(100, 200);
135 } while (time_before(jiffies, one_second));
140 static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
141 struct cros_ec_command *msg)
143 struct ec_host_response response;
148 ret = cros_ec_prepare_tx(ec, msg);
151 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
154 sum = EC_COMMAND_PROTOCOL_3;
155 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
157 if (ec_response_timed_out()) {
158 dev_warn(ec->dev, "EC responsed timed out\n");
164 msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
165 ret = cros_ec_check_result(ec, msg);
169 /* Read back response */
170 dout = (u8 *)&response;
171 sum = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
174 msg->result = response.result;
176 if (response.data_len > msg->insize) {
178 "packet too long (%d bytes, expected %d)",
179 response.data_len, msg->insize);
184 /* Read response and process checksum */
185 sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET +
186 sizeof(response), response.data_len,
191 "bad packet checksum %02x\n",
197 /* Return actual amount of data received */
198 ret = response.data_len;
203 static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
204 struct cros_ec_command *msg)
206 struct ec_lpc_host_args args;
210 if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
211 msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
213 "invalid buffer sizes (out %d, in %d)\n",
214 msg->outsize, msg->insize);
218 /* Now actually send the command to the EC and get the result */
219 args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
220 args.command_version = msg->version;
221 args.data_size = msg->outsize;
223 /* Initialize checksum */
224 sum = msg->command + args.flags + args.command_version + args.data_size;
226 /* Copy data and update checksum */
227 sum += cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
230 /* Finalize checksum and write args */
232 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
237 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
239 if (ec_response_timed_out()) {
240 dev_warn(ec->dev, "EC responsed timed out\n");
246 msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
247 ret = cros_ec_check_result(ec, msg);
252 cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8 *)&args);
254 if (args.data_size > msg->insize) {
256 "packet too long (%d bytes, expected %d)",
257 args.data_size, msg->insize);
262 /* Start calculating response checksum */
263 sum = msg->command + args.flags + args.command_version + args.data_size;
265 /* Read response and update checksum */
266 sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PARAM, args.data_size,
269 /* Verify checksum */
270 if (args.checksum != sum) {
272 "bad packet checksum, expected %02x, got %02x\n",
278 /* Return actual amount of data received */
279 ret = args.data_size;
284 /* Returns num bytes read, or negative on error. Doesn't need locking. */
285 static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
286 unsigned int bytes, void *dest)
292 if (offset >= EC_MEMMAP_SIZE - bytes)
297 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
302 for (; i < EC_MEMMAP_SIZE; i++, s++) {
303 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + i, 1, s);
312 static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
314 struct cros_ec_device *ec_dev = data;
316 if (ec_dev->mkbp_event_supported &&
317 cros_ec_get_next_event(ec_dev, NULL) > 0)
318 blocking_notifier_call_chain(&ec_dev->event_notifier, 0,
321 if (value == ACPI_NOTIFY_DEVICE_WAKE)
325 static int cros_ec_lpc_probe(struct platform_device *pdev)
327 struct device *dev = &pdev->dev;
328 struct acpi_device *adev;
330 struct cros_ec_device *ec_dev;
334 if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
336 dev_err(dev, "couldn't reserve memmap region\n");
341 * Read the mapped ID twice, the first one is assuming the
342 * EC is a Microchip Embedded Controller (MEC) variant, if the
343 * protocol fails, fallback to the non MEC variant and try to
346 cros_ec_lpc_ops.read = cros_ec_lpc_mec_read_bytes;
347 cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes;
348 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
349 if (buf[0] != 'E' || buf[1] != 'C') {
350 /* Re-assign read/write operations for the non MEC variant */
351 cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes;
352 cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes;
353 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2,
355 if (buf[0] != 'E' || buf[1] != 'C') {
356 dev_err(dev, "EC ID not detected\n");
361 if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
362 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
363 dev_err(dev, "couldn't reserve region0\n");
366 if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
367 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
368 dev_err(dev, "couldn't reserve region1\n");
372 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
376 platform_set_drvdata(pdev, ec_dev);
378 ec_dev->phys_name = dev_name(dev);
379 ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
380 ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
381 ec_dev->cmd_readmem = cros_ec_lpc_readmem;
382 ec_dev->din_size = sizeof(struct ec_host_response) +
383 sizeof(struct ec_response_get_protocol_info);
384 ec_dev->dout_size = sizeof(struct ec_host_request);
387 * Some boards do not have an IRQ allotted for cros_ec_lpc,
388 * which makes ENXIO an expected (and safe) scenario.
390 irq = platform_get_irq(pdev, 0);
393 else if (irq != -ENXIO) {
394 dev_err(dev, "couldn't retrieve IRQ number (%d)\n", irq);
398 ret = cros_ec_register(ec_dev);
400 dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
405 * Connect a notify handler to process MKBP messages if we have a
406 * companion ACPI device.
408 adev = ACPI_COMPANION(dev);
410 status = acpi_install_notify_handler(adev->handle,
412 cros_ec_lpc_acpi_notify,
414 if (ACPI_FAILURE(status))
415 dev_warn(dev, "Failed to register notifier %08x\n",
422 static int cros_ec_lpc_remove(struct platform_device *pdev)
424 struct acpi_device *adev;
426 adev = ACPI_COMPANION(&pdev->dev);
428 acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
429 cros_ec_lpc_acpi_notify);
434 static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
435 { ACPI_DRV_NAME, 0 },
438 MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids);
440 static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
443 * Today all Chromebooks/boxes ship with Google_* as version and
444 * coreboot as bios vendor. No other systems with this
445 * combination are known to date.
448 DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
449 DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
454 * If the box is running custom coreboot firmware then the
455 * DMI BIOS version string will not be matched by "Google_",
456 * but the system vendor string will still be matched by
460 DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
461 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
465 /* x86-link, the Chromebook Pixel. */
467 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
468 DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
472 /* x86-samus, the Chromebook Pixel 2. */
474 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
475 DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
479 /* x86-peppy, the Acer C720 Chromebook. */
481 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
482 DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
486 /* x86-glimmer, the Lenovo Thinkpad Yoga 11e. */
488 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
489 DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"),
494 MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
496 #ifdef CONFIG_PM_SLEEP
497 static int cros_ec_lpc_suspend(struct device *dev)
499 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
501 return cros_ec_suspend(ec_dev);
504 static int cros_ec_lpc_resume(struct device *dev)
506 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
508 return cros_ec_resume(ec_dev);
512 static const struct dev_pm_ops cros_ec_lpc_pm_ops = {
513 SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
516 static struct platform_driver cros_ec_lpc_driver = {
519 .acpi_match_table = cros_ec_lpc_acpi_device_ids,
520 .pm = &cros_ec_lpc_pm_ops,
522 .probe = cros_ec_lpc_probe,
523 .remove = cros_ec_lpc_remove,
526 static struct platform_device cros_ec_lpc_device = {
530 static acpi_status cros_ec_lpc_parse_device(acpi_handle handle, u32 level,
531 void *context, void **retval)
533 *(bool *)context = true;
534 return AE_CTRL_TERMINATE;
537 static int __init cros_ec_lpc_init(void)
542 status = acpi_get_devices(ACPI_DRV_NAME, cros_ec_lpc_parse_device,
543 &cros_ec_lpc_acpi_device_found, NULL);
544 if (ACPI_FAILURE(status))
545 pr_warn(DRV_NAME ": Looking for %s failed\n", ACPI_DRV_NAME);
547 if (!cros_ec_lpc_acpi_device_found &&
548 !dmi_check_system(cros_ec_lpc_dmi_table)) {
549 pr_err(DRV_NAME ": unsupported system.\n");
553 cros_ec_lpc_mec_init(EC_HOST_CMD_REGION0,
554 EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE);
556 /* Register the driver */
557 ret = platform_driver_register(&cros_ec_lpc_driver);
559 pr_err(DRV_NAME ": can't register driver: %d\n", ret);
560 cros_ec_lpc_mec_destroy();
564 if (!cros_ec_lpc_acpi_device_found) {
565 /* Register the device, and it'll get hooked up automatically */
566 ret = platform_device_register(&cros_ec_lpc_device);
568 pr_err(DRV_NAME ": can't register device: %d\n", ret);
569 platform_driver_unregister(&cros_ec_lpc_driver);
570 cros_ec_lpc_mec_destroy();
577 static void __exit cros_ec_lpc_exit(void)
579 if (!cros_ec_lpc_acpi_device_found)
580 platform_device_unregister(&cros_ec_lpc_device);
581 platform_driver_unregister(&cros_ec_lpc_driver);
582 cros_ec_lpc_mec_destroy();
585 module_init(cros_ec_lpc_init);
586 module_exit(cros_ec_lpc_exit);
588 MODULE_LICENSE("GPL");
589 MODULE_DESCRIPTION("ChromeOS EC LPC driver");