drivers/pinctrl/renesas/pinctrl.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * SuperH Pin Function Controller pinmux support.
   4  *
   5  * Copyright (C) 2012  Paul Mundt
   6  */
   7
   8 #define DRV_NAME "sh-pfc"
   9
  10 #include <linux/device.h>
  11 #include <linux/err.h>
  12 #include <linux/init.h>
  13 #include <linux/io.h>
  14 #include <linux/module.h>
  15 #include <linux/of.h>
  16 #include <linux/pinctrl/consumer.h>
  17 #include <linux/pinctrl/machine.h>
  18 #include <linux/pinctrl/pinconf.h>
  19 #include <linux/pinctrl/pinconf-generic.h>
  20 #include <linux/pinctrl/pinctrl.h>
  21 #include <linux/pinctrl/pinmux.h>
  22 #include <linux/slab.h>
  23 #include <linux/spinlock.h>
  24
  25 #include "core.h"
  26 #include "../core.h"
  27 #include "../pinconf.h"
  28
  29 struct sh_pfc_pin_config {
  30         u16 gpio_enabled:1;
  31         u16 mux_mark:15;
  32 };
  33
  34 struct sh_pfc_pinctrl {
  35         struct pinctrl_dev *pctl;
  36         struct pinctrl_desc pctl_desc;
  37
  38         struct sh_pfc *pfc;
  39
  40         struct pinctrl_pin_desc *pins;
  41         struct sh_pfc_pin_config *configs;
  42
  43         const char *func_prop_name;
  44         const char *groups_prop_name;
  45         const char *pins_prop_name;
  46 };
  47
  48 static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
  49 {
  50         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  51
  52         return pmx->pfc->info->nr_groups;
  53 }
  54
  55 static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
  56                                          unsigned selector)
  57 {
  58         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  59
  60         return pmx->pfc->info->groups[selector].name;
  61 }
  62
  63 static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
  64                                  const unsigned **pins, unsigned *num_pins)
  65 {
  66         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  67
  68         *pins = pmx->pfc->info->groups[selector].pins;
  69         *num_pins = pmx->pfc->info->groups[selector].nr_pins;
  70
  71         return 0;
  72 }
  73
  74 static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  75                                 unsigned offset)
  76 {
  77         seq_puts(s, DRV_NAME);
  78 }
  79
  80 #ifdef CONFIG_OF
  81 static int sh_pfc_map_add_config(struct pinctrl_map *map,
  82                                  const char *group_or_pin,
  83                                  enum pinctrl_map_type type,
  84                                  unsigned long *configs,
  85                                  unsigned int num_configs)
  86 {
  87         unsigned long *cfgs;
  88
  89         cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
  90                        GFP_KERNEL);
  91         if (cfgs == NULL)
  92                 return -ENOMEM;
  93
  94         map->type = type;
  95         map->data.configs.group_or_pin = group_or_pin;
  96         map->data.configs.configs = cfgs;
  97         map->data.configs.num_configs = num_configs;
  98
  99         return 0;
 100 }
 101
 102 static int sh_pfc_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 103                                     struct device_node *np,
 104                                     struct pinctrl_map **map,
 105                                     unsigned int *num_maps, unsigned int *index)
 106 {
 107         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 108         struct device *dev = pmx->pfc->dev;
 109         struct pinctrl_map *maps = *map;
 110         unsigned int nmaps = *num_maps;
 111         unsigned int idx = *index;
 112         unsigned int num_configs;
 113         const char *function = NULL;
 114         unsigned long *configs;
 115         struct property *prop;
 116         unsigned int num_groups;
 117         unsigned int num_pins;
 118         const char *group;
 119         const char *pin;
 120         int ret;
 121
 122         /* Support both the old Renesas-specific properties and the new standard
 123          * properties. Mixing old and new properties isn't allowed, neither
 124          * inside a subnode nor across subnodes.
 125          */
 126         if (!pmx->func_prop_name) {
 127                 if (of_find_property(np, "groups", NULL) ||
 128                     of_find_property(np, "pins", NULL)) {
 129                         pmx->func_prop_name = "function";
 130                         pmx->groups_prop_name = "groups";
 131                         pmx->pins_prop_name = "pins";
 132                 } else {
 133                         pmx->func_prop_name = "renesas,function";
 134                         pmx->groups_prop_name = "renesas,groups";
 135                         pmx->pins_prop_name = "renesas,pins";
 136                 }
 137         }
 138
 139         /* Parse the function and configuration properties. At least a function
 140          * or one configuration must be specified.
 141          */
 142         ret = of_property_read_string(np, pmx->func_prop_name, &function);
 143         if (ret < 0 && ret != -EINVAL) {
 144                 dev_err(dev, "Invalid function in DT\n");
 145                 return ret;
 146         }
 147
 148         ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &num_configs);
 149         if (ret < 0)
 150                 return ret;
 151
 152         if (!function && num_configs == 0) {
 153                 dev_err(dev,
 154                         "DT node must contain at least a function or config\n");
 155                 ret = -ENODEV;
 156                 goto done;
 157         }
 158
 159         /* Count the number of pins and groups and reallocate mappings. */
 160         ret = of_property_count_strings(np, pmx->pins_prop_name);
 161         if (ret == -EINVAL) {
 162                 num_pins = 0;
 163         } else if (ret < 0) {
 164                 dev_err(dev, "Invalid pins list in DT\n");
 165                 goto done;
 166         } else {
 167                 num_pins = ret;
 168         }
 169
 170         ret = of_property_count_strings(np, pmx->groups_prop_name);
 171         if (ret == -EINVAL) {
 172                 num_groups = 0;
 173         } else if (ret < 0) {
 174                 dev_err(dev, "Invalid pin groups list in DT\n");
 175                 goto done;
 176         } else {
 177                 num_groups = ret;
 178         }
 179
 180         if (!num_pins && !num_groups) {
 181                 dev_err(dev, "No pin or group provided in DT node\n");
 182                 ret = -ENODEV;
 183                 goto done;
 184         }
 185
 186         if (function)
 187                 nmaps += num_groups;
 188         if (configs)
 189                 nmaps += num_pins + num_groups;
 190
 191         maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL);
 192         if (maps == NULL) {
 193                 ret = -ENOMEM;
 194                 goto done;
 195         }
 196
 197         *map = maps;
 198         *num_maps = nmaps;
 199
 200         /* Iterate over pins and groups and create the mappings. */
 201         of_property_for_each_string(np, pmx->groups_prop_name, prop, group) {
 202                 if (function) {
 203                         maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
 204                         maps[idx].data.mux.group = group;
 205                         maps[idx].data.mux.function = function;
 206                         idx++;
 207                 }
 208
 209                 if (configs) {
 210                         ret = sh_pfc_map_add_config(&maps[idx], group,
 211                                                     PIN_MAP_TYPE_CONFIGS_GROUP,
 212                                                     configs, num_configs);
 213                         if (ret < 0)
 214                                 goto done;
 215
 216                         idx++;
 217                 }
 218         }
 219
 220         if (!configs) {
 221                 ret = 0;
 222                 goto done;
 223         }
 224
 225         of_property_for_each_string(np, pmx->pins_prop_name, prop, pin) {
 226                 ret = sh_pfc_map_add_config(&maps[idx], pin,
 227                                             PIN_MAP_TYPE_CONFIGS_PIN,
 228                                             configs, num_configs);
 229                 if (ret < 0)
 230                         goto done;
 231
 232                 idx++;
 233         }
 234
 235 done:
 236         *index = idx;
 237         kfree(configs);
 238         return ret;
 239 }
 240
 241 static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev,
 242                                struct pinctrl_map *map, unsigned num_maps)
 243 {
 244         unsigned int i;
 245
 246         if (map == NULL)
 247                 return;
 248
 249         for (i = 0; i < num_maps; ++i) {
 250                 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP ||
 251                     map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
 252                         kfree(map[i].data.configs.configs);
 253         }
 254
 255         kfree(map);
 256 }
 257
 258 static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
 259                                  struct device_node *np,
 260                                  struct pinctrl_map **map, unsigned *num_maps)
 261 {
 262         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 263         struct device *dev = pmx->pfc->dev;
 264         struct device_node *child;
 265         unsigned int index;
 266         int ret;
 267
 268         *map = NULL;
 269         *num_maps = 0;
 270         index = 0;
 271
 272         for_each_child_of_node(np, child) {
 273                 ret = sh_pfc_dt_subnode_to_map(pctldev, child, map, num_maps,
 274                                                &index);
 275                 if (ret < 0) {
 276                         of_node_put(child);
 277                         goto done;
 278                 }
 279         }
 280
 281         /* If no mapping has been found in child nodes try the config node. */
 282         if (*num_maps == 0) {
 283                 ret = sh_pfc_dt_subnode_to_map(pctldev, np, map, num_maps,
 284                                                &index);
 285                 if (ret < 0)
 286                         goto done;
 287         }
 288
 289         if (*num_maps)
 290                 return 0;
 291
 292         dev_err(dev, "no mapping found in node %pOF\n", np);
 293         ret = -EINVAL;
 294
 295 done:
 296         if (ret < 0)
 297                 sh_pfc_dt_free_map(pctldev, *map, *num_maps);
 298
 299         return ret;
 300 }
 301 #endif /* CONFIG_OF */
 302
 303 static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
 304         .get_groups_count       = sh_pfc_get_groups_count,
 305         .get_group_name         = sh_pfc_get_group_name,
 306         .get_group_pins         = sh_pfc_get_group_pins,
 307         .pin_dbg_show           = sh_pfc_pin_dbg_show,
 308 #ifdef CONFIG_OF
 309         .dt_node_to_map         = sh_pfc_dt_node_to_map,
 310         .dt_free_map            = sh_pfc_dt_free_map,
 311 #endif
 312 };
 313
 314 static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
 315 {
 316         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 317
 318         return pmx->pfc->info->nr_functions;
 319 }
 320
 321 static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
 322                                             unsigned selector)
 323 {
 324         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 325
 326         return pmx->pfc->info->functions[selector].name;
 327 }
 328
 329 static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev,
 330                                       unsigned selector,
 331                                       const char * const **groups,
 332                                       unsigned * const num_groups)
 333 {
 334         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 335
 336         *groups = pmx->pfc->info->functions[selector].groups;
 337         *num_groups = pmx->pfc->info->functions[selector].nr_groups;
 338
 339         return 0;
 340 }
 341
 342 static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
 343                                unsigned group)
 344 {
 345         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 346         struct sh_pfc *pfc = pmx->pfc;
 347         const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
 348         unsigned long flags;
 349         unsigned int i;
 350         int ret = 0;
 351
 352         dev_dbg(pctldev->dev, "Configuring pin group %s\n", grp->name);
 353
 354         spin_lock_irqsave(&pfc->lock, flags);
 355
 356         for (i = 0; i < grp->nr_pins; ++i) {
 357                 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
 358                 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 359
 360                 /*
 361                  * This driver cannot manage both gpio and mux when the gpio
 362                  * pin is already enabled. So, this function fails.
 363                  */
 364                 if (cfg->gpio_enabled) {
 365                         ret = -EBUSY;
 366                         goto done;
 367                 }
 368
 369                 ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);
 370                 if (ret < 0)
 371                         goto done;
 372         }
 373
 374         /* All group pins are configured, mark the pins as muxed */
 375         for (i = 0; i < grp->nr_pins; ++i) {
 376                 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
 377                 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 378
 379                 cfg->mux_mark = grp->mux[i];
 380         }
 381
 382 done:
 383         spin_unlock_irqrestore(&pfc->lock, flags);
 384         return ret;
 385 }
 386
 387 static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
 388                                       struct pinctrl_gpio_range *range,
 389                                       unsigned offset)
 390 {
 391         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 392         struct sh_pfc *pfc = pmx->pfc;
 393         int idx = sh_pfc_get_pin_index(pfc, offset);
 394         struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 395         unsigned long flags;
 396         int ret;
 397
 398         spin_lock_irqsave(&pfc->lock, flags);
 399
 400         if (!pfc->gpio) {
 401                 /* If GPIOs are handled externally the pin mux type needs to be
 402                  * set to GPIO here.
 403                  */
 404                 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 405
 406                 ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);
 407                 if (ret < 0)
 408                         goto done;
 409         }
 410
 411         cfg->gpio_enabled = true;
 412
 413         ret = 0;
 414
 415 done:
 416         spin_unlock_irqrestore(&pfc->lock, flags);
 417
 418         return ret;
 419 }
 420
 421 static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
 422                                      struct pinctrl_gpio_range *range,
 423                                      unsigned offset)
 424 {
 425         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 426         struct sh_pfc *pfc = pmx->pfc;
 427         int idx = sh_pfc_get_pin_index(pfc, offset);
 428         struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 429         unsigned long flags;
 430
 431         spin_lock_irqsave(&pfc->lock, flags);
 432         cfg->gpio_enabled = false;
 433         /* If mux is already set, this configures it here */
 434         if (cfg->mux_mark)
 435                 sh_pfc_config_mux(pfc, cfg->mux_mark, PINMUX_TYPE_FUNCTION);
 436         spin_unlock_irqrestore(&pfc->lock, flags);
 437 }
 438
 439 #ifdef CONFIG_PINCTRL_SH_PFC_GPIO
 440 static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
 441                                      struct pinctrl_gpio_range *range,
 442                                      unsigned offset, bool input)
 443 {
 444         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 445         struct sh_pfc *pfc = pmx->pfc;
 446         int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
 447         int idx = sh_pfc_get_pin_index(pfc, offset);
 448         const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 449         unsigned long flags;
 450         unsigned int dir;
 451         int ret;
 452
 453         /* Check if the requested direction is supported by the pin. Not all
 454          * SoCs provide pin config data, so perform the check conditionally.
 455          */
 456         if (pin->configs) {
 457                 dir = input ? SH_PFC_PIN_CFG_INPUT : SH_PFC_PIN_CFG_OUTPUT;
 458                 if (!(pin->configs & dir))
 459                         return -EINVAL;
 460         }
 461
 462         spin_lock_irqsave(&pfc->lock, flags);
 463         ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);
 464         spin_unlock_irqrestore(&pfc->lock, flags);
 465         return ret;
 466 }
 467 #else
 468 #define sh_pfc_gpio_set_direction       NULL
 469 #endif
 470
 471 static const struct pinmux_ops sh_pfc_pinmux_ops = {
 472         .get_functions_count    = sh_pfc_get_functions_count,
 473         .get_function_name      = sh_pfc_get_function_name,
 474         .get_function_groups    = sh_pfc_get_function_groups,
 475         .set_mux                = sh_pfc_func_set_mux,
 476         .gpio_request_enable    = sh_pfc_gpio_request_enable,
 477         .gpio_disable_free      = sh_pfc_gpio_disable_free,
 478         .gpio_set_direction     = sh_pfc_gpio_set_direction,
 479 };
 480
 481 static u32 sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc,
 482                 unsigned int pin, unsigned int *offset, unsigned int *size)
 483 {
 484         const struct pinmux_drive_reg_field *field;
 485         const struct pinmux_drive_reg *reg;
 486         unsigned int i;
 487
 488         for (reg = pfc->info->drive_regs; reg->reg; ++reg) {
 489                 for (i = 0; i < ARRAY_SIZE(reg->fields); ++i) {
 490                         field = &reg->fields[i];
 491
 492                         if (field->size && field->pin == pin) {
 493                                 *offset = field->offset;
 494                                 *size = field->size;
 495
 496                                 return reg->reg;
 497                         }
 498                 }
 499         }
 500
 501         return 0;
 502 }
 503
 504 static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc,
 505                                              unsigned int pin)
 506 {
 507         unsigned long flags;
 508         unsigned int offset;
 509         unsigned int size;
 510         u32 reg;
 511         u32 val;
 512
 513         reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);
 514         if (!reg)
 515                 return -EINVAL;
 516
 517         spin_lock_irqsave(&pfc->lock, flags);
 518         val = sh_pfc_read(pfc, reg);
 519         spin_unlock_irqrestore(&pfc->lock, flags);
 520
 521         val = (val >> offset) & GENMASK(size - 1, 0);
 522
 523         /* Convert the value to mA based on a full drive strength value of 24mA.
 524          * We can make the full value configurable later if needed.
 525          */
 526         return (val + 1) * (size == 2 ? 6 : 3);
 527 }
 528
 529 static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc,
 530                                              unsigned int pin, u16 strength)
 531 {
 532         unsigned long flags;
 533         unsigned int offset;
 534         unsigned int size;
 535         unsigned int step;
 536         u32 reg;
 537         u32 val;
 538
 539         reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);
 540         if (!reg)
 541                 return -EINVAL;
 542
 543         step = size == 2 ? 6 : 3;
 544
 545         if (strength < step || strength > 24)
 546                 return -EINVAL;
 547
 548         /* Convert the value from mA based on a full drive strength value of
 549          * 24mA. We can make the full value configurable later if needed.
 550          */
 551         strength = strength / step - 1;
 552
 553         spin_lock_irqsave(&pfc->lock, flags);
 554
 555         val = sh_pfc_read(pfc, reg);
 556         val &= ~GENMASK(offset + size - 1, offset);
 557         val |= strength << offset;
 558
 559         sh_pfc_write(pfc, reg, val);
 560
 561         spin_unlock_irqrestore(&pfc->lock, flags);
 562
 563         return 0;
 564 }
 565
 566 /* Check whether the requested parameter is supported for a pin. */
 567 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,
 568                                     enum pin_config_param param)
 569 {
 570         int idx = sh_pfc_get_pin_index(pfc, _pin);
 571         const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 572
 573         switch (param) {
 574         case PIN_CONFIG_BIAS_DISABLE:
 575                 return pin->configs & SH_PFC_PIN_CFG_PULL_UP_DOWN;
 576
 577         case PIN_CONFIG_BIAS_PULL_UP:
 578                 return pin->configs & SH_PFC_PIN_CFG_PULL_UP;
 579
 580         case PIN_CONFIG_BIAS_PULL_DOWN:
 581                 return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN;
 582
 583         case PIN_CONFIG_DRIVE_STRENGTH:
 584                 return pin->configs & SH_PFC_PIN_CFG_DRIVE_STRENGTH;
 585
 586         case PIN_CONFIG_POWER_SOURCE:
 587                 return pin->configs & SH_PFC_PIN_CFG_IO_VOLTAGE;
 588
 589         default:
 590                 return false;
 591         }
 592 }
 593
 594 static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
 595                               unsigned long *config)
 596 {
 597         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 598         struct sh_pfc *pfc = pmx->pfc;
 599         enum pin_config_param param = pinconf_to_config_param(*config);
 600         unsigned long flags;
 601         unsigned int arg;
 602
 603         if (!sh_pfc_pinconf_validate(pfc, _pin, param))
 604                 return -ENOTSUPP;
 605
 606         switch (param) {
 607         case PIN_CONFIG_BIAS_DISABLE:
 608         case PIN_CONFIG_BIAS_PULL_UP:
 609         case PIN_CONFIG_BIAS_PULL_DOWN: {
 610                 unsigned int bias;
 611
 612                 if (!pfc->info->ops || !pfc->info->ops->get_bias)
 613                         return -ENOTSUPP;
 614
 615                 spin_lock_irqsave(&pfc->lock, flags);
 616                 bias = pfc->info->ops->get_bias(pfc, _pin);
 617                 spin_unlock_irqrestore(&pfc->lock, flags);
 618
 619                 if (bias != param)
 620                         return -EINVAL;
 621
 622                 arg = 0;
 623                 break;
 624         }
 625
 626         case PIN_CONFIG_DRIVE_STRENGTH: {
 627                 int ret;
 628
 629                 ret = sh_pfc_pinconf_get_drive_strength(pfc, _pin);
 630                 if (ret < 0)
 631                         return ret;
 632
 633                 arg = ret;
 634                 break;
 635         }
 636
 637         case PIN_CONFIG_POWER_SOURCE: {
 638                 int idx = sh_pfc_get_pin_index(pfc, _pin);
 639                 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 640                 unsigned int lower_voltage;
 641                 u32 pocctrl, val;
 642                 int bit;
 643
 644                 if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
 645                         return -ENOTSUPP;
 646
 647                 bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
 648                 if (WARN(bit < 0, "invalid pin %#x", _pin))
 649                         return bit;
 650
 651                 spin_lock_irqsave(&pfc->lock, flags);
 652                 val = sh_pfc_read(pfc, pocctrl);
 653                 spin_unlock_irqrestore(&pfc->lock, flags);
 654
 655                 lower_voltage = (pin->configs & SH_PFC_PIN_VOLTAGE_25_33) ?
 656                         2500 : 1800;
 657
 658                 arg = (val & BIT(bit)) ? 3300 : lower_voltage;
 659                 break;
 660         }
 661
 662         default:
 663                 return -ENOTSUPP;
 664         }
 665
 666         *config = pinconf_to_config_packed(param, arg);
 667         return 0;
 668 }
 669
 670 static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
 671                               unsigned long *configs, unsigned num_configs)
 672 {
 673         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 674         struct sh_pfc *pfc = pmx->pfc;
 675         enum pin_config_param param;
 676         unsigned long flags;
 677         unsigned int i;
 678
 679         for (i = 0; i < num_configs; i++) {
 680                 param = pinconf_to_config_param(configs[i]);
 681
 682                 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
 683                         return -ENOTSUPP;
 684
 685                 switch (param) {
 686                 case PIN_CONFIG_BIAS_PULL_UP:
 687                 case PIN_CONFIG_BIAS_PULL_DOWN:
 688                 case PIN_CONFIG_BIAS_DISABLE:
 689                         if (!pfc->info->ops || !pfc->info->ops->set_bias)
 690                                 return -ENOTSUPP;
 691
 692                         spin_lock_irqsave(&pfc->lock, flags);
 693                         pfc->info->ops->set_bias(pfc, _pin, param);
 694                         spin_unlock_irqrestore(&pfc->lock, flags);
 695
 696                         break;
 697
 698                 case PIN_CONFIG_DRIVE_STRENGTH: {
 699                         unsigned int arg =
 700                                 pinconf_to_config_argument(configs[i]);
 701                         int ret;
 702
 703                         ret = sh_pfc_pinconf_set_drive_strength(pfc, _pin, arg);
 704                         if (ret < 0)
 705                                 return ret;
 706
 707                         break;
 708                 }
 709
 710                 case PIN_CONFIG_POWER_SOURCE: {
 711                         unsigned int mV = pinconf_to_config_argument(configs[i]);
 712                         int idx = sh_pfc_get_pin_index(pfc, _pin);
 713                         const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 714                         unsigned int lower_voltage;
 715                         u32 pocctrl, val;
 716                         int bit;
 717
 718                         if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
 719                                 return -ENOTSUPP;
 720
 721                         bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
 722                         if (WARN(bit < 0, "invalid pin %#x", _pin))
 723                                 return bit;
 724
 725                         lower_voltage = (pin->configs & SH_PFC_PIN_VOLTAGE_25_33) ?
 726                                 2500 : 1800;
 727
 728                         if (mV != lower_voltage && mV != 3300)
 729                                 return -EINVAL;
 730
 731                         spin_lock_irqsave(&pfc->lock, flags);
 732                         val = sh_pfc_read(pfc, pocctrl);
 733                         if (mV == 3300)
 734                                 val |= BIT(bit);
 735                         else
 736                                 val &= ~BIT(bit);
 737                         sh_pfc_write(pfc, pocctrl, val);
 738                         spin_unlock_irqrestore(&pfc->lock, flags);
 739
 740                         break;
 741                 }
 742
 743                 default:
 744                         return -ENOTSUPP;
 745                 }
 746         } /* for each config */
 747
 748         return 0;
 749 }
 750
 751 static int sh_pfc_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
 752                                     unsigned long *configs,
 753                                     unsigned num_configs)
 754 {
 755         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 756         const unsigned int *pins;
 757         unsigned int num_pins;
 758         unsigned int i, ret;
 759
 760         pins = pmx->pfc->info->groups[group].pins;
 761         num_pins = pmx->pfc->info->groups[group].nr_pins;
 762
 763         for (i = 0; i < num_pins; ++i) {
 764                 ret = sh_pfc_pinconf_set(pctldev, pins[i], configs, num_configs);
 765                 if (ret)
 766                         return ret;
 767         }
 768
 769         return 0;
 770 }
 771
 772 static const struct pinconf_ops sh_pfc_pinconf_ops = {
 773         .is_generic                     = true,
 774         .pin_config_get                 = sh_pfc_pinconf_get,
 775         .pin_config_set                 = sh_pfc_pinconf_set,
 776         .pin_config_group_set           = sh_pfc_pinconf_group_set,
 777         .pin_config_config_dbg_show     = pinconf_generic_dump_config,
 778 };
 779
 780 /* PFC ranges -> pinctrl pin descs */
 781 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
 782 {
 783         unsigned int i;
 784
 785         /* Allocate and initialize the pins and configs arrays. */
 786         pmx->pins = devm_kcalloc(pfc->dev,
 787                                  pfc->info->nr_pins, sizeof(*pmx->pins),
 788                                  GFP_KERNEL);
 789         if (unlikely(!pmx->pins))
 790                 return -ENOMEM;
 791
 792         pmx->configs = devm_kcalloc(pfc->dev,
 793                                     pfc->info->nr_pins, sizeof(*pmx->configs),
 794                                     GFP_KERNEL);
 795         if (unlikely(!pmx->configs))
 796                 return -ENOMEM;
 797
 798         for (i = 0; i < pfc->info->nr_pins; ++i) {
 799                 const struct sh_pfc_pin *info = &pfc->info->pins[i];
 800                 struct pinctrl_pin_desc *pin = &pmx->pins[i];
 801
 802                 /* If the pin number is equal to -1 all pins are considered */
 803                 pin->number = info->pin != (u16)-1 ? info->pin : i;
 804                 pin->name = info->name;
 805         }
 806
 807         return 0;
 808 }
 809
 810 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
 811 {
 812         struct sh_pfc_pinctrl *pmx;
 813         int ret;
 814
 815         pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
 816         if (unlikely(!pmx))
 817                 return -ENOMEM;
 818
 819         pmx->pfc = pfc;
 820
 821         ret = sh_pfc_map_pins(pfc, pmx);
 822         if (ret < 0)
 823                 return ret;
 824
 825         pmx->pctl_desc.name = DRV_NAME;
 826         pmx->pctl_desc.owner = THIS_MODULE;
 827         pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
 828         pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
 829         pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
 830         pmx->pctl_desc.pins = pmx->pins;
 831         pmx->pctl_desc.npins = pfc->info->nr_pins;
 832
 833         ret = devm_pinctrl_register_and_init(pfc->dev, &pmx->pctl_desc, pmx,
 834                                              &pmx->pctl);
 835         if (ret) {
 836                 dev_err(pfc->dev, "could not register: %i\n", ret);
 837
 838                 return ret;
 839         }
 840
 841         return pinctrl_enable(pmx->pctl);
 842 }
 843
 844 static const struct pinmux_bias_reg *
 845 rcar_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
 846                      unsigned int *bit)
 847 {
 848         unsigned int i, j;
 849
 850         for (i = 0; pfc->info->bias_regs[i].puen || pfc->info->bias_regs[i].pud; i++) {
 851                 for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) {
 852                         if (pfc->info->bias_regs[i].pins[j] == pin) {
 853                                 *bit = j;
 854                                 return &pfc->info->bias_regs[i];
 855                         }
 856                 }
 857         }
 858
 859         WARN_ONCE(1, "Pin %u is not in bias info list\n", pin);
 860
 861         return NULL;
 862 }
 863
 864 unsigned int rcar_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
 865 {
 866         const struct pinmux_bias_reg *reg;
 867         unsigned int bit;
 868
 869         reg = rcar_pin_to_bias_reg(pfc, pin, &bit);
 870         if (!reg)
 871                 return PIN_CONFIG_BIAS_DISABLE;
 872
 873         if (reg->puen) {
 874                 if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit)))
 875                         return PIN_CONFIG_BIAS_DISABLE;
 876                 else if (!reg->pud || (sh_pfc_read(pfc, reg->pud) & BIT(bit)))
 877                         return PIN_CONFIG_BIAS_PULL_UP;
 878                 else
 879                         return PIN_CONFIG_BIAS_PULL_DOWN;
 880         } else {
 881                 if (sh_pfc_read(pfc, reg->pud) & BIT(bit))
 882                         return PIN_CONFIG_BIAS_PULL_DOWN;
 883                 else
 884                         return PIN_CONFIG_BIAS_DISABLE;
 885         }
 886 }
 887
 888 void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
 889                           unsigned int bias)
 890 {
 891         const struct pinmux_bias_reg *reg;
 892         u32 enable, updown;
 893         unsigned int bit;
 894
 895         reg = rcar_pin_to_bias_reg(pfc, pin, &bit);
 896         if (!reg)
 897                 return;
 898
 899         if (reg->puen) {
 900                 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit);
 901                 if (bias != PIN_CONFIG_BIAS_DISABLE)
 902                         enable |= BIT(bit);
 903
 904                 if (reg->pud) {
 905                         updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit);
 906                         if (bias == PIN_CONFIG_BIAS_PULL_UP)
 907                                 updown |= BIT(bit);
 908
 909                         sh_pfc_write(pfc, reg->pud, updown);
 910                 }
 911
 912                 sh_pfc_write(pfc, reg->puen, enable);
 913         } else {
 914                 enable = sh_pfc_read(pfc, reg->pud) & ~BIT(bit);
 915                 if (bias == PIN_CONFIG_BIAS_PULL_DOWN)
 916                         enable |= BIT(bit);
 917
 918                 sh_pfc_write(pfc, reg->pud, enable);
 919         }
 920 }
 921
 922 #define PORTnCR_PULMD_OFF       (0 << 6)
 923 #define PORTnCR_PULMD_DOWN      (2 << 6)
 924 #define PORTnCR_PULMD_UP        (3 << 6)
 925 #define PORTnCR_PULMD_MASK      (3 << 6)
 926
 927 unsigned int rmobile_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
 928 {
 929         void __iomem *reg = pfc->info->ops->pin_to_portcr(pfc, pin);
 930         u32 value = ioread8(reg) & PORTnCR_PULMD_MASK;
 931
 932         switch (value) {
 933         case PORTnCR_PULMD_UP:
 934                 return PIN_CONFIG_BIAS_PULL_UP;
 935         case PORTnCR_PULMD_DOWN:
 936                 return PIN_CONFIG_BIAS_PULL_DOWN;
 937         case PORTnCR_PULMD_OFF:
 938         default:
 939                 return PIN_CONFIG_BIAS_DISABLE;
 940         }
 941 }
 942
 943 void rmobile_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
 944                              unsigned int bias)
 945 {
 946         void __iomem *reg = pfc->info->ops->pin_to_portcr(pfc, pin);
 947         u32 value = ioread8(reg) & ~PORTnCR_PULMD_MASK;
 948
 949         switch (bias) {
 950         case PIN_CONFIG_BIAS_PULL_UP:
 951                 value |= PORTnCR_PULMD_UP;
 952                 break;
 953         case PIN_CONFIG_BIAS_PULL_DOWN:
 954                 value |= PORTnCR_PULMD_DOWN;
 955                 break;
 956         }
 957
 958         iowrite8(value, reg);
 959 }