drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2015, Sony Mobile Communications AB.
   4  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/pinctrl/pinctrl.h>
  10 #include <linux/pinctrl/pinmux.h>
  11 #include <linux/pinctrl/pinconf.h>
  12 #include <linux/pinctrl/pinconf-generic.h>
  13 #include <linux/slab.h>
  14 #include <linux/regmap.h>
  15 #include <linux/gpio/driver.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/of_device.h>
  18 #include <linux/of_irq.h>
  19
  20 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
  21
  22 #include "../core.h"
  23 #include "../pinctrl-utils.h"
  24
  25 /* MPP registers */
  26 #define SSBI_REG_ADDR_MPP_BASE          0x50
  27 #define SSBI_REG_ADDR_MPP(n)            (SSBI_REG_ADDR_MPP_BASE + n)
  28
  29 /* MPP Type: type */
  30 #define PM8XXX_MPP_TYPE_D_INPUT         0
  31 #define PM8XXX_MPP_TYPE_D_OUTPUT        1
  32 #define PM8XXX_MPP_TYPE_D_BI_DIR        2
  33 #define PM8XXX_MPP_TYPE_A_INPUT         3
  34 #define PM8XXX_MPP_TYPE_A_OUTPUT        4
  35 #define PM8XXX_MPP_TYPE_SINK            5
  36 #define PM8XXX_MPP_TYPE_DTEST_SINK      6
  37 #define PM8XXX_MPP_TYPE_DTEST_OUTPUT    7
  38
  39 /* Digital Input: control */
  40 #define PM8XXX_MPP_DIN_TO_INT           0
  41 #define PM8XXX_MPP_DIN_TO_DBUS1         1
  42 #define PM8XXX_MPP_DIN_TO_DBUS2         2
  43 #define PM8XXX_MPP_DIN_TO_DBUS3         3
  44
  45 /* Digital Output: control */
  46 #define PM8XXX_MPP_DOUT_CTRL_LOW        0
  47 #define PM8XXX_MPP_DOUT_CTRL_HIGH       1
  48 #define PM8XXX_MPP_DOUT_CTRL_MPP        2
  49 #define PM8XXX_MPP_DOUT_CTRL_INV_MPP    3
  50
  51 /* Bidirectional: control */
  52 #define PM8XXX_MPP_BI_PULLUP_1KOHM      0
  53 #define PM8XXX_MPP_BI_PULLUP_OPEN       1
  54 #define PM8XXX_MPP_BI_PULLUP_10KOHM     2
  55 #define PM8XXX_MPP_BI_PULLUP_30KOHM     3
  56
  57 /* Analog Output: control */
  58 #define PM8XXX_MPP_AOUT_CTRL_DISABLE            0
  59 #define PM8XXX_MPP_AOUT_CTRL_ENABLE             1
  60 #define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN        2
  61 #define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN         3
  62
  63 /* Current Sink: control */
  64 #define PM8XXX_MPP_CS_CTRL_DISABLE      0
  65 #define PM8XXX_MPP_CS_CTRL_ENABLE       1
  66 #define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN  2
  67 #define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN   3
  68
  69 /* DTEST Current Sink: control */
  70 #define PM8XXX_MPP_DTEST_CS_CTRL_EN1    0
  71 #define PM8XXX_MPP_DTEST_CS_CTRL_EN2    1
  72 #define PM8XXX_MPP_DTEST_CS_CTRL_EN3    2
  73 #define PM8XXX_MPP_DTEST_CS_CTRL_EN4    3
  74
  75 /* DTEST Digital Output: control */
  76 #define PM8XXX_MPP_DTEST_DBUS1          0
  77 #define PM8XXX_MPP_DTEST_DBUS2          1
  78 #define PM8XXX_MPP_DTEST_DBUS3          2
  79 #define PM8XXX_MPP_DTEST_DBUS4          3
  80
  81 /* custom pinconf parameters */
  82 #define PM8XXX_CONFIG_AMUX              (PIN_CONFIG_END + 1)
  83 #define PM8XXX_CONFIG_DTEST_SELECTOR    (PIN_CONFIG_END + 2)
  84 #define PM8XXX_CONFIG_ALEVEL            (PIN_CONFIG_END + 3)
  85 #define PM8XXX_CONFIG_PAIRED            (PIN_CONFIG_END + 4)
  86
  87 /**
  88  * struct pm8xxx_pin_data - dynamic configuration for a pin
  89  * @reg:                address of the control register
  90  * @mode:               operating mode for the pin (digital, analog or current sink)
  91  * @input:              pin is input
  92  * @output:             pin is output
  93  * @high_z:             pin is floating
  94  * @paired:             mpp operates in paired mode
  95  * @output_value:       logical output value of the mpp
  96  * @power_source:       selected power source
  97  * @dtest:              DTEST route selector
  98  * @amux:               input muxing in analog mode
  99  * @aout_level:         selector of the output in analog mode
 100  * @drive_strength:     drive strength of the current sink
 101  * @pullup:             pull up value, when in digital bidirectional mode
 102  */
 103 struct pm8xxx_pin_data {
 104         unsigned reg;
 105
 106         u8 mode;
 107
 108         bool input;
 109         bool output;
 110         bool high_z;
 111         bool paired;
 112         bool output_value;
 113
 114         u8 power_source;
 115         u8 dtest;
 116         u8 amux;
 117         u8 aout_level;
 118         u8 drive_strength;
 119         unsigned pullup;
 120 };
 121
 122 struct pm8xxx_mpp {
 123         struct device *dev;
 124         struct regmap *regmap;
 125         struct pinctrl_dev *pctrl;
 126         struct gpio_chip chip;
 127         struct irq_chip irq;
 128
 129         struct pinctrl_desc desc;
 130         unsigned npins;
 131 };
 132
 133 static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = {
 134         {"qcom,amux-route",     PM8XXX_CONFIG_AMUX,             0},
 135         {"qcom,analog-level",   PM8XXX_CONFIG_ALEVEL,           0},
 136         {"qcom,dtest",          PM8XXX_CONFIG_DTEST_SELECTOR,   0},
 137         {"qcom,paired",         PM8XXX_CONFIG_PAIRED,           0},
 138 };
 139
 140 #ifdef CONFIG_DEBUG_FS
 141 static const struct pin_config_item pm8xxx_conf_items[] = {
 142         PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true),
 143         PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true),
 144         PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true),
 145         PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false),
 146 };
 147 #endif
 148
 149 #define PM8XXX_MAX_MPPS 12
 150 #define PM8XXX_MPP_PHYSICAL_OFFSET    1
 151
 152 static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = {
 153         "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
 154         "mpp9", "mpp10", "mpp11", "mpp12",
 155 };
 156
 157 #define PM8XXX_MPP_DIGITAL      0
 158 #define PM8XXX_MPP_ANALOG       1
 159 #define PM8XXX_MPP_SINK         2
 160
 161 static const char * const pm8xxx_mpp_functions[] = {
 162         "digital", "analog", "sink",
 163 };
 164
 165 static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,
 166                              struct pm8xxx_pin_data *pin)
 167 {
 168         unsigned level;
 169         unsigned ctrl;
 170         unsigned type;
 171         int ret;
 172         u8 val;
 173
 174         switch (pin->mode) {
 175         case PM8XXX_MPP_DIGITAL:
 176                 if (pin->dtest) {
 177                         type = PM8XXX_MPP_TYPE_DTEST_OUTPUT;
 178                         ctrl = pin->dtest - 1;
 179                 } else if (pin->input && pin->output) {
 180                         type = PM8XXX_MPP_TYPE_D_BI_DIR;
 181                         if (pin->high_z)
 182                                 ctrl = PM8XXX_MPP_BI_PULLUP_OPEN;
 183                         else if (pin->pullup == 600)
 184                                 ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM;
 185                         else if (pin->pullup == 10000)
 186                                 ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM;
 187                         else
 188                                 ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM;
 189                 } else if (pin->input) {
 190                         type = PM8XXX_MPP_TYPE_D_INPUT;
 191                         if (pin->dtest)
 192                                 ctrl = pin->dtest;
 193                         else
 194                                 ctrl = PM8XXX_MPP_DIN_TO_INT;
 195                 } else {
 196                         type = PM8XXX_MPP_TYPE_D_OUTPUT;
 197                         ctrl = !!pin->output_value;
 198                         if (pin->paired)
 199                                 ctrl |= BIT(1);
 200                 }
 201
 202                 level = pin->power_source;
 203                 break;
 204         case PM8XXX_MPP_ANALOG:
 205                 if (pin->output) {
 206                         type = PM8XXX_MPP_TYPE_A_OUTPUT;
 207                         level = pin->aout_level;
 208                         ctrl = pin->output_value;
 209                         if (pin->paired)
 210                                 ctrl |= BIT(1);
 211                 } else {
 212                         type = PM8XXX_MPP_TYPE_A_INPUT;
 213                         level = pin->amux;
 214                         ctrl = 0;
 215                 }
 216                 break;
 217         case PM8XXX_MPP_SINK:
 218                 level = (pin->drive_strength / 5) - 1;
 219                 if (pin->dtest) {
 220                         type = PM8XXX_MPP_TYPE_DTEST_SINK;
 221                         ctrl = pin->dtest - 1;
 222                 } else {
 223                         type = PM8XXX_MPP_TYPE_SINK;
 224                         ctrl = pin->output_value;
 225                         if (pin->paired)
 226                                 ctrl |= BIT(1);
 227                 }
 228                 break;
 229         default:
 230                 return -EINVAL;
 231         }
 232
 233         val = type << 5 | level << 2 | ctrl;
 234         ret = regmap_write(pctrl->regmap, pin->reg, val);
 235         if (ret)
 236                 dev_err(pctrl->dev, "failed to write register\n");
 237
 238         return ret;
 239 }
 240
 241 static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
 242 {
 243         struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
 244
 245         return pctrl->npins;
 246 }
 247
 248 static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
 249                                          unsigned group)
 250 {
 251         return pm8xxx_groups[group];
 252 }
 253
 254
 255 static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
 256                                  unsigned group,
 257                                  const unsigned **pins,
 258                                  unsigned *num_pins)
 259 {
 260         struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
 261
 262         *pins = &pctrl->desc.pins[group].number;
 263         *num_pins = 1;
 264
 265         return 0;
 266 }
 267
 268 static const struct pinctrl_ops pm8xxx_pinctrl_ops = {
 269         .get_groups_count       = pm8xxx_get_groups_count,
 270         .get_group_name         = pm8xxx_get_group_name,
 271         .get_group_pins         = pm8xxx_get_group_pins,
 272         .dt_node_to_map         = pinconf_generic_dt_node_to_map_group,
 273         .dt_free_map            = pinctrl_utils_free_map,
 274 };
 275
 276 static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
 277 {
 278         return ARRAY_SIZE(pm8xxx_mpp_functions);
 279 }
 280
 281 static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
 282                                             unsigned function)
 283 {
 284         return pm8xxx_mpp_functions[function];
 285 }
 286
 287 static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
 288                                       unsigned function,
 289                                       const char * const **groups,
 290                                       unsigned * const num_groups)
 291 {
 292         struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
 293
 294         *groups = pm8xxx_groups;
 295         *num_groups = pctrl->npins;
 296         return 0;
 297 }
 298
 299 static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
 300                                  unsigned function,
 301                                  unsigned group)
 302 {
 303         struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
 304         struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;
 305
 306         pin->mode = function;
 307         pm8xxx_mpp_update(pctrl, pin);
 308
 309         return 0;
 310 }
 311
 312 static const struct pinmux_ops pm8xxx_pinmux_ops = {
 313         .get_functions_count    = pm8xxx_get_functions_count,
 314         .get_function_name      = pm8xxx_get_function_name,
 315         .get_function_groups    = pm8xxx_get_function_groups,
 316         .set_mux                = pm8xxx_pinmux_set_mux,
 317 };
 318
 319 static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
 320                                  unsigned int offset,
 321                                  unsigned long *config)
 322 {
 323         struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
 324         struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
 325         unsigned param = pinconf_to_config_param(*config);
 326         unsigned arg;
 327
 328         switch (param) {
 329         case PIN_CONFIG_BIAS_PULL_UP:
 330                 arg = pin->pullup;
 331                 break;
 332         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 333                 arg = pin->high_z;
 334                 break;
 335         case PIN_CONFIG_INPUT_ENABLE:
 336                 arg = pin->input;
 337                 break;
 338         case PIN_CONFIG_OUTPUT:
 339                 arg = pin->output_value;
 340                 break;
 341         case PIN_CONFIG_POWER_SOURCE:
 342                 arg = pin->power_source;
 343                 break;
 344         case PIN_CONFIG_DRIVE_STRENGTH:
 345                 arg = pin->drive_strength;
 346                 break;
 347         case PM8XXX_CONFIG_DTEST_SELECTOR:
 348                 arg = pin->dtest;
 349                 break;
 350         case PM8XXX_CONFIG_AMUX:
 351                 arg = pin->amux;
 352                 break;
 353         case PM8XXX_CONFIG_ALEVEL:
 354                 arg = pin->aout_level;
 355                 break;
 356         case PM8XXX_CONFIG_PAIRED:
 357                 arg = pin->paired;
 358                 break;
 359         default:
 360                 return -EINVAL;
 361         }
 362
 363         *config = pinconf_to_config_packed(param, arg);
 364
 365         return 0;
 366 }
 367
 368 static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
 369                                  unsigned int offset,
 370                                  unsigned long *configs,
 371                                  unsigned num_configs)
 372 {
 373         struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
 374         struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
 375         unsigned param;
 376         unsigned arg;
 377         unsigned i;
 378
 379         for (i = 0; i < num_configs; i++) {
 380                 param = pinconf_to_config_param(configs[i]);
 381                 arg = pinconf_to_config_argument(configs[i]);
 382
 383                 switch (param) {
 384                 case PIN_CONFIG_BIAS_PULL_UP:
 385                         pin->pullup = arg;
 386                         break;
 387                 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 388                         pin->high_z = true;
 389                         break;
 390                 case PIN_CONFIG_INPUT_ENABLE:
 391                         pin->input = true;
 392                         break;
 393                 case PIN_CONFIG_OUTPUT:
 394                         pin->output = true;
 395                         pin->output_value = !!arg;
 396                         break;
 397                 case PIN_CONFIG_POWER_SOURCE:
 398                         pin->power_source = arg;
 399                         break;
 400                 case PIN_CONFIG_DRIVE_STRENGTH:
 401                         pin->drive_strength = arg;
 402                         break;
 403                 case PM8XXX_CONFIG_DTEST_SELECTOR:
 404                         pin->dtest = arg;
 405                         break;
 406                 case PM8XXX_CONFIG_AMUX:
 407                         pin->amux = arg;
 408                         break;
 409                 case PM8XXX_CONFIG_ALEVEL:
 410                         pin->aout_level = arg;
 411                         break;
 412                 case PM8XXX_CONFIG_PAIRED:
 413                         pin->paired = !!arg;
 414                         break;
 415                 default:
 416                         dev_err(pctrl->dev,
 417                                 "unsupported config parameter: %x\n",
 418                                 param);
 419                         return -EINVAL;
 420                 }
 421         }
 422
 423         pm8xxx_mpp_update(pctrl, pin);
 424
 425         return 0;
 426 }
 427
 428 static const struct pinconf_ops pm8xxx_pinconf_ops = {
 429         .is_generic = true,
 430         .pin_config_group_get = pm8xxx_pin_config_get,
 431         .pin_config_group_set = pm8xxx_pin_config_set,
 432 };
 433
 434 static const struct pinctrl_desc pm8xxx_pinctrl_desc = {
 435         .name = "pm8xxx_mpp",
 436         .pctlops = &pm8xxx_pinctrl_ops,
 437         .pmxops = &pm8xxx_pinmux_ops,
 438         .confops = &pm8xxx_pinconf_ops,
 439         .owner = THIS_MODULE,
 440 };
 441
 442 static int pm8xxx_mpp_direction_input(struct gpio_chip *chip,
 443                                        unsigned offset)
 444 {
 445         struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
 446         struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
 447
 448         switch (pin->mode) {
 449         case PM8XXX_MPP_DIGITAL:
 450                 pin->input = true;
 451                 break;
 452         case PM8XXX_MPP_ANALOG:
 453                 pin->input = true;
 454                 pin->output = true;
 455                 break;
 456         case PM8XXX_MPP_SINK:
 457                 return -EINVAL;
 458         }
 459
 460         pm8xxx_mpp_update(pctrl, pin);
 461
 462         return 0;
 463 }
 464
 465 static int pm8xxx_mpp_direction_output(struct gpio_chip *chip,
 466                                         unsigned offset,
 467                                         int value)
 468 {
 469         struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
 470         struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
 471
 472         switch (pin->mode) {
 473         case PM8XXX_MPP_DIGITAL:
 474                 pin->output = true;
 475                 break;
 476         case PM8XXX_MPP_ANALOG:
 477                 pin->input = false;
 478                 pin->output = true;
 479                 break;
 480         case PM8XXX_MPP_SINK:
 481                 pin->input = false;
 482                 pin->output = true;
 483                 break;
 484         }
 485
 486         pm8xxx_mpp_update(pctrl, pin);
 487
 488         return 0;
 489 }
 490
 491 static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
 492 {
 493         struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
 494         struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
 495         bool state;
 496         int ret, irq;
 497
 498         if (!pin->input)
 499                 return !!pin->output_value;
 500
 501         irq = chip->to_irq(chip, offset);
 502         if (irq < 0)
 503                 return irq;
 504
 505         ret = irq_get_irqchip_state(irq, IRQCHIP_STATE_LINE_LEVEL, &state);
 506         if (!ret)
 507                 ret = !!state;
 508
 509         return ret;
 510 }
 511
 512 static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value)
 513 {
 514         struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
 515         struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
 516
 517         pin->output_value = !!value;
 518
 519         pm8xxx_mpp_update(pctrl, pin);
 520 }
 521
 522 static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip,
 523                                 const struct of_phandle_args *gpio_desc,
 524                                 u32 *flags)
 525 {
 526         if (chip->of_gpio_n_cells < 2)
 527                 return -EINVAL;
 528
 529         if (flags)
 530                 *flags = gpio_desc->args[1];
 531
 532         return gpio_desc->args[0] - PM8XXX_MPP_PHYSICAL_OFFSET;
 533 }
 534
 535
 536 #ifdef CONFIG_DEBUG_FS
 537 #include <linux/seq_file.h>
 538
 539 static void pm8xxx_mpp_dbg_show_one(struct seq_file *s,
 540                                   struct pinctrl_dev *pctldev,
 541                                   struct gpio_chip *chip,
 542                                   unsigned offset,
 543                                   unsigned gpio)
 544 {
 545         struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
 546         struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
 547
 548         static const char * const aout_lvls[] = {
 549                 "1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2",
 550                 "abus3"
 551         };
 552
 553         static const char * const amuxs[] = {
 554                 "amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2",
 555                 "abus3",
 556         };
 557
 558         seq_printf(s, " mpp%-2d:", offset + PM8XXX_MPP_PHYSICAL_OFFSET);
 559
 560         switch (pin->mode) {
 561         case PM8XXX_MPP_DIGITAL:
 562                 seq_puts(s, " digital ");
 563                 if (pin->dtest) {
 564                         seq_printf(s, "dtest%d\n", pin->dtest);
 565                 } else if (pin->input && pin->output) {
 566                         if (pin->high_z)
 567                                 seq_puts(s, "bi-dir high-z");
 568                         else
 569                                 seq_printf(s, "bi-dir %dOhm", pin->pullup);
 570                 } else if (pin->input) {
 571                         if (pin->dtest)
 572                                 seq_printf(s, "in dtest%d", pin->dtest);
 573                         else
 574                                 seq_puts(s, "in gpio");
 575                 } else if (pin->output) {
 576                         seq_puts(s, "out ");
 577
 578                         if (!pin->paired) {
 579                                 seq_puts(s, pin->output_value ?
 580                                          "high" : "low");
 581                         } else {
 582                                 seq_puts(s, pin->output_value ?
 583                                          "inverted" : "follow");
 584                         }
 585                 }
 586                 break;
 587         case PM8XXX_MPP_ANALOG:
 588                 seq_puts(s, " analog ");
 589                 if (pin->output) {
 590                         seq_printf(s, "out %s ", aout_lvls[pin->aout_level]);
 591                         if (!pin->paired) {
 592                                 seq_puts(s, pin->output_value ?
 593                                          "high" : "low");
 594                         } else {
 595                                 seq_puts(s, pin->output_value ?
 596                                          "inverted" : "follow");
 597                         }
 598                 } else {
 599                         seq_printf(s, "input mux %s", amuxs[pin->amux]);
 600                 }
 601                 break;
 602         case PM8XXX_MPP_SINK:
 603                 seq_printf(s, " sink %dmA ", pin->drive_strength);
 604                 if (pin->dtest) {
 605                         seq_printf(s, "dtest%d", pin->dtest);
 606                 } else {
 607                         if (!pin->paired) {
 608                                 seq_puts(s, pin->output_value ?
 609                                          "high" : "low");
 610                         } else {
 611                                 seq_puts(s, pin->output_value ?
 612                                          "inverted" : "follow");
 613                         }
 614                 }
 615                 break;
 616         }
 617 }
 618
 619 static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 620 {
 621         unsigned gpio = chip->base;
 622         unsigned i;
 623
 624         for (i = 0; i < chip->ngpio; i++, gpio++) {
 625                 pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio);
 626                 seq_puts(s, "\n");
 627         }
 628 }
 629
 630 #else
 631 #define pm8xxx_mpp_dbg_show NULL
 632 #endif
 633
 634 static const struct gpio_chip pm8xxx_mpp_template = {
 635         .direction_input = pm8xxx_mpp_direction_input,
 636         .direction_output = pm8xxx_mpp_direction_output,
 637         .get = pm8xxx_mpp_get,
 638         .set = pm8xxx_mpp_set,
 639         .of_xlate = pm8xxx_mpp_of_xlate,
 640         .dbg_show = pm8xxx_mpp_dbg_show,
 641         .owner = THIS_MODULE,
 642 };
 643
 644 static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,
 645                                struct pm8xxx_pin_data *pin)
 646 {
 647         unsigned int val;
 648         unsigned level;
 649         unsigned ctrl;
 650         unsigned type;
 651         int ret;
 652
 653         ret = regmap_read(pctrl->regmap, pin->reg, &val);
 654         if (ret) {
 655                 dev_err(pctrl->dev, "failed to read register\n");
 656                 return ret;
 657         }
 658
 659         type = (val >> 5) & 7;
 660         level = (val >> 2) & 7;
 661         ctrl = (val) & 3;
 662
 663         switch (type) {
 664         case PM8XXX_MPP_TYPE_D_INPUT:
 665                 pin->mode = PM8XXX_MPP_DIGITAL;
 666                 pin->input = true;
 667                 pin->power_source = level;
 668                 pin->dtest = ctrl;
 669                 break;
 670         case PM8XXX_MPP_TYPE_D_OUTPUT:
 671                 pin->mode = PM8XXX_MPP_DIGITAL;
 672                 pin->output = true;
 673                 pin->power_source = level;
 674                 pin->output_value = !!(ctrl & BIT(0));
 675                 pin->paired = !!(ctrl & BIT(1));
 676                 break;
 677         case PM8XXX_MPP_TYPE_D_BI_DIR:
 678                 pin->mode = PM8XXX_MPP_DIGITAL;
 679                 pin->input = true;
 680                 pin->output = true;
 681                 pin->power_source = level;
 682                 switch (ctrl) {
 683                 case PM8XXX_MPP_BI_PULLUP_1KOHM:
 684                         pin->pullup = 600;
 685                         break;
 686                 case PM8XXX_MPP_BI_PULLUP_OPEN:
 687                         pin->high_z = true;
 688                         break;
 689                 case PM8XXX_MPP_BI_PULLUP_10KOHM:
 690                         pin->pullup = 10000;
 691                         break;
 692                 case PM8XXX_MPP_BI_PULLUP_30KOHM:
 693                         pin->pullup = 30000;
 694                         break;
 695                 }
 696                 break;
 697         case PM8XXX_MPP_TYPE_A_INPUT:
 698                 pin->mode = PM8XXX_MPP_ANALOG;
 699                 pin->input = true;
 700                 pin->amux = level;
 701                 break;
 702         case PM8XXX_MPP_TYPE_A_OUTPUT:
 703                 pin->mode = PM8XXX_MPP_ANALOG;
 704                 pin->output = true;
 705                 pin->aout_level = level;
 706                 pin->output_value = !!(ctrl & BIT(0));
 707                 pin->paired = !!(ctrl & BIT(1));
 708                 break;
 709         case PM8XXX_MPP_TYPE_SINK:
 710                 pin->mode = PM8XXX_MPP_SINK;
 711                 pin->drive_strength = 5 * (level + 1);
 712                 pin->output_value = !!(ctrl & BIT(0));
 713                 pin->paired = !!(ctrl & BIT(1));
 714                 break;
 715         case PM8XXX_MPP_TYPE_DTEST_SINK:
 716                 pin->mode = PM8XXX_MPP_SINK;
 717                 pin->dtest = ctrl + 1;
 718                 pin->drive_strength = 5 * (level + 1);
 719                 break;
 720         case PM8XXX_MPP_TYPE_DTEST_OUTPUT:
 721                 pin->mode = PM8XXX_MPP_DIGITAL;
 722                 pin->power_source = level;
 723                 if (ctrl >= 1)
 724                         pin->dtest = ctrl;
 725                 break;
 726         }
 727
 728         return 0;
 729 }
 730
 731 static int pm8xxx_mpp_domain_translate(struct irq_domain *domain,
 732                                    struct irq_fwspec *fwspec,
 733                                    unsigned long *hwirq,
 734                                    unsigned int *type)
 735 {
 736         struct pm8xxx_mpp *pctrl = container_of(domain->host_data,
 737                                                  struct pm8xxx_mpp, chip);
 738
 739         if (fwspec->param_count != 2 ||
 740             fwspec->param[0] < PM8XXX_MPP_PHYSICAL_OFFSET ||
 741             fwspec->param[0] > pctrl->chip.ngpio)
 742                 return -EINVAL;
 743
 744         *hwirq = fwspec->param[0] - PM8XXX_MPP_PHYSICAL_OFFSET;
 745         *type = fwspec->param[1];
 746
 747         return 0;
 748 }
 749
 750 static unsigned int pm8xxx_mpp_child_offset_to_irq(struct gpio_chip *chip,
 751                                                    unsigned int offset)
 752 {
 753         return offset + PM8XXX_MPP_PHYSICAL_OFFSET;
 754 }
 755
 756 static int pm8821_mpp_child_to_parent_hwirq(struct gpio_chip *chip,
 757                                             unsigned int child_hwirq,
 758                                             unsigned int child_type,
 759                                             unsigned int *parent_hwirq,
 760                                             unsigned int *parent_type)
 761 {
 762         *parent_hwirq = child_hwirq + 24;
 763         *parent_type = child_type;
 764
 765         return 0;
 766 }
 767
 768 static int pm8xxx_mpp_child_to_parent_hwirq(struct gpio_chip *chip,
 769                                             unsigned int child_hwirq,
 770                                             unsigned int child_type,
 771                                             unsigned int *parent_hwirq,
 772                                             unsigned int *parent_type)
 773 {
 774         *parent_hwirq = child_hwirq + 0x80;
 775         *parent_type = child_type;
 776
 777         return 0;
 778 }
 779
 780 static const struct of_device_id pm8xxx_mpp_of_match[] = {
 781         { .compatible = "qcom,pm8018-mpp", .data = (void *) 6 },
 782         { .compatible = "qcom,pm8038-mpp", .data = (void *) 6 },
 783         { .compatible = "qcom,pm8058-mpp", .data = (void *) 12 },
 784         { .compatible = "qcom,pm8821-mpp", .data = (void *) 4 },
 785         { .compatible = "qcom,pm8917-mpp", .data = (void *) 10 },
 786         { .compatible = "qcom,pm8921-mpp", .data = (void *) 12 },
 787         { },
 788 };
 789 MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match);
 790
 791 static int pm8xxx_mpp_probe(struct platform_device *pdev)
 792 {
 793         struct pm8xxx_pin_data *pin_data;
 794         struct irq_domain *parent_domain;
 795         struct device_node *parent_node;
 796         struct pinctrl_pin_desc *pins;
 797         struct gpio_irq_chip *girq;
 798         struct pm8xxx_mpp *pctrl;
 799         int ret;
 800         int i;
 801
 802         pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
 803         if (!pctrl)
 804                 return -ENOMEM;
 805
 806         pctrl->dev = &pdev->dev;
 807         pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev);
 808
 809         pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 810         if (!pctrl->regmap) {
 811                 dev_err(&pdev->dev, "parent regmap unavailable\n");
 812                 return -ENXIO;
 813         }
 814
 815         pctrl->desc = pm8xxx_pinctrl_desc;
 816         pctrl->desc.npins = pctrl->npins;
 817
 818         pins = devm_kcalloc(&pdev->dev,
 819                             pctrl->desc.npins,
 820                             sizeof(struct pinctrl_pin_desc),
 821                             GFP_KERNEL);
 822         if (!pins)
 823                 return -ENOMEM;
 824
 825         pin_data = devm_kcalloc(&pdev->dev,
 826                                 pctrl->desc.npins,
 827                                 sizeof(struct pm8xxx_pin_data),
 828                                 GFP_KERNEL);
 829         if (!pin_data)
 830                 return -ENOMEM;
 831
 832         for (i = 0; i < pctrl->desc.npins; i++) {
 833                 pin_data[i].reg = SSBI_REG_ADDR_MPP(i);
 834
 835                 ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);
 836                 if (ret)
 837                         return ret;
 838
 839                 pins[i].number = i;
 840                 pins[i].name = pm8xxx_groups[i];
 841                 pins[i].drv_data = &pin_data[i];
 842         }
 843         pctrl->desc.pins = pins;
 844
 845         pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);
 846         pctrl->desc.custom_params = pm8xxx_mpp_bindings;
 847 #ifdef CONFIG_DEBUG_FS
 848         pctrl->desc.custom_conf_items = pm8xxx_conf_items;
 849 #endif
 850
 851         pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);
 852         if (IS_ERR(pctrl->pctrl)) {
 853                 dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
 854                 return PTR_ERR(pctrl->pctrl);
 855         }
 856
 857         pctrl->chip = pm8xxx_mpp_template;
 858         pctrl->chip.base = -1;
 859         pctrl->chip.parent = &pdev->dev;
 860         pctrl->chip.of_gpio_n_cells = 2;
 861         pctrl->chip.label = dev_name(pctrl->dev);
 862         pctrl->chip.ngpio = pctrl->npins;
 863
 864         parent_node = of_irq_find_parent(pctrl->dev->of_node);
 865         if (!parent_node)
 866                 return -ENXIO;
 867
 868         parent_domain = irq_find_host(parent_node);
 869         of_node_put(parent_node);
 870         if (!parent_domain)
 871                 return -ENXIO;
 872
 873         pctrl->irq.name = "ssbi-mpp";
 874         pctrl->irq.irq_mask_ack = irq_chip_mask_ack_parent;
 875         pctrl->irq.irq_unmask = irq_chip_unmask_parent;
 876         pctrl->irq.irq_set_type = irq_chip_set_type_parent;
 877         pctrl->irq.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE;
 878
 879         girq = &pctrl->chip.irq;
 880         girq->chip = &pctrl->irq;
 881         girq->default_type = IRQ_TYPE_NONE;
 882         girq->handler = handle_level_irq;
 883         girq->fwnode = of_node_to_fwnode(pctrl->dev->of_node);
 884         girq->parent_domain = parent_domain;
 885         if (of_device_is_compatible(pdev->dev.of_node, "qcom,pm8821-mpp"))
 886                 girq->child_to_parent_hwirq = pm8821_mpp_child_to_parent_hwirq;
 887         else
 888                 girq->child_to_parent_hwirq = pm8xxx_mpp_child_to_parent_hwirq;
 889         girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_twocell;
 890         girq->child_offset_to_irq = pm8xxx_mpp_child_offset_to_irq;
 891         girq->child_irq_domain_ops.translate = pm8xxx_mpp_domain_translate;
 892
 893         ret = gpiochip_add_data(&pctrl->chip, pctrl);
 894         if (ret) {
 895                 dev_err(&pdev->dev, "failed register gpiochip\n");
 896                 return ret;
 897         }
 898
 899         ret = gpiochip_add_pin_range(&pctrl->chip,
 900                                      dev_name(pctrl->dev),
 901                                      0, 0, pctrl->chip.ngpio);
 902         if (ret) {
 903                 dev_err(pctrl->dev, "failed to add pin range\n");
 904                 goto unregister_gpiochip;
 905         }
 906
 907         platform_set_drvdata(pdev, pctrl);
 908
 909         dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n");
 910
 911         return 0;
 912
 913 unregister_gpiochip:
 914         gpiochip_remove(&pctrl->chip);
 915
 916         return ret;
 917 }
 918
 919 static int pm8xxx_mpp_remove(struct platform_device *pdev)
 920 {
 921         struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);
 922
 923         gpiochip_remove(&pctrl->chip);
 924
 925         return 0;
 926 }
 927
 928 static struct platform_driver pm8xxx_mpp_driver = {
 929         .driver = {
 930                 .name = "qcom-ssbi-mpp",
 931                 .of_match_table = pm8xxx_mpp_of_match,
 932         },
 933         .probe = pm8xxx_mpp_probe,
 934         .remove = pm8xxx_mpp_remove,
 935 };
 936
 937 module_platform_driver(pm8xxx_mpp_driver);
 938
 939 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
 940 MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");
 941 MODULE_LICENSE("GPL v2");