1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
6 #include <linux/module.h>
8 #include <linux/platform_device.h>
9 #include <linux/pinctrl/pinctrl.h>
11 #include "pinctrl-msm.h"
13 static const struct pinctrl_pin_desc ipq4019_pins[] = {
14 PINCTRL_PIN(0, "GPIO_0"),
15 PINCTRL_PIN(1, "GPIO_1"),
16 PINCTRL_PIN(2, "GPIO_2"),
17 PINCTRL_PIN(3, "GPIO_3"),
18 PINCTRL_PIN(4, "GPIO_4"),
19 PINCTRL_PIN(5, "GPIO_5"),
20 PINCTRL_PIN(6, "GPIO_6"),
21 PINCTRL_PIN(7, "GPIO_7"),
22 PINCTRL_PIN(8, "GPIO_8"),
23 PINCTRL_PIN(9, "GPIO_9"),
24 PINCTRL_PIN(10, "GPIO_10"),
25 PINCTRL_PIN(11, "GPIO_11"),
26 PINCTRL_PIN(12, "GPIO_12"),
27 PINCTRL_PIN(13, "GPIO_13"),
28 PINCTRL_PIN(14, "GPIO_14"),
29 PINCTRL_PIN(15, "GPIO_15"),
30 PINCTRL_PIN(16, "GPIO_16"),
31 PINCTRL_PIN(17, "GPIO_17"),
32 PINCTRL_PIN(18, "GPIO_18"),
33 PINCTRL_PIN(19, "GPIO_19"),
34 PINCTRL_PIN(20, "GPIO_20"),
35 PINCTRL_PIN(21, "GPIO_21"),
36 PINCTRL_PIN(22, "GPIO_22"),
37 PINCTRL_PIN(23, "GPIO_23"),
38 PINCTRL_PIN(24, "GPIO_24"),
39 PINCTRL_PIN(25, "GPIO_25"),
40 PINCTRL_PIN(26, "GPIO_26"),
41 PINCTRL_PIN(27, "GPIO_27"),
42 PINCTRL_PIN(28, "GPIO_28"),
43 PINCTRL_PIN(29, "GPIO_29"),
44 PINCTRL_PIN(30, "GPIO_30"),
45 PINCTRL_PIN(31, "GPIO_31"),
46 PINCTRL_PIN(32, "GPIO_32"),
47 PINCTRL_PIN(33, "GPIO_33"),
48 PINCTRL_PIN(34, "GPIO_34"),
49 PINCTRL_PIN(35, "GPIO_35"),
50 PINCTRL_PIN(36, "GPIO_36"),
51 PINCTRL_PIN(37, "GPIO_37"),
52 PINCTRL_PIN(38, "GPIO_38"),
53 PINCTRL_PIN(39, "GPIO_39"),
54 PINCTRL_PIN(40, "GPIO_40"),
55 PINCTRL_PIN(41, "GPIO_41"),
56 PINCTRL_PIN(42, "GPIO_42"),
57 PINCTRL_PIN(43, "GPIO_43"),
58 PINCTRL_PIN(44, "GPIO_44"),
59 PINCTRL_PIN(45, "GPIO_45"),
60 PINCTRL_PIN(46, "GPIO_46"),
61 PINCTRL_PIN(47, "GPIO_47"),
62 PINCTRL_PIN(48, "GPIO_48"),
63 PINCTRL_PIN(49, "GPIO_49"),
64 PINCTRL_PIN(50, "GPIO_50"),
65 PINCTRL_PIN(51, "GPIO_51"),
66 PINCTRL_PIN(52, "GPIO_52"),
67 PINCTRL_PIN(53, "GPIO_53"),
68 PINCTRL_PIN(54, "GPIO_54"),
69 PINCTRL_PIN(55, "GPIO_55"),
70 PINCTRL_PIN(56, "GPIO_56"),
71 PINCTRL_PIN(57, "GPIO_57"),
72 PINCTRL_PIN(58, "GPIO_58"),
73 PINCTRL_PIN(59, "GPIO_59"),
74 PINCTRL_PIN(60, "GPIO_60"),
75 PINCTRL_PIN(61, "GPIO_61"),
76 PINCTRL_PIN(62, "GPIO_62"),
77 PINCTRL_PIN(63, "GPIO_63"),
78 PINCTRL_PIN(64, "GPIO_64"),
79 PINCTRL_PIN(65, "GPIO_65"),
80 PINCTRL_PIN(66, "GPIO_66"),
81 PINCTRL_PIN(67, "GPIO_67"),
82 PINCTRL_PIN(68, "GPIO_68"),
83 PINCTRL_PIN(69, "GPIO_69"),
84 PINCTRL_PIN(70, "GPIO_70"),
85 PINCTRL_PIN(71, "GPIO_71"),
86 PINCTRL_PIN(72, "GPIO_72"),
87 PINCTRL_PIN(73, "GPIO_73"),
88 PINCTRL_PIN(74, "GPIO_74"),
89 PINCTRL_PIN(75, "GPIO_75"),
90 PINCTRL_PIN(76, "GPIO_76"),
91 PINCTRL_PIN(77, "GPIO_77"),
92 PINCTRL_PIN(78, "GPIO_78"),
93 PINCTRL_PIN(79, "GPIO_79"),
94 PINCTRL_PIN(80, "GPIO_80"),
95 PINCTRL_PIN(81, "GPIO_81"),
96 PINCTRL_PIN(82, "GPIO_82"),
97 PINCTRL_PIN(83, "GPIO_83"),
98 PINCTRL_PIN(84, "GPIO_84"),
99 PINCTRL_PIN(85, "GPIO_85"),
100 PINCTRL_PIN(86, "GPIO_86"),
101 PINCTRL_PIN(87, "GPIO_87"),
102 PINCTRL_PIN(88, "GPIO_88"),
103 PINCTRL_PIN(89, "GPIO_89"),
104 PINCTRL_PIN(90, "GPIO_90"),
105 PINCTRL_PIN(91, "GPIO_91"),
106 PINCTRL_PIN(92, "GPIO_92"),
107 PINCTRL_PIN(93, "GPIO_93"),
108 PINCTRL_PIN(94, "GPIO_94"),
109 PINCTRL_PIN(95, "GPIO_95"),
110 PINCTRL_PIN(96, "GPIO_96"),
111 PINCTRL_PIN(97, "GPIO_97"),
112 PINCTRL_PIN(98, "GPIO_98"),
113 PINCTRL_PIN(99, "GPIO_99"),
116 #define DECLARE_QCA_GPIO_PINS(pin) \
117 static const unsigned int gpio##pin##_pins[] = { pin }
118 DECLARE_QCA_GPIO_PINS(0);
119 DECLARE_QCA_GPIO_PINS(1);
120 DECLARE_QCA_GPIO_PINS(2);
121 DECLARE_QCA_GPIO_PINS(3);
122 DECLARE_QCA_GPIO_PINS(4);
123 DECLARE_QCA_GPIO_PINS(5);
124 DECLARE_QCA_GPIO_PINS(6);
125 DECLARE_QCA_GPIO_PINS(7);
126 DECLARE_QCA_GPIO_PINS(8);
127 DECLARE_QCA_GPIO_PINS(9);
128 DECLARE_QCA_GPIO_PINS(10);
129 DECLARE_QCA_GPIO_PINS(11);
130 DECLARE_QCA_GPIO_PINS(12);
131 DECLARE_QCA_GPIO_PINS(13);
132 DECLARE_QCA_GPIO_PINS(14);
133 DECLARE_QCA_GPIO_PINS(15);
134 DECLARE_QCA_GPIO_PINS(16);
135 DECLARE_QCA_GPIO_PINS(17);
136 DECLARE_QCA_GPIO_PINS(18);
137 DECLARE_QCA_GPIO_PINS(19);
138 DECLARE_QCA_GPIO_PINS(20);
139 DECLARE_QCA_GPIO_PINS(21);
140 DECLARE_QCA_GPIO_PINS(22);
141 DECLARE_QCA_GPIO_PINS(23);
142 DECLARE_QCA_GPIO_PINS(24);
143 DECLARE_QCA_GPIO_PINS(25);
144 DECLARE_QCA_GPIO_PINS(26);
145 DECLARE_QCA_GPIO_PINS(27);
146 DECLARE_QCA_GPIO_PINS(28);
147 DECLARE_QCA_GPIO_PINS(29);
148 DECLARE_QCA_GPIO_PINS(30);
149 DECLARE_QCA_GPIO_PINS(31);
150 DECLARE_QCA_GPIO_PINS(32);
151 DECLARE_QCA_GPIO_PINS(33);
152 DECLARE_QCA_GPIO_PINS(34);
153 DECLARE_QCA_GPIO_PINS(35);
154 DECLARE_QCA_GPIO_PINS(36);
155 DECLARE_QCA_GPIO_PINS(37);
156 DECLARE_QCA_GPIO_PINS(38);
157 DECLARE_QCA_GPIO_PINS(39);
158 DECLARE_QCA_GPIO_PINS(40);
159 DECLARE_QCA_GPIO_PINS(41);
160 DECLARE_QCA_GPIO_PINS(42);
161 DECLARE_QCA_GPIO_PINS(43);
162 DECLARE_QCA_GPIO_PINS(44);
163 DECLARE_QCA_GPIO_PINS(45);
164 DECLARE_QCA_GPIO_PINS(46);
165 DECLARE_QCA_GPIO_PINS(47);
166 DECLARE_QCA_GPIO_PINS(48);
167 DECLARE_QCA_GPIO_PINS(49);
168 DECLARE_QCA_GPIO_PINS(50);
169 DECLARE_QCA_GPIO_PINS(51);
170 DECLARE_QCA_GPIO_PINS(52);
171 DECLARE_QCA_GPIO_PINS(53);
172 DECLARE_QCA_GPIO_PINS(54);
173 DECLARE_QCA_GPIO_PINS(55);
174 DECLARE_QCA_GPIO_PINS(56);
175 DECLARE_QCA_GPIO_PINS(57);
176 DECLARE_QCA_GPIO_PINS(58);
177 DECLARE_QCA_GPIO_PINS(59);
178 DECLARE_QCA_GPIO_PINS(60);
179 DECLARE_QCA_GPIO_PINS(61);
180 DECLARE_QCA_GPIO_PINS(62);
181 DECLARE_QCA_GPIO_PINS(63);
182 DECLARE_QCA_GPIO_PINS(64);
183 DECLARE_QCA_GPIO_PINS(65);
184 DECLARE_QCA_GPIO_PINS(66);
185 DECLARE_QCA_GPIO_PINS(67);
186 DECLARE_QCA_GPIO_PINS(68);
187 DECLARE_QCA_GPIO_PINS(69);
188 DECLARE_QCA_GPIO_PINS(70);
189 DECLARE_QCA_GPIO_PINS(71);
190 DECLARE_QCA_GPIO_PINS(72);
191 DECLARE_QCA_GPIO_PINS(73);
192 DECLARE_QCA_GPIO_PINS(74);
193 DECLARE_QCA_GPIO_PINS(75);
194 DECLARE_QCA_GPIO_PINS(76);
195 DECLARE_QCA_GPIO_PINS(77);
196 DECLARE_QCA_GPIO_PINS(78);
197 DECLARE_QCA_GPIO_PINS(79);
198 DECLARE_QCA_GPIO_PINS(80);
199 DECLARE_QCA_GPIO_PINS(81);
200 DECLARE_QCA_GPIO_PINS(82);
201 DECLARE_QCA_GPIO_PINS(83);
202 DECLARE_QCA_GPIO_PINS(84);
203 DECLARE_QCA_GPIO_PINS(85);
204 DECLARE_QCA_GPIO_PINS(86);
205 DECLARE_QCA_GPIO_PINS(87);
206 DECLARE_QCA_GPIO_PINS(88);
207 DECLARE_QCA_GPIO_PINS(89);
208 DECLARE_QCA_GPIO_PINS(90);
209 DECLARE_QCA_GPIO_PINS(91);
210 DECLARE_QCA_GPIO_PINS(92);
211 DECLARE_QCA_GPIO_PINS(93);
212 DECLARE_QCA_GPIO_PINS(94);
213 DECLARE_QCA_GPIO_PINS(95);
214 DECLARE_QCA_GPIO_PINS(96);
215 DECLARE_QCA_GPIO_PINS(97);
216 DECLARE_QCA_GPIO_PINS(98);
217 DECLARE_QCA_GPIO_PINS(99);
219 #define FUNCTION(fname) \
220 [qca_mux_##fname] = { \
222 .groups = fname##_groups, \
223 .ngroups = ARRAY_SIZE(fname##_groups), \
226 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \
228 .name = "gpio" #id, \
229 .pins = gpio##id##_pins, \
230 .npins = (unsigned)ARRAY_SIZE(gpio##id##_pins), \
232 qca_mux_gpio, /* gpio mode */ \
249 .ctl_reg = 0x0 + 0x1000 * id, \
250 .io_reg = 0x4 + 0x1000 * id, \
251 .intr_cfg_reg = 0x8 + 0x1000 * id, \
252 .intr_status_reg = 0xc + 0x1000 * id, \
253 .intr_target_reg = 0x8 + 0x1000 * id, \
260 .intr_enable_bit = 0, \
261 .intr_status_bit = 0, \
262 .intr_target_bit = 5, \
263 .intr_raw_status_bit = 4, \
264 .intr_polarity_bit = 1, \
265 .intr_detection_bit = 2, \
266 .intr_detection_width = 2, \
270 enum ipq4019_functions {
282 qca_mux_i2s_spdif_in,
283 qca_mux_i2s_spdif_out,
318 static const char * const gpio_groups[] = {
319 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
320 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
321 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
322 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
323 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
324 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
325 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
326 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
327 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
328 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
329 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
330 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
331 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
332 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
335 static const char * const aud_pin_groups[] = {
336 "gpio48", "gpio49", "gpio50", "gpio51",
338 static const char * const audio_pwm_groups[] = {
339 "gpio30", "gpio31", "gpio32", "gpio33", "gpio64", "gpio65", "gpio66",
342 static const char * const blsp_i2c0_groups[] = {
343 "gpio10", "gpio11", "gpio20", "gpio21", "gpio58", "gpio59",
345 static const char * const blsp_i2c1_groups[] = {
346 "gpio12", "gpio13", "gpio34", "gpio35",
348 static const char * const blsp_spi0_groups[] = {
349 "gpio12", "gpio13", "gpio14", "gpio15", "gpio45", "gpio54", "gpio55",
352 static const char * const blsp_spi1_groups[] = {
353 "gpio44", "gpio45", "gpio46", "gpio47",
355 static const char * const blsp_uart0_groups[] = {
356 "gpio16", "gpio17", "gpio60", "gpio61",
358 static const char * const blsp_uart1_groups[] = {
359 "gpio8", "gpio9", "gpio10", "gpio11",
361 static const char * const chip_rst_groups[] = {
364 static const char * const i2s_rx_groups[] = {
365 "gpio0", "gpio1", "gpio2", "gpio20", "gpio21", "gpio22", "gpio23",
366 "gpio58", "gpio60", "gpio61", "gpio63",
368 static const char * const i2s_spdif_in_groups[] = {
369 "gpio34", "gpio59", "gpio63",
371 static const char * const i2s_spdif_out_groups[] = {
372 "gpio35", "gpio62", "gpio63",
374 static const char * const i2s_td_groups[] = {
375 "gpio27", "gpio28", "gpio29", "gpio54", "gpio55", "gpio56", "gpio63",
377 static const char * const i2s_tx_groups[] = {
378 "gpio24", "gpio25", "gpio26", "gpio52", "gpio53", "gpio57", "gpio60",
381 static const char * const jtag_groups[] = {
382 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
384 static const char * const led0_groups[] = {
385 "gpio16", "gpio36", "gpio60",
387 static const char * const led1_groups[] = {
388 "gpio17", "gpio37", "gpio61",
390 static const char * const led2_groups[] = {
391 "gpio36", "gpio38", "gpio58",
393 static const char * const led3_groups[] = {
396 static const char * const led4_groups[] = {
399 static const char * const led5_groups[] = {
402 static const char * const led6_groups[] = {
405 static const char * const led7_groups[] = {
408 static const char * const led8_groups[] = {
411 static const char * const led9_groups[] = {
414 static const char * const led10_groups[] = {
417 static const char * const led11_groups[] = {
420 static const char * const mdc_groups[] = {
423 static const char * const mdio_groups[] = {
426 static const char * const pcie_groups[] = {
429 static const char * const pmu_groups[] = {
432 static const char * const prng_rosc_groups[] = {
435 static const char * const qpic_groups[] = {
436 "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
437 "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65",
438 "gpio66", "gpio67", "gpio68", "gpio69",
440 static const char * const rgmii_groups[] = {
441 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
442 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33",
444 static const char * const rmii_groups[] = {
445 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
446 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
449 static const char * const sdio_groups[] = {
450 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
451 "gpio30", "gpio31", "gpio32",
453 static const char * const smart0_groups[] = {
454 "gpio0", "gpio1", "gpio2", "gpio5", "gpio44", "gpio45", "gpio46",
457 static const char * const smart1_groups[] = {
458 "gpio8", "gpio9", "gpio16", "gpio17", "gpio58", "gpio59", "gpio60",
461 static const char * const smart2_groups[] = {
462 "gpio40", "gpio41", "gpio48", "gpio49",
464 static const char * const smart3_groups[] = {
465 "gpio58", "gpio59", "gpio60", "gpio61",
467 static const char * const tm_groups[] = {
468 "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
469 "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
471 static const char * const wifi0_groups[] = {
472 "gpio37", "gpio40", "gpio41", "gpio42", "gpio50", "gpio51", "gpio52",
473 "gpio53", "gpio56", "gpio57", "gpio58", "gpio98",
475 static const char * const wifi1_groups[] = {
476 "gpio37", "gpio40", "gpio41", "gpio43", "gpio50", "gpio51", "gpio52",
477 "gpio53", "gpio56", "gpio57", "gpio58", "gpio98",
480 static const struct msm_function ipq4019_functions[] = {
487 FUNCTION(blsp_uart0),
488 FUNCTION(blsp_uart1),
492 FUNCTION(i2s_spdif_in),
493 FUNCTION(i2s_spdif_out),
527 static const struct msm_pingroup ipq4019_groups[] = {
528 PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
530 PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
532 PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
534 PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
535 PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
536 PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
538 PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
539 PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
540 PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
542 PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
544 PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
546 PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
548 PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
550 PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
552 PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
554 PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
556 PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
558 PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
560 PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
561 PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
562 PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
564 PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
566 PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
568 PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
570 PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
572 PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
574 PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
576 PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
578 PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
580 PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
582 PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
584 PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
586 PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
588 PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
590 PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA,
592 PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA,
594 PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
596 PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA,
598 PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
600 PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
602 PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA,
604 PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA,
606 PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
608 PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
610 PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA,
612 PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA,
614 PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA,
616 PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA,
618 PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA,
620 PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA,
622 PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA,
624 PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA,
626 PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA,
628 PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA,
630 PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
632 PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
634 PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA,
636 PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA,
638 PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm,
639 wifi0, wifi1, NA, NA, NA),
640 PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA,
641 NA, NA, tm, NA, NA, NA),
642 PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx,
643 NA, NA, NA, NA, NA, tm, NA),
644 PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx,
645 NA, NA, NA, NA, NA, tm, NA),
646 PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA,
648 PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out,
649 i2s_spdif_in, NA, NA, NA, NA, tm, NA),
650 PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
652 PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
654 PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
656 PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
658 PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
659 PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
660 PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
661 PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
662 PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
663 PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
664 PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
665 PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
666 PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
667 PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
668 PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
669 PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
670 PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
671 PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
672 PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
673 PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
674 PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
675 PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
676 PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
677 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
678 PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
679 PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
680 PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
681 PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
682 PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
683 PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
684 PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
685 PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
686 PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
687 PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
688 PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
690 PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
693 static const struct msm_pinctrl_soc_data ipq4019_pinctrl = {
694 .pins = ipq4019_pins,
695 .npins = ARRAY_SIZE(ipq4019_pins),
696 .functions = ipq4019_functions,
697 .nfunctions = ARRAY_SIZE(ipq4019_functions),
698 .groups = ipq4019_groups,
699 .ngroups = ARRAY_SIZE(ipq4019_groups),
701 .pull_no_keeper = true,
704 static int ipq4019_pinctrl_probe(struct platform_device *pdev)
706 return msm_pinctrl_probe(pdev, &ipq4019_pinctrl);
709 static const struct of_device_id ipq4019_pinctrl_of_match[] = {
710 { .compatible = "qcom,ipq4019-pinctrl", },
714 static struct platform_driver ipq4019_pinctrl_driver = {
716 .name = "ipq4019-pinctrl",
717 .of_match_table = ipq4019_pinctrl_of_match,
719 .probe = ipq4019_pinctrl_probe,
720 .remove = msm_pinctrl_remove,
723 static int __init ipq4019_pinctrl_init(void)
725 return platform_driver_register(&ipq4019_pinctrl_driver);
727 arch_initcall(ipq4019_pinctrl_init);
729 static void __exit ipq4019_pinctrl_exit(void)
731 platform_driver_unregister(&ipq4019_pinctrl_driver);
733 module_exit(ipq4019_pinctrl_exit);
735 MODULE_DESCRIPTION("Qualcomm ipq4019 pinctrl driver");
736 MODULE_LICENSE("GPL v2");
737 MODULE_DEVICE_TABLE(of, ipq4019_pinctrl_of_match);