1 /* MCP23S08 SPI/I2C GPIO driver */
3 #include <linux/kernel.h>
4 #include <linux/device.h>
5 #include <linux/mutex.h>
6 #include <linux/module.h>
7 #include <linux/gpio.h>
9 #include <linux/spi/spi.h>
10 #include <linux/spi/mcp23s08.h>
11 #include <linux/slab.h>
12 #include <asm/byteorder.h>
13 #include <linux/interrupt.h>
14 #include <linux/of_device.h>
15 #include <linux/regmap.h>
16 #include <linux/pinctrl/pinctrl.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinconf-generic.h>
21 * MCP types supported by driver
23 #define MCP_TYPE_S08 0
24 #define MCP_TYPE_S17 1
25 #define MCP_TYPE_008 2
26 #define MCP_TYPE_017 3
27 #define MCP_TYPE_S18 4
28 #define MCP_TYPE_018 5
30 #define MCP_MAX_DEV_PER_CS 8
32 /* Registers are all 8 bits wide.
34 * The mcp23s17 has twice as many bits, and can be configured to work
35 * with either 16 bit registers or with two adjacent 8 bit banks.
37 #define MCP_IODIR 0x00 /* init/reset: all ones */
39 #define MCP_GPINTEN 0x02
40 #define MCP_DEFVAL 0x03
41 #define MCP_INTCON 0x04
42 #define MCP_IOCON 0x05
43 # define IOCON_MIRROR (1 << 6)
44 # define IOCON_SEQOP (1 << 5)
45 # define IOCON_HAEN (1 << 3)
46 # define IOCON_ODR (1 << 2)
47 # define IOCON_INTPOL (1 << 1)
48 # define IOCON_INTCC (1)
51 #define MCP_INTCAP 0x08
67 /* lock protects regmap access with bypass/cache flags */
70 struct gpio_chip chip;
72 struct regmap *regmap;
75 struct pinctrl_dev *pctldev;
76 struct pinctrl_desc pinctrl_desc;
79 static const struct reg_default mcp23x08_defaults[] = {
80 {.reg = MCP_IODIR, .def = 0xff},
81 {.reg = MCP_IPOL, .def = 0x00},
82 {.reg = MCP_GPINTEN, .def = 0x00},
83 {.reg = MCP_DEFVAL, .def = 0x00},
84 {.reg = MCP_INTCON, .def = 0x00},
85 {.reg = MCP_IOCON, .def = 0x00},
86 {.reg = MCP_GPPU, .def = 0x00},
87 {.reg = MCP_OLAT, .def = 0x00},
90 static const struct regmap_range mcp23x08_volatile_range = {
91 .range_min = MCP_INTF,
92 .range_max = MCP_GPIO,
95 static const struct regmap_access_table mcp23x08_volatile_table = {
96 .yes_ranges = &mcp23x08_volatile_range,
100 static const struct regmap_range mcp23x08_precious_range = {
101 .range_min = MCP_GPIO,
102 .range_max = MCP_GPIO,
105 static const struct regmap_access_table mcp23x08_precious_table = {
106 .yes_ranges = &mcp23x08_precious_range,
110 static const struct regmap_config mcp23x08_regmap = {
115 .volatile_table = &mcp23x08_volatile_table,
116 .precious_table = &mcp23x08_precious_table,
117 .reg_defaults = mcp23x08_defaults,
118 .num_reg_defaults = ARRAY_SIZE(mcp23x08_defaults),
119 .cache_type = REGCACHE_FLAT,
120 .max_register = MCP_OLAT,
123 static const struct reg_default mcp23x16_defaults[] = {
124 {.reg = MCP_IODIR << 1, .def = 0xffff},
125 {.reg = MCP_IPOL << 1, .def = 0x0000},
126 {.reg = MCP_GPINTEN << 1, .def = 0x0000},
127 {.reg = MCP_DEFVAL << 1, .def = 0x0000},
128 {.reg = MCP_INTCON << 1, .def = 0x0000},
129 {.reg = MCP_IOCON << 1, .def = 0x0000},
130 {.reg = MCP_GPPU << 1, .def = 0x0000},
131 {.reg = MCP_OLAT << 1, .def = 0x0000},
134 static const struct regmap_range mcp23x16_volatile_range = {
135 .range_min = MCP_INTF << 1,
136 .range_max = MCP_GPIO << 1,
139 static const struct regmap_access_table mcp23x16_volatile_table = {
140 .yes_ranges = &mcp23x16_volatile_range,
144 static const struct regmap_range mcp23x16_precious_range = {
145 .range_min = MCP_GPIO << 1,
146 .range_max = MCP_GPIO << 1,
149 static const struct regmap_access_table mcp23x16_precious_table = {
150 .yes_ranges = &mcp23x16_precious_range,
154 static const struct regmap_config mcp23x17_regmap = {
159 .max_register = MCP_OLAT << 1,
160 .volatile_table = &mcp23x16_volatile_table,
161 .precious_table = &mcp23x16_precious_table,
162 .reg_defaults = mcp23x16_defaults,
163 .num_reg_defaults = ARRAY_SIZE(mcp23x16_defaults),
164 .cache_type = REGCACHE_FLAT,
165 .val_format_endian = REGMAP_ENDIAN_LITTLE,
168 static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
170 return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
173 static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
175 return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
178 static int mcp_set_mask(struct mcp23s08 *mcp, unsigned int reg,
179 unsigned int mask, bool enabled)
181 u16 val = enabled ? 0xffff : 0x0000;
182 return regmap_update_bits(mcp->regmap, reg << mcp->reg_shift,
186 static int mcp_set_bit(struct mcp23s08 *mcp, unsigned int reg,
187 unsigned int pin, bool enabled)
190 return mcp_set_mask(mcp, reg, mask, enabled);
193 static const struct pinctrl_pin_desc mcp23x08_pins[] = {
194 PINCTRL_PIN(0, "gpio0"),
195 PINCTRL_PIN(1, "gpio1"),
196 PINCTRL_PIN(2, "gpio2"),
197 PINCTRL_PIN(3, "gpio3"),
198 PINCTRL_PIN(4, "gpio4"),
199 PINCTRL_PIN(5, "gpio5"),
200 PINCTRL_PIN(6, "gpio6"),
201 PINCTRL_PIN(7, "gpio7"),
204 static const struct pinctrl_pin_desc mcp23x17_pins[] = {
205 PINCTRL_PIN(0, "gpio0"),
206 PINCTRL_PIN(1, "gpio1"),
207 PINCTRL_PIN(2, "gpio2"),
208 PINCTRL_PIN(3, "gpio3"),
209 PINCTRL_PIN(4, "gpio4"),
210 PINCTRL_PIN(5, "gpio5"),
211 PINCTRL_PIN(6, "gpio6"),
212 PINCTRL_PIN(7, "gpio7"),
213 PINCTRL_PIN(8, "gpio8"),
214 PINCTRL_PIN(9, "gpio9"),
215 PINCTRL_PIN(10, "gpio10"),
216 PINCTRL_PIN(11, "gpio11"),
217 PINCTRL_PIN(12, "gpio12"),
218 PINCTRL_PIN(13, "gpio13"),
219 PINCTRL_PIN(14, "gpio14"),
220 PINCTRL_PIN(15, "gpio15"),
223 static int mcp_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
228 static const char *mcp_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
234 static int mcp_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
236 const unsigned int **pins,
237 unsigned int *num_pins)
242 static const struct pinctrl_ops mcp_pinctrl_ops = {
243 .get_groups_count = mcp_pinctrl_get_groups_count,
244 .get_group_name = mcp_pinctrl_get_group_name,
245 .get_group_pins = mcp_pinctrl_get_group_pins,
247 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
248 .dt_free_map = pinconf_generic_dt_free_map,
252 static int mcp_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
253 unsigned long *config)
255 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
256 enum pin_config_param param = pinconf_to_config_param(*config);
257 unsigned int data, status;
261 case PIN_CONFIG_BIAS_PULL_UP:
262 ret = mcp_read(mcp, MCP_GPPU, &data);
265 status = (data & BIT(pin)) ? 1 : 0;
268 dev_err(mcp->dev, "Invalid config param %04x\n", param);
274 return status ? 0 : -EINVAL;
277 static int mcp_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
278 unsigned long *configs, unsigned int num_configs)
280 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
281 enum pin_config_param param;
286 for (i = 0; i < num_configs; i++) {
287 param = pinconf_to_config_param(configs[i]);
288 arg = pinconf_to_config_argument(configs[i]);
291 case PIN_CONFIG_BIAS_PULL_UP:
292 ret = mcp_set_bit(mcp, MCP_GPPU, pin, arg);
295 dev_err(mcp->dev, "Invalid config param %04x\n", param);
303 static const struct pinconf_ops mcp_pinconf_ops = {
304 .pin_config_get = mcp_pinconf_get,
305 .pin_config_set = mcp_pinconf_set,
309 /*----------------------------------------------------------------------*/
311 #ifdef CONFIG_SPI_MASTER
313 static int mcp23sxx_spi_write(void *context, const void *data, size_t count)
315 struct mcp23s08 *mcp = context;
316 struct spi_device *spi = to_spi_device(mcp->dev);
317 struct spi_message m;
318 struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, },
319 { .tx_buf = data, .len = count, }, };
321 spi_message_init(&m);
322 spi_message_add_tail(&t[0], &m);
323 spi_message_add_tail(&t[1], &m);
325 return spi_sync(spi, &m);
328 static int mcp23sxx_spi_gather_write(void *context,
329 const void *reg, size_t reg_size,
330 const void *val, size_t val_size)
332 struct mcp23s08 *mcp = context;
333 struct spi_device *spi = to_spi_device(mcp->dev);
334 struct spi_message m;
335 struct spi_transfer t[3] = { { .tx_buf = &mcp->addr, .len = 1, },
336 { .tx_buf = reg, .len = reg_size, },
337 { .tx_buf = val, .len = val_size, }, };
339 spi_message_init(&m);
340 spi_message_add_tail(&t[0], &m);
341 spi_message_add_tail(&t[1], &m);
342 spi_message_add_tail(&t[2], &m);
344 return spi_sync(spi, &m);
347 static int mcp23sxx_spi_read(void *context, const void *reg, size_t reg_size,
348 void *val, size_t val_size)
350 struct mcp23s08 *mcp = context;
351 struct spi_device *spi = to_spi_device(mcp->dev);
357 tx[0] = mcp->addr | 0x01;
358 tx[1] = *((u8 *) reg);
360 return spi_write_then_read(spi, tx, sizeof(tx), val, val_size);
363 static const struct regmap_bus mcp23sxx_spi_regmap = {
364 .write = mcp23sxx_spi_write,
365 .gather_write = mcp23sxx_spi_gather_write,
366 .read = mcp23sxx_spi_read,
369 #endif /* CONFIG_SPI_MASTER */
371 /*----------------------------------------------------------------------*/
373 /* A given spi_device can represent up to eight mcp23sxx chips
374 * sharing the same chipselect but using different addresses
375 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
376 * Driver data holds all the per-chip data.
378 struct mcp23s08_driver_data {
380 struct mcp23s08 *mcp[8];
381 struct mcp23s08 chip[];
385 static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
387 struct mcp23s08 *mcp = gpiochip_get_data(chip);
390 mutex_lock(&mcp->lock);
391 status = mcp_set_bit(mcp, MCP_IODIR, offset, true);
392 mutex_unlock(&mcp->lock);
397 static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
399 struct mcp23s08 *mcp = gpiochip_get_data(chip);
402 mutex_lock(&mcp->lock);
404 /* REVISIT reading this clears any IRQ ... */
405 ret = mcp_read(mcp, MCP_GPIO, &status);
409 mcp->cached_gpio = status;
410 status = !!(status & (1 << offset));
413 mutex_unlock(&mcp->lock);
417 static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, bool value)
419 return mcp_set_mask(mcp, MCP_OLAT, mask, value);
422 static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
424 struct mcp23s08 *mcp = gpiochip_get_data(chip);
425 unsigned mask = BIT(offset);
427 mutex_lock(&mcp->lock);
428 __mcp23s08_set(mcp, mask, !!value);
429 mutex_unlock(&mcp->lock);
433 mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
435 struct mcp23s08 *mcp = gpiochip_get_data(chip);
436 unsigned mask = BIT(offset);
439 mutex_lock(&mcp->lock);
440 status = __mcp23s08_set(mcp, mask, value);
442 status = mcp_set_mask(mcp, MCP_IODIR, mask, false);
444 mutex_unlock(&mcp->lock);
448 /*----------------------------------------------------------------------*/
449 static irqreturn_t mcp23s08_irq(int irq, void *data)
451 struct mcp23s08 *mcp = data;
452 int intcap, intcon, intf, i, gpio, gpio_orig, intcap_mask, defval;
453 unsigned int child_irq;
454 bool intf_set, intcap_changed, gpio_bit_changed,
455 defval_changed, gpio_set;
457 mutex_lock(&mcp->lock);
458 if (mcp_read(mcp, MCP_INTF, &intf) < 0) {
459 mutex_unlock(&mcp->lock);
463 if (mcp_read(mcp, MCP_INTCAP, &intcap) < 0) {
464 mutex_unlock(&mcp->lock);
468 if (mcp_read(mcp, MCP_INTCON, &intcon) < 0) {
469 mutex_unlock(&mcp->lock);
473 if (mcp_read(mcp, MCP_DEFVAL, &defval) < 0) {
474 mutex_unlock(&mcp->lock);
478 /* This clears the interrupt(configurable on S18) */
479 if (mcp_read(mcp, MCP_GPIO, &gpio) < 0) {
480 mutex_unlock(&mcp->lock);
483 gpio_orig = mcp->cached_gpio;
484 mcp->cached_gpio = gpio;
485 mutex_unlock(&mcp->lock);
488 /* There is no interrupt pending */
492 dev_dbg(mcp->chip.parent,
493 "intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n",
494 intcap, intf, gpio_orig, gpio);
496 for (i = 0; i < mcp->chip.ngpio; i++) {
497 /* We must check all of the inputs on the chip,
498 * otherwise we may not notice a change on >=2 pins.
500 * On at least the mcp23s17, INTCAP is only updated
501 * one byte at a time(INTCAPA and INTCAPB are
502 * not written to at the same time - only on a per-bank
505 * INTF only contains the single bit that caused the
506 * interrupt per-bank. On the mcp23s17, there is
507 * INTFA and INTFB. If two pins are changed on the A
508 * side at the same time, INTF will only have one bit
509 * set. If one pin on the A side and one pin on the B
510 * side are changed at the same time, INTF will have
511 * two bits set. Thus, INTF can't be the only check
512 * to see if the input has changed.
515 intf_set = intf & BIT(i);
516 if (i < 8 && intf_set)
517 intcap_mask = 0x00FF;
518 else if (i >= 8 && intf_set)
519 intcap_mask = 0xFF00;
523 intcap_changed = (intcap_mask &
524 (intcap & BIT(i))) !=
525 (intcap_mask & (BIT(i) & gpio_orig));
526 gpio_set = BIT(i) & gpio;
527 gpio_bit_changed = (BIT(i) & gpio_orig) !=
529 defval_changed = (BIT(i) & intcon) &&
533 if (((gpio_bit_changed || intcap_changed) &&
534 (BIT(i) & mcp->irq_rise) && gpio_set) ||
535 ((gpio_bit_changed || intcap_changed) &&
536 (BIT(i) & mcp->irq_fall) && !gpio_set) ||
538 child_irq = irq_find_mapping(mcp->chip.irq.domain, i);
539 handle_nested_irq(child_irq);
546 static void mcp23s08_irq_mask(struct irq_data *data)
548 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
549 struct mcp23s08 *mcp = gpiochip_get_data(gc);
550 unsigned int pos = data->hwirq;
552 mcp_set_bit(mcp, MCP_GPINTEN, pos, false);
555 static void mcp23s08_irq_unmask(struct irq_data *data)
557 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
558 struct mcp23s08 *mcp = gpiochip_get_data(gc);
559 unsigned int pos = data->hwirq;
561 mcp_set_bit(mcp, MCP_GPINTEN, pos, true);
564 static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
566 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
567 struct mcp23s08 *mcp = gpiochip_get_data(gc);
568 unsigned int pos = data->hwirq;
571 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
572 mcp_set_bit(mcp, MCP_INTCON, pos, false);
573 mcp->irq_rise |= BIT(pos);
574 mcp->irq_fall |= BIT(pos);
575 } else if (type & IRQ_TYPE_EDGE_RISING) {
576 mcp_set_bit(mcp, MCP_INTCON, pos, false);
577 mcp->irq_rise |= BIT(pos);
578 mcp->irq_fall &= ~BIT(pos);
579 } else if (type & IRQ_TYPE_EDGE_FALLING) {
580 mcp_set_bit(mcp, MCP_INTCON, pos, false);
581 mcp->irq_rise &= ~BIT(pos);
582 mcp->irq_fall |= BIT(pos);
583 } else if (type & IRQ_TYPE_LEVEL_HIGH) {
584 mcp_set_bit(mcp, MCP_INTCON, pos, true);
585 mcp_set_bit(mcp, MCP_DEFVAL, pos, false);
586 } else if (type & IRQ_TYPE_LEVEL_LOW) {
587 mcp_set_bit(mcp, MCP_INTCON, pos, true);
588 mcp_set_bit(mcp, MCP_DEFVAL, pos, true);
595 static void mcp23s08_irq_bus_lock(struct irq_data *data)
597 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
598 struct mcp23s08 *mcp = gpiochip_get_data(gc);
600 mutex_lock(&mcp->lock);
601 regcache_cache_only(mcp->regmap, true);
604 static void mcp23s08_irq_bus_unlock(struct irq_data *data)
606 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
607 struct mcp23s08 *mcp = gpiochip_get_data(gc);
609 regcache_cache_only(mcp->regmap, false);
610 regcache_sync(mcp->regmap);
612 mutex_unlock(&mcp->lock);
615 static struct irq_chip mcp23s08_irq_chip = {
616 .name = "gpio-mcp23xxx",
617 .irq_mask = mcp23s08_irq_mask,
618 .irq_unmask = mcp23s08_irq_unmask,
619 .irq_set_type = mcp23s08_irq_set_type,
620 .irq_bus_lock = mcp23s08_irq_bus_lock,
621 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
624 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
626 struct gpio_chip *chip = &mcp->chip;
628 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
630 if (mcp->irq_active_high)
631 irqflags |= IRQF_TRIGGER_HIGH;
633 irqflags |= IRQF_TRIGGER_LOW;
635 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
637 irqflags, dev_name(chip->parent), mcp);
639 dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
644 err = gpiochip_irqchip_add_nested(chip,
650 dev_err(chip->parent,
651 "could not connect irqchip to gpiochip: %d\n", err);
655 gpiochip_set_nested_irqchip(chip,
662 /*----------------------------------------------------------------------*/
664 #ifdef CONFIG_DEBUG_FS
666 #include <linux/seq_file.h>
669 * This compares the chip's registers with the register
670 * cache and corrects any incorrectly set register. This
671 * can be used to fix state for MCP23xxx, that temporary
672 * lost its power supply.
674 #define MCP23S08_CONFIG_REGS 8
675 static int __check_mcp23s08_reg_cache(struct mcp23s08 *mcp)
677 int cached[MCP23S08_CONFIG_REGS];
680 /* read cached config registers */
681 for (i = 0; i < MCP23S08_CONFIG_REGS; i++) {
682 err = mcp_read(mcp, i, &cached[i]);
687 regcache_cache_bypass(mcp->regmap, true);
689 for (i = 0; i < MCP23S08_CONFIG_REGS; i++) {
691 err = mcp_read(mcp, i, &uncached);
695 if (uncached != cached[i]) {
696 dev_err(mcp->dev, "restoring reg 0x%02x from 0x%04x to 0x%04x (power-loss?)\n",
697 i, uncached, cached[i]);
698 mcp_write(mcp, i, cached[i]);
704 dev_err(mcp->dev, "read error: reg=%02x, err=%d", i, err);
705 regcache_cache_bypass(mcp->regmap, false);
710 * This shows more info than the generic gpio dump code:
711 * pullups, deglitching, open drain drive.
713 static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
715 struct mcp23s08 *mcp;
719 int iodir, gpio, gppu;
721 mcp = gpiochip_get_data(chip);
723 /* NOTE: we only handle one bank for now ... */
724 bank = '0' + ((mcp->addr >> 1) & 0x7);
726 mutex_lock(&mcp->lock);
728 t = __check_mcp23s08_reg_cache(mcp);
730 seq_printf(s, " I/O Error\n");
733 t = mcp_read(mcp, MCP_IODIR, &iodir);
735 seq_printf(s, " I/O Error\n");
738 t = mcp_read(mcp, MCP_GPIO, &gpio);
740 seq_printf(s, " I/O Error\n");
743 t = mcp_read(mcp, MCP_GPPU, &gppu);
745 seq_printf(s, " I/O Error\n");
749 for (t = 0, mask = BIT(0); t < chip->ngpio; t++, mask <<= 1) {
752 label = gpiochip_is_requested(chip, t);
756 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
757 chip->base + t, bank, t, label,
758 (iodir & mask) ? "in " : "out",
759 (gpio & mask) ? "hi" : "lo",
760 (gppu & mask) ? "up" : " ");
761 /* NOTE: ignoring the irq-related registers */
765 mutex_unlock(&mcp->lock);
769 #define mcp23s08_dbg_show NULL
772 /*----------------------------------------------------------------------*/
774 static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
775 void *data, unsigned addr, unsigned type,
776 unsigned int base, int cs)
781 mutex_init(&mcp->lock);
785 mcp->irq_active_high = false;
787 mcp->chip.direction_input = mcp23s08_direction_input;
788 mcp->chip.get = mcp23s08_get;
789 mcp->chip.direction_output = mcp23s08_direction_output;
790 mcp->chip.set = mcp23s08_set;
791 mcp->chip.dbg_show = mcp23s08_dbg_show;
792 #ifdef CONFIG_OF_GPIO
793 mcp->chip.of_gpio_n_cells = 2;
794 mcp->chip.of_node = dev->of_node;
798 #ifdef CONFIG_SPI_MASTER
800 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
804 mcp->chip.label = "mcp23s08";
808 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
811 mcp->chip.ngpio = 16;
812 mcp->chip.label = "mcp23s17";
816 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
819 mcp->chip.ngpio = 16;
820 mcp->chip.label = "mcp23s18";
822 #endif /* CONFIG_SPI_MASTER */
824 #if IS_ENABLED(CONFIG_I2C)
826 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x08_regmap);
829 mcp->chip.label = "mcp23008";
833 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x17_regmap);
835 mcp->chip.ngpio = 16;
836 mcp->chip.label = "mcp23017";
840 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x17_regmap);
842 mcp->chip.ngpio = 16;
843 mcp->chip.label = "mcp23018";
845 #endif /* CONFIG_I2C */
848 dev_err(dev, "invalid device type (%d)\n", type);
852 if (IS_ERR(mcp->regmap))
853 return PTR_ERR(mcp->regmap);
855 mcp->chip.base = base;
856 mcp->chip.can_sleep = true;
857 mcp->chip.parent = dev;
858 mcp->chip.owner = THIS_MODULE;
860 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
861 * and MCP_IOCON.HAEN = 1, so we work with all chips.
864 ret = mcp_read(mcp, MCP_IOCON, &status);
868 mcp->irq_controller =
869 device_property_read_bool(dev, "interrupt-controller");
870 if (mcp->irq && mcp->irq_controller) {
871 mcp->irq_active_high =
872 device_property_read_bool(dev,
873 "microchip,irq-active-high");
875 mirror = device_property_read_bool(dev, "microchip,irq-mirror");
878 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
879 mcp->irq_active_high) {
880 /* mcp23s17 has IOCON twice, make sure they are in sync */
881 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
882 status |= IOCON_HAEN | (IOCON_HAEN << 8);
883 if (mcp->irq_active_high)
884 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
886 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
889 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
891 if (type == MCP_TYPE_S18 || type == MCP_TYPE_018)
892 status |= IOCON_INTCC | (IOCON_INTCC << 8);
894 ret = mcp_write(mcp, MCP_IOCON, status);
899 ret = devm_gpiochip_add_data(dev, &mcp->chip, mcp);
903 if (mcp->irq && mcp->irq_controller) {
904 ret = mcp23s08_irq_setup(mcp);
909 mcp->pinctrl_desc.name = "mcp23xxx-pinctrl";
910 mcp->pinctrl_desc.pctlops = &mcp_pinctrl_ops;
911 mcp->pinctrl_desc.confops = &mcp_pinconf_ops;
912 mcp->pinctrl_desc.npins = mcp->chip.ngpio;
913 if (mcp->pinctrl_desc.npins == 8)
914 mcp->pinctrl_desc.pins = mcp23x08_pins;
915 else if (mcp->pinctrl_desc.npins == 16)
916 mcp->pinctrl_desc.pins = mcp23x17_pins;
917 mcp->pinctrl_desc.owner = THIS_MODULE;
919 mcp->pctldev = devm_pinctrl_register(dev, &mcp->pinctrl_desc, mcp);
920 if (IS_ERR(mcp->pctldev)) {
921 ret = PTR_ERR(mcp->pctldev);
927 dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret);
931 /*----------------------------------------------------------------------*/
934 #ifdef CONFIG_SPI_MASTER
935 static const struct of_device_id mcp23s08_spi_of_match[] = {
937 .compatible = "microchip,mcp23s08",
938 .data = (void *) MCP_TYPE_S08,
941 .compatible = "microchip,mcp23s17",
942 .data = (void *) MCP_TYPE_S17,
945 .compatible = "microchip,mcp23s18",
946 .data = (void *) MCP_TYPE_S18,
948 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
950 .compatible = "mcp,mcp23s08",
951 .data = (void *) MCP_TYPE_S08,
954 .compatible = "mcp,mcp23s17",
955 .data = (void *) MCP_TYPE_S17,
959 MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
962 #if IS_ENABLED(CONFIG_I2C)
963 static const struct of_device_id mcp23s08_i2c_of_match[] = {
965 .compatible = "microchip,mcp23008",
966 .data = (void *) MCP_TYPE_008,
969 .compatible = "microchip,mcp23017",
970 .data = (void *) MCP_TYPE_017,
973 .compatible = "microchip,mcp23018",
974 .data = (void *) MCP_TYPE_018,
976 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
978 .compatible = "mcp,mcp23008",
979 .data = (void *) MCP_TYPE_008,
982 .compatible = "mcp,mcp23017",
983 .data = (void *) MCP_TYPE_017,
987 MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
989 #endif /* CONFIG_OF */
992 #if IS_ENABLED(CONFIG_I2C)
994 static int mcp230xx_probe(struct i2c_client *client,
995 const struct i2c_device_id *id)
997 struct mcp23s08_platform_data *pdata, local_pdata;
998 struct mcp23s08 *mcp;
1001 pdata = dev_get_platdata(&client->dev);
1003 pdata = &local_pdata;
1007 mcp = devm_kzalloc(&client->dev, sizeof(*mcp), GFP_KERNEL);
1011 mcp->irq = client->irq;
1012 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
1013 id->driver_data, pdata->base, 0);
1017 i2c_set_clientdata(client, mcp);
1022 static const struct i2c_device_id mcp230xx_id[] = {
1023 { "mcp23008", MCP_TYPE_008 },
1024 { "mcp23017", MCP_TYPE_017 },
1025 { "mcp23018", MCP_TYPE_018 },
1028 MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
1030 static struct i2c_driver mcp230xx_driver = {
1033 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
1035 .probe = mcp230xx_probe,
1036 .id_table = mcp230xx_id,
1039 static int __init mcp23s08_i2c_init(void)
1041 return i2c_add_driver(&mcp230xx_driver);
1044 static void mcp23s08_i2c_exit(void)
1046 i2c_del_driver(&mcp230xx_driver);
1051 static int __init mcp23s08_i2c_init(void) { return 0; }
1052 static void mcp23s08_i2c_exit(void) { }
1054 #endif /* CONFIG_I2C */
1056 /*----------------------------------------------------------------------*/
1058 #ifdef CONFIG_SPI_MASTER
1060 static int mcp23s08_probe(struct spi_device *spi)
1062 struct mcp23s08_platform_data *pdata, local_pdata;
1065 struct mcp23s08_driver_data *data;
1068 const struct of_device_id *match;
1070 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
1072 type = (int)(uintptr_t)match->data;
1074 type = spi_get_device_id(spi)->driver_data;
1076 pdata = dev_get_platdata(&spi->dev);
1078 pdata = &local_pdata;
1081 status = device_property_read_u32(&spi->dev,
1082 "microchip,spi-present-mask", &pdata->spi_present_mask);
1084 status = device_property_read_u32(&spi->dev,
1085 "mcp,spi-present-mask",
1086 &pdata->spi_present_mask);
1089 dev_err(&spi->dev, "missing spi-present-mask");
1095 if (!pdata->spi_present_mask || pdata->spi_present_mask > 0xff) {
1096 dev_err(&spi->dev, "invalid spi-present-mask");
1100 for (addr = 0; addr < MCP_MAX_DEV_PER_CS; addr++) {
1101 if (pdata->spi_present_mask & BIT(addr))
1108 data = devm_kzalloc(&spi->dev,
1109 sizeof(*data) + chips * sizeof(struct mcp23s08),
1114 spi_set_drvdata(spi, data);
1116 for (addr = 0; addr < MCP_MAX_DEV_PER_CS; addr++) {
1117 if (!(pdata->spi_present_mask & BIT(addr)))
1120 data->mcp[addr] = &data->chip[chips];
1121 data->mcp[addr]->irq = spi->irq;
1122 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
1123 0x40 | (addr << 1), type,
1128 if (pdata->base != -1)
1129 pdata->base += data->mcp[addr]->chip.ngpio;
1130 ngpio += data->mcp[addr]->chip.ngpio;
1132 data->ngpio = ngpio;
1137 static const struct spi_device_id mcp23s08_ids[] = {
1138 { "mcp23s08", MCP_TYPE_S08 },
1139 { "mcp23s17", MCP_TYPE_S17 },
1140 { "mcp23s18", MCP_TYPE_S18 },
1143 MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
1145 static struct spi_driver mcp23s08_driver = {
1146 .probe = mcp23s08_probe,
1147 .id_table = mcp23s08_ids,
1150 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1154 static int __init mcp23s08_spi_init(void)
1156 return spi_register_driver(&mcp23s08_driver);
1159 static void mcp23s08_spi_exit(void)
1161 spi_unregister_driver(&mcp23s08_driver);
1166 static int __init mcp23s08_spi_init(void) { return 0; }
1167 static void mcp23s08_spi_exit(void) { }
1169 #endif /* CONFIG_SPI_MASTER */
1171 /*----------------------------------------------------------------------*/
1173 static int __init mcp23s08_init(void)
1177 ret = mcp23s08_spi_init();
1181 ret = mcp23s08_i2c_init();
1188 mcp23s08_spi_exit();
1192 /* register after spi/i2c postcore initcall and before
1193 * subsys initcalls that may rely on these GPIOs
1195 subsys_initcall(mcp23s08_init);
1197 static void __exit mcp23s08_exit(void)
1199 mcp23s08_spi_exit();
1200 mcp23s08_i2c_exit();
1202 module_exit(mcp23s08_exit);
1204 MODULE_LICENSE("GPL");