Merge tag 'asm-generic-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd...
[linux-2.6-microblaze.git] / drivers / pinctrl / pinctrl-amd.h
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * GPIO driver for AMD
4  *
5  * Copyright (c) 2014,2015 Ken Xue <Ken.Xue@amd.com>
6  *              Jeff Wu <Jeff.Wu@amd.com>
7  */
8
9 #ifndef _PINCTRL_AMD_H
10 #define _PINCTRL_AMD_H
11
12 #define AMD_GPIO_PINS_PER_BANK  64
13
14 #define AMD_GPIO_PINS_BANK0     63
15 #define AMD_GPIO_PINS_BANK1     64
16 #define AMD_GPIO_PINS_BANK2     56
17 #define AMD_GPIO_PINS_BANK3     32
18
19 #define WAKE_INT_MASTER_REG 0xfc
20 #define EOI_MASK (1 << 29)
21
22 #define WAKE_INT_STATUS_REG0 0x2f8
23 #define WAKE_INT_STATUS_REG1 0x2fc
24
25 #define DB_TMR_OUT_OFF                  0
26 #define DB_TMR_OUT_UNIT_OFF             4
27 #define DB_CNTRL_OFF                    5
28 #define DB_TMR_LARGE_OFF                7
29 #define LEVEL_TRIG_OFF                  8
30 #define ACTIVE_LEVEL_OFF                9
31 #define INTERRUPT_ENABLE_OFF            11
32 #define INTERRUPT_MASK_OFF              12
33 #define WAKE_CNTRL_OFF_S0I3             13
34 #define WAKE_CNTRL_OFF_S3               14
35 #define WAKE_CNTRL_OFF_S4               15
36 #define PIN_STS_OFF                     16
37 #define DRV_STRENGTH_SEL_OFF            17
38 #define PULL_UP_SEL_OFF                 19
39 #define PULL_UP_ENABLE_OFF              20
40 #define PULL_DOWN_ENABLE_OFF            21
41 #define OUTPUT_VALUE_OFF                22
42 #define OUTPUT_ENABLE_OFF               23
43 #define SW_CNTRL_IN_OFF                 24
44 #define SW_CNTRL_EN_OFF                 25
45 #define INTERRUPT_STS_OFF               28
46 #define WAKE_STS_OFF                    29
47
48 #define DB_TMR_OUT_MASK 0xFUL
49 #define DB_CNTRl_MASK   0x3UL
50 #define ACTIVE_LEVEL_MASK       0x3UL
51 #define DRV_STRENGTH_SEL_MASK   0x3UL
52
53 #define ACTIVE_LEVEL_HIGH       0x0UL
54 #define ACTIVE_LEVEL_LOW        0x1UL
55 #define ACTIVE_LEVEL_BOTH       0x2UL
56
57 #define DB_TYPE_NO_DEBOUNCE               0x0UL
58 #define DB_TYPE_PRESERVE_LOW_GLITCH       0x1UL
59 #define DB_TYPE_PRESERVE_HIGH_GLITCH      0x2UL
60 #define DB_TYPE_REMOVE_GLITCH             0x3UL
61
62 #define EDGE_TRAGGER    0x0UL
63 #define LEVEL_TRIGGER   0x1UL
64
65 #define ACTIVE_HIGH     0x0UL
66 #define ACTIVE_LOW      0x1UL
67 #define BOTH_EADGE      0x2UL
68
69 #define ENABLE_INTERRUPT        0x1UL
70 #define DISABLE_INTERRUPT       0x0UL
71
72 #define ENABLE_INTERRUPT_MASK   0x0UL
73 #define DISABLE_INTERRUPT_MASK  0x1UL
74
75 #define CLR_INTR_STAT   0x1UL
76
77 struct amd_pingroup {
78         const char *name;
79         const unsigned *pins;
80         unsigned npins;
81 };
82
83 struct amd_function {
84         const char *name;
85         const char * const *groups;
86         unsigned ngroups;
87 };
88
89 struct amd_gpio {
90         raw_spinlock_t          lock;
91         void __iomem            *base;
92
93         const struct amd_pingroup *groups;
94         u32 ngroups;
95         struct pinctrl_dev *pctrl;
96         struct gpio_chip        gc;
97         unsigned int            hwbank_num;
98         struct resource         *res;
99         struct platform_device  *pdev;
100         u32                     *saved_regs;
101         int                     irq;
102 };
103
104 /*  KERNCZ configuration*/
105 static const struct pinctrl_pin_desc kerncz_pins[] = {
106         PINCTRL_PIN(0, "GPIO_0"),
107         PINCTRL_PIN(1, "GPIO_1"),
108         PINCTRL_PIN(2, "GPIO_2"),
109         PINCTRL_PIN(3, "GPIO_3"),
110         PINCTRL_PIN(4, "GPIO_4"),
111         PINCTRL_PIN(5, "GPIO_5"),
112         PINCTRL_PIN(6, "GPIO_6"),
113         PINCTRL_PIN(7, "GPIO_7"),
114         PINCTRL_PIN(8, "GPIO_8"),
115         PINCTRL_PIN(9, "GPIO_9"),
116         PINCTRL_PIN(10, "GPIO_10"),
117         PINCTRL_PIN(11, "GPIO_11"),
118         PINCTRL_PIN(12, "GPIO_12"),
119         PINCTRL_PIN(13, "GPIO_13"),
120         PINCTRL_PIN(14, "GPIO_14"),
121         PINCTRL_PIN(15, "GPIO_15"),
122         PINCTRL_PIN(16, "GPIO_16"),
123         PINCTRL_PIN(17, "GPIO_17"),
124         PINCTRL_PIN(18, "GPIO_18"),
125         PINCTRL_PIN(19, "GPIO_19"),
126         PINCTRL_PIN(20, "GPIO_20"),
127         PINCTRL_PIN(21, "GPIO_21"),
128         PINCTRL_PIN(22, "GPIO_22"),
129         PINCTRL_PIN(23, "GPIO_23"),
130         PINCTRL_PIN(24, "GPIO_24"),
131         PINCTRL_PIN(25, "GPIO_25"),
132         PINCTRL_PIN(26, "GPIO_26"),
133         PINCTRL_PIN(27, "GPIO_27"),
134         PINCTRL_PIN(28, "GPIO_28"),
135         PINCTRL_PIN(29, "GPIO_29"),
136         PINCTRL_PIN(30, "GPIO_30"),
137         PINCTRL_PIN(31, "GPIO_31"),
138         PINCTRL_PIN(32, "GPIO_32"),
139         PINCTRL_PIN(33, "GPIO_33"),
140         PINCTRL_PIN(34, "GPIO_34"),
141         PINCTRL_PIN(35, "GPIO_35"),
142         PINCTRL_PIN(36, "GPIO_36"),
143         PINCTRL_PIN(37, "GPIO_37"),
144         PINCTRL_PIN(38, "GPIO_38"),
145         PINCTRL_PIN(39, "GPIO_39"),
146         PINCTRL_PIN(40, "GPIO_40"),
147         PINCTRL_PIN(41, "GPIO_41"),
148         PINCTRL_PIN(42, "GPIO_42"),
149         PINCTRL_PIN(43, "GPIO_43"),
150         PINCTRL_PIN(44, "GPIO_44"),
151         PINCTRL_PIN(45, "GPIO_45"),
152         PINCTRL_PIN(46, "GPIO_46"),
153         PINCTRL_PIN(47, "GPIO_47"),
154         PINCTRL_PIN(48, "GPIO_48"),
155         PINCTRL_PIN(49, "GPIO_49"),
156         PINCTRL_PIN(50, "GPIO_50"),
157         PINCTRL_PIN(51, "GPIO_51"),
158         PINCTRL_PIN(52, "GPIO_52"),
159         PINCTRL_PIN(53, "GPIO_53"),
160         PINCTRL_PIN(54, "GPIO_54"),
161         PINCTRL_PIN(55, "GPIO_55"),
162         PINCTRL_PIN(56, "GPIO_56"),
163         PINCTRL_PIN(57, "GPIO_57"),
164         PINCTRL_PIN(58, "GPIO_58"),
165         PINCTRL_PIN(59, "GPIO_59"),
166         PINCTRL_PIN(60, "GPIO_60"),
167         PINCTRL_PIN(61, "GPIO_61"),
168         PINCTRL_PIN(62, "GPIO_62"),
169         PINCTRL_PIN(64, "GPIO_64"),
170         PINCTRL_PIN(65, "GPIO_65"),
171         PINCTRL_PIN(66, "GPIO_66"),
172         PINCTRL_PIN(67, "GPIO_67"),
173         PINCTRL_PIN(68, "GPIO_68"),
174         PINCTRL_PIN(69, "GPIO_69"),
175         PINCTRL_PIN(70, "GPIO_70"),
176         PINCTRL_PIN(71, "GPIO_71"),
177         PINCTRL_PIN(72, "GPIO_72"),
178         PINCTRL_PIN(73, "GPIO_73"),
179         PINCTRL_PIN(74, "GPIO_74"),
180         PINCTRL_PIN(75, "GPIO_75"),
181         PINCTRL_PIN(76, "GPIO_76"),
182         PINCTRL_PIN(77, "GPIO_77"),
183         PINCTRL_PIN(78, "GPIO_78"),
184         PINCTRL_PIN(79, "GPIO_79"),
185         PINCTRL_PIN(80, "GPIO_80"),
186         PINCTRL_PIN(81, "GPIO_81"),
187         PINCTRL_PIN(82, "GPIO_82"),
188         PINCTRL_PIN(83, "GPIO_83"),
189         PINCTRL_PIN(84, "GPIO_84"),
190         PINCTRL_PIN(85, "GPIO_85"),
191         PINCTRL_PIN(86, "GPIO_86"),
192         PINCTRL_PIN(87, "GPIO_87"),
193         PINCTRL_PIN(88, "GPIO_88"),
194         PINCTRL_PIN(89, "GPIO_89"),
195         PINCTRL_PIN(90, "GPIO_90"),
196         PINCTRL_PIN(91, "GPIO_91"),
197         PINCTRL_PIN(92, "GPIO_92"),
198         PINCTRL_PIN(93, "GPIO_93"),
199         PINCTRL_PIN(94, "GPIO_94"),
200         PINCTRL_PIN(95, "GPIO_95"),
201         PINCTRL_PIN(96, "GPIO_96"),
202         PINCTRL_PIN(97, "GPIO_97"),
203         PINCTRL_PIN(98, "GPIO_98"),
204         PINCTRL_PIN(99, "GPIO_99"),
205         PINCTRL_PIN(100, "GPIO_100"),
206         PINCTRL_PIN(101, "GPIO_101"),
207         PINCTRL_PIN(102, "GPIO_102"),
208         PINCTRL_PIN(103, "GPIO_103"),
209         PINCTRL_PIN(104, "GPIO_104"),
210         PINCTRL_PIN(105, "GPIO_105"),
211         PINCTRL_PIN(106, "GPIO_106"),
212         PINCTRL_PIN(107, "GPIO_107"),
213         PINCTRL_PIN(108, "GPIO_108"),
214         PINCTRL_PIN(109, "GPIO_109"),
215         PINCTRL_PIN(110, "GPIO_110"),
216         PINCTRL_PIN(111, "GPIO_111"),
217         PINCTRL_PIN(112, "GPIO_112"),
218         PINCTRL_PIN(113, "GPIO_113"),
219         PINCTRL_PIN(114, "GPIO_114"),
220         PINCTRL_PIN(115, "GPIO_115"),
221         PINCTRL_PIN(116, "GPIO_116"),
222         PINCTRL_PIN(117, "GPIO_117"),
223         PINCTRL_PIN(118, "GPIO_118"),
224         PINCTRL_PIN(119, "GPIO_119"),
225         PINCTRL_PIN(120, "GPIO_120"),
226         PINCTRL_PIN(121, "GPIO_121"),
227         PINCTRL_PIN(122, "GPIO_122"),
228         PINCTRL_PIN(123, "GPIO_123"),
229         PINCTRL_PIN(124, "GPIO_124"),
230         PINCTRL_PIN(125, "GPIO_125"),
231         PINCTRL_PIN(126, "GPIO_126"),
232         PINCTRL_PIN(127, "GPIO_127"),
233         PINCTRL_PIN(128, "GPIO_128"),
234         PINCTRL_PIN(129, "GPIO_129"),
235         PINCTRL_PIN(130, "GPIO_130"),
236         PINCTRL_PIN(131, "GPIO_131"),
237         PINCTRL_PIN(132, "GPIO_132"),
238         PINCTRL_PIN(133, "GPIO_133"),
239         PINCTRL_PIN(134, "GPIO_134"),
240         PINCTRL_PIN(135, "GPIO_135"),
241         PINCTRL_PIN(136, "GPIO_136"),
242         PINCTRL_PIN(137, "GPIO_137"),
243         PINCTRL_PIN(138, "GPIO_138"),
244         PINCTRL_PIN(139, "GPIO_139"),
245         PINCTRL_PIN(140, "GPIO_140"),
246         PINCTRL_PIN(141, "GPIO_141"),
247         PINCTRL_PIN(142, "GPIO_142"),
248         PINCTRL_PIN(143, "GPIO_143"),
249         PINCTRL_PIN(144, "GPIO_144"),
250         PINCTRL_PIN(145, "GPIO_145"),
251         PINCTRL_PIN(146, "GPIO_146"),
252         PINCTRL_PIN(147, "GPIO_147"),
253         PINCTRL_PIN(148, "GPIO_148"),
254         PINCTRL_PIN(149, "GPIO_149"),
255         PINCTRL_PIN(150, "GPIO_150"),
256         PINCTRL_PIN(151, "GPIO_151"),
257         PINCTRL_PIN(152, "GPIO_152"),
258         PINCTRL_PIN(153, "GPIO_153"),
259         PINCTRL_PIN(154, "GPIO_154"),
260         PINCTRL_PIN(155, "GPIO_155"),
261         PINCTRL_PIN(156, "GPIO_156"),
262         PINCTRL_PIN(157, "GPIO_157"),
263         PINCTRL_PIN(158, "GPIO_158"),
264         PINCTRL_PIN(159, "GPIO_159"),
265         PINCTRL_PIN(160, "GPIO_160"),
266         PINCTRL_PIN(161, "GPIO_161"),
267         PINCTRL_PIN(162, "GPIO_162"),
268         PINCTRL_PIN(163, "GPIO_163"),
269         PINCTRL_PIN(164, "GPIO_164"),
270         PINCTRL_PIN(165, "GPIO_165"),
271         PINCTRL_PIN(166, "GPIO_166"),
272         PINCTRL_PIN(167, "GPIO_167"),
273         PINCTRL_PIN(168, "GPIO_168"),
274         PINCTRL_PIN(169, "GPIO_169"),
275         PINCTRL_PIN(170, "GPIO_170"),
276         PINCTRL_PIN(171, "GPIO_171"),
277         PINCTRL_PIN(172, "GPIO_172"),
278         PINCTRL_PIN(173, "GPIO_173"),
279         PINCTRL_PIN(174, "GPIO_174"),
280         PINCTRL_PIN(175, "GPIO_175"),
281         PINCTRL_PIN(176, "GPIO_176"),
282         PINCTRL_PIN(177, "GPIO_177"),
283         PINCTRL_PIN(178, "GPIO_178"),
284         PINCTRL_PIN(179, "GPIO_179"),
285         PINCTRL_PIN(180, "GPIO_180"),
286         PINCTRL_PIN(181, "GPIO_181"),
287         PINCTRL_PIN(182, "GPIO_182"),
288         PINCTRL_PIN(183, "GPIO_183"),
289 };
290
291 static const unsigned i2c0_pins[] = {145, 146};
292 static const unsigned i2c1_pins[] = {147, 148};
293 static const unsigned i2c2_pins[] = {113, 114};
294 static const unsigned i2c3_pins[] = {19, 20};
295
296 static const unsigned uart0_pins[] = {135, 136, 137, 138, 139};
297 static const unsigned uart1_pins[] = {140, 141, 142, 143, 144};
298
299 static const struct amd_pingroup kerncz_groups[] = {
300         {
301                 .name = "i2c0",
302                 .pins = i2c0_pins,
303                 .npins = 2,
304         },
305         {
306                 .name = "i2c1",
307                 .pins = i2c1_pins,
308                 .npins = 2,
309         },
310         {
311                 .name = "i2c2",
312                 .pins = i2c2_pins,
313                 .npins = 2,
314         },
315         {
316                 .name = "i2c3",
317                 .pins = i2c3_pins,
318                 .npins = 2,
319         },
320         {
321                 .name = "uart0",
322                 .pins = uart0_pins,
323                 .npins = 5,
324         },
325         {
326                 .name = "uart1",
327                 .pins = uart1_pins,
328                 .npins = 5,
329         },
330 };
331
332 #endif