1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Marvell MVEBU pinctrl core driver
5 * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 #include <linux/platform_device.h>
10 #include <linux/slab.h>
13 #include <linux/of_address.h>
14 #include <linux/of_platform.h>
15 #include <linux/err.h>
16 #include <linux/gpio/driver.h>
17 #include <linux/pinctrl/machine.h>
18 #include <linux/pinctrl/pinconf.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 #include <linux/mfd/syscon.h>
22 #include <linux/regmap.h>
24 #include "pinctrl-mvebu.h"
26 #define MPPS_PER_REG 8
30 struct mvebu_pinctrl_function {
36 struct mvebu_pinctrl_group {
38 const struct mvebu_mpp_ctrl *ctrl;
39 struct mvebu_mpp_ctrl_data *data;
40 struct mvebu_mpp_ctrl_setting *settings;
41 unsigned num_settings;
47 struct mvebu_pinctrl {
49 struct pinctrl_dev *pctldev;
50 struct pinctrl_desc desc;
51 struct mvebu_pinctrl_group *groups;
53 struct mvebu_pinctrl_function *functions;
54 unsigned num_functions;
58 int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data,
59 unsigned int pid, unsigned long *config)
61 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
62 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
64 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK;
69 int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data,
70 unsigned int pid, unsigned long config)
72 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
73 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
76 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift);
77 writel(reg | (config << shift), data->base + off);
82 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid(
83 struct mvebu_pinctrl *pctl, unsigned pid)
86 for (n = 0; n < pctl->num_groups; n++) {
87 if (pid >= pctl->groups[n].pins[0] &&
88 pid < pctl->groups[n].pins[0] +
89 pctl->groups[n].npins)
90 return &pctl->groups[n];
95 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_name(
96 struct mvebu_pinctrl *pctl, const char *name)
99 for (n = 0; n < pctl->num_groups; n++) {
100 if (strcmp(name, pctl->groups[n].name) == 0)
101 return &pctl->groups[n];
106 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_val(
107 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
108 unsigned long config)
111 for (n = 0; n < grp->num_settings; n++) {
112 if (config == grp->settings[n].val) {
113 if (!pctl->variant || (pctl->variant &
114 grp->settings[n].variant))
115 return &grp->settings[n];
121 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_name(
122 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
126 for (n = 0; n < grp->num_settings; n++) {
127 if (strcmp(name, grp->settings[n].name) == 0) {
128 if (!pctl->variant || (pctl->variant &
129 grp->settings[n].variant))
130 return &grp->settings[n];
136 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_gpio_setting(
137 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp)
140 for (n = 0; n < grp->num_settings; n++) {
141 if (grp->settings[n].flags &
142 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
143 if (!pctl->variant || (pctl->variant &
144 grp->settings[n].variant))
145 return &grp->settings[n];
151 static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name(
152 struct mvebu_pinctrl *pctl, const char *name)
155 for (n = 0; n < pctl->num_functions; n++) {
156 if (strcmp(name, pctl->functions[n].name) == 0)
157 return &pctl->functions[n];
162 static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,
163 unsigned gid, unsigned long *config)
165 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
166 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
171 return grp->ctrl->mpp_get(grp->data, grp->pins[0], config);
174 static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,
175 unsigned gid, unsigned long *configs,
176 unsigned num_configs)
178 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
179 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
185 for (i = 0; i < num_configs; i++) {
186 ret = grp->ctrl->mpp_set(grp->data, grp->pins[0], configs[i]);
189 } /* for each config */
194 static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
195 struct seq_file *s, unsigned gid)
197 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
198 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
199 struct mvebu_mpp_ctrl_setting *curr;
200 unsigned long config;
203 if (mvebu_pinconf_group_get(pctldev, gid, &config))
206 curr = mvebu_pinctrl_find_setting_by_val(pctl, grp, config);
209 seq_printf(s, "current: %s", curr->name);
211 seq_printf(s, "(%s)", curr->subname);
212 if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
214 if (curr->flags & MVEBU_SETTING_GPI)
216 if (curr->flags & MVEBU_SETTING_GPO)
221 seq_puts(s, "current: UNKNOWN");
224 if (grp->num_settings > 1) {
225 seq_puts(s, ", available = [");
226 for (n = 0; n < grp->num_settings; n++) {
227 if (curr == &grp->settings[n])
230 /* skip unsupported settings for this variant */
232 !(pctl->variant & grp->settings[n].variant))
235 seq_printf(s, " %s", grp->settings[n].name);
236 if (grp->settings[n].subname)
237 seq_printf(s, "(%s)", grp->settings[n].subname);
238 if (grp->settings[n].flags &
239 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
241 if (grp->settings[n].flags & MVEBU_SETTING_GPI)
243 if (grp->settings[n].flags & MVEBU_SETTING_GPO)
252 static const struct pinconf_ops mvebu_pinconf_ops = {
253 .pin_config_group_get = mvebu_pinconf_group_get,
254 .pin_config_group_set = mvebu_pinconf_group_set,
255 .pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show,
258 static int mvebu_pinmux_get_funcs_count(struct pinctrl_dev *pctldev)
260 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
262 return pctl->num_functions;
265 static const char *mvebu_pinmux_get_func_name(struct pinctrl_dev *pctldev,
268 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
270 return pctl->functions[fid].name;
273 static int mvebu_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned fid,
274 const char * const **groups,
275 unsigned * const num_groups)
277 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
279 *groups = pctl->functions[fid].groups;
280 *num_groups = pctl->functions[fid].num_groups;
284 static int mvebu_pinmux_set(struct pinctrl_dev *pctldev, unsigned fid,
287 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
288 struct mvebu_pinctrl_function *func = &pctl->functions[fid];
289 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
290 struct mvebu_mpp_ctrl_setting *setting;
292 unsigned long config;
294 setting = mvebu_pinctrl_find_setting_by_name(pctl, grp,
298 "unable to find setting %s in group %s\n",
299 func->name, func->groups[gid]);
303 config = setting->val;
304 ret = mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1);
306 dev_err(pctl->dev, "cannot set group %s to %s\n",
307 func->groups[gid], func->name);
314 static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
315 struct pinctrl_gpio_range *range, unsigned offset)
317 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
318 struct mvebu_pinctrl_group *grp;
319 struct mvebu_mpp_ctrl_setting *setting;
320 unsigned long config;
322 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
326 if (grp->ctrl->mpp_gpio_req)
327 return grp->ctrl->mpp_gpio_req(grp->data, offset);
329 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
333 config = setting->val;
335 return mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1);
338 static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
339 struct pinctrl_gpio_range *range, unsigned offset, bool input)
341 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
342 struct mvebu_pinctrl_group *grp;
343 struct mvebu_mpp_ctrl_setting *setting;
345 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
349 if (grp->ctrl->mpp_gpio_dir)
350 return grp->ctrl->mpp_gpio_dir(grp->data, offset, input);
352 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
356 if ((input && (setting->flags & MVEBU_SETTING_GPI)) ||
357 (!input && (setting->flags & MVEBU_SETTING_GPO)))
363 static const struct pinmux_ops mvebu_pinmux_ops = {
364 .get_functions_count = mvebu_pinmux_get_funcs_count,
365 .get_function_name = mvebu_pinmux_get_func_name,
366 .get_function_groups = mvebu_pinmux_get_groups,
367 .gpio_request_enable = mvebu_pinmux_gpio_request_enable,
368 .gpio_set_direction = mvebu_pinmux_gpio_set_direction,
369 .set_mux = mvebu_pinmux_set,
372 static int mvebu_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
374 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
375 return pctl->num_groups;
378 static const char *mvebu_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
381 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
382 return pctl->groups[gid].name;
385 static int mvebu_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
386 unsigned gid, const unsigned **pins,
389 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
390 *pins = pctl->groups[gid].pins;
391 *num_pins = pctl->groups[gid].npins;
395 static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
396 struct device_node *np,
397 struct pinctrl_map **map,
400 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
401 struct property *prop;
402 const char *function;
409 ret = of_property_read_string(np, "marvell,function", &function);
412 "missing marvell,function in node %pOFn\n", np);
416 nmaps = of_property_count_strings(np, "marvell,pins");
419 "missing marvell,pins in node %pOFn\n", np);
423 *map = kmalloc_array(nmaps, sizeof(**map), GFP_KERNEL);
428 of_property_for_each_string(np, "marvell,pins", prop, group) {
429 struct mvebu_pinctrl_group *grp =
430 mvebu_pinctrl_find_group_by_name(pctl, group);
433 dev_err(pctl->dev, "unknown pin %s", group);
437 if (!mvebu_pinctrl_find_setting_by_name(pctl, grp, function)) {
438 dev_err(pctl->dev, "unsupported function %s on pin %s",
443 (*map)[n].type = PIN_MAP_TYPE_MUX_GROUP;
444 (*map)[n].data.mux.group = group;
445 (*map)[n].data.mux.function = function;
454 static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
455 struct pinctrl_map *map, unsigned num_maps)
460 static const struct pinctrl_ops mvebu_pinctrl_ops = {
461 .get_groups_count = mvebu_pinctrl_get_groups_count,
462 .get_group_name = mvebu_pinctrl_get_group_name,
463 .get_group_pins = mvebu_pinctrl_get_group_pins,
464 .dt_node_to_map = mvebu_pinctrl_dt_node_to_map,
465 .dt_free_map = mvebu_pinctrl_dt_free_map,
468 static int _add_function(struct mvebu_pinctrl_function *funcs, int *funcsize,
474 while (funcs->num_groups) {
475 /* function already there */
476 if (strcmp(funcs->name, name) == 0) {
483 /* append new unique function */
485 funcs->num_groups = 1;
491 static int mvebu_pinctrl_build_functions(struct platform_device *pdev,
492 struct mvebu_pinctrl *pctl)
494 struct mvebu_pinctrl_function *funcs;
495 int num = 0, funcsize = pctl->desc.npins;
498 /* we allocate functions for number of pins and hope
499 * there are fewer unique functions than pins available */
500 funcs = devm_kcalloc(&pdev->dev,
501 funcsize, sizeof(struct mvebu_pinctrl_function),
506 for (n = 0; n < pctl->num_groups; n++) {
507 struct mvebu_pinctrl_group *grp = &pctl->groups[n];
508 for (s = 0; s < grp->num_settings; s++) {
511 /* skip unsupported settings on this variant */
513 !(pctl->variant & grp->settings[s].variant))
516 /* check for unique functions and count groups */
517 ret = _add_function(funcs, &funcsize,
518 grp->settings[s].name);
519 if (ret == -EOVERFLOW)
521 "More functions than pins(%d)\n",
530 pctl->num_functions = num;
531 pctl->functions = funcs;
533 for (n = 0; n < pctl->num_groups; n++) {
534 struct mvebu_pinctrl_group *grp = &pctl->groups[n];
535 for (s = 0; s < grp->num_settings; s++) {
536 struct mvebu_pinctrl_function *f;
539 /* skip unsupported settings on this variant */
541 !(pctl->variant & grp->settings[s].variant))
544 f = mvebu_pinctrl_find_function_by_name(pctl,
545 grp->settings[s].name);
547 /* allocate group name array if not done already */
549 f->groups = devm_kcalloc(&pdev->dev,
557 /* find next free group name and assign current name */
568 int mvebu_pinctrl_probe(struct platform_device *pdev)
570 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
571 struct mvebu_pinctrl *pctl;
572 struct pinctrl_pin_desc *pdesc;
574 unsigned size, noname = 0;
579 if (!soc || !soc->controls || !soc->modes) {
580 dev_err(&pdev->dev, "wrong pinctrl soc info\n");
584 pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl),
589 pctl->desc.name = dev_name(&pdev->dev);
590 pctl->desc.owner = THIS_MODULE;
591 pctl->desc.pctlops = &mvebu_pinctrl_ops;
592 pctl->desc.pmxops = &mvebu_pinmux_ops;
593 pctl->desc.confops = &mvebu_pinconf_ops;
594 pctl->variant = soc->variant;
595 pctl->dev = &pdev->dev;
596 platform_set_drvdata(pdev, pctl);
598 /* count controls and create names for mvebu generic
599 register controls; also does sanity checks */
600 pctl->num_groups = 0;
601 pctl->desc.npins = 0;
602 for (n = 0; n < soc->ncontrols; n++) {
603 const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
605 pctl->desc.npins += ctrl->npins;
606 /* initialize control's pins[] array */
607 for (k = 0; k < ctrl->npins; k++)
608 ctrl->pins[k] = ctrl->pid + k;
611 * We allow to pass controls with NULL name that we treat
612 * as a range of one-pin groups with generic mvebu register
616 pctl->num_groups += ctrl->npins;
617 noname += ctrl->npins;
619 pctl->num_groups += 1;
623 pdesc = devm_kcalloc(&pdev->dev,
625 sizeof(struct pinctrl_pin_desc),
630 for (n = 0; n < pctl->desc.npins; n++)
632 pctl->desc.pins = pdesc;
635 * allocate groups and name buffers for unnamed groups.
637 size = pctl->num_groups * sizeof(*pctl->groups) + noname * 8;
638 p = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
643 noname_buf = p + pctl->num_groups * sizeof(*pctl->groups);
645 /* assign mpp controls to groups */
647 for (n = 0; n < soc->ncontrols; n++) {
648 const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
649 struct mvebu_mpp_ctrl_data *data = soc->control_data ?
650 &soc->control_data[n] : NULL;
652 pctl->groups[gid].gid = gid;
653 pctl->groups[gid].ctrl = ctrl;
654 pctl->groups[gid].data = data;
655 pctl->groups[gid].name = ctrl->name;
656 pctl->groups[gid].pins = ctrl->pins;
657 pctl->groups[gid].npins = ctrl->npins;
660 * We treat unnamed controls as a range of one-pin groups
661 * with generic mvebu register controls. Use one group for
662 * each in this range and assign a default group name.
665 pctl->groups[gid].name = noname_buf;
666 pctl->groups[gid].npins = 1;
667 sprintf(noname_buf, "mpp%d", ctrl->pid+0);
670 for (k = 1; k < ctrl->npins; k++) {
672 pctl->groups[gid].gid = gid;
673 pctl->groups[gid].ctrl = ctrl;
674 pctl->groups[gid].data = data;
675 pctl->groups[gid].name = noname_buf;
676 pctl->groups[gid].pins = &ctrl->pins[k];
677 pctl->groups[gid].npins = 1;
678 sprintf(noname_buf, "mpp%d", ctrl->pid+k);
685 /* assign mpp modes to groups */
686 for (n = 0; n < soc->nmodes; n++) {
687 struct mvebu_mpp_mode *mode = &soc->modes[n];
688 struct mvebu_mpp_ctrl_setting *set = &mode->settings[0];
689 struct mvebu_pinctrl_group *grp;
690 unsigned num_settings;
691 unsigned supp_settings;
693 for (num_settings = 0, supp_settings = 0; ; set++) {
699 /* skip unsupported settings for this variant */
700 if (pctl->variant && !(pctl->variant & set->variant))
705 /* find gpio/gpo/gpi settings */
706 if (strcmp(set->name, "gpio") == 0)
707 set->flags = MVEBU_SETTING_GPI |
709 else if (strcmp(set->name, "gpo") == 0)
710 set->flags = MVEBU_SETTING_GPO;
711 else if (strcmp(set->name, "gpi") == 0)
712 set->flags = MVEBU_SETTING_GPI;
715 /* skip modes with no settings for this variant */
719 grp = mvebu_pinctrl_find_group_by_pid(pctl, mode->pid);
721 dev_warn(&pdev->dev, "unknown pinctrl group %d\n",
726 grp->settings = mode->settings;
727 grp->num_settings = num_settings;
730 ret = mvebu_pinctrl_build_functions(pdev, pctl);
732 dev_err(&pdev->dev, "unable to build functions\n");
736 pctl->pctldev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl);
737 if (IS_ERR(pctl->pctldev)) {
738 dev_err(&pdev->dev, "unable to register pinctrl driver\n");
739 return PTR_ERR(pctl->pctldev);
742 dev_info(&pdev->dev, "registered pinctrl driver\n");
744 /* register gpio ranges */
745 for (n = 0; n < soc->ngpioranges; n++)
746 pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]);
752 * mvebu_pinctrl_simple_mmio_probe - probe a simple mmio pinctrl
753 * @pdev: platform device (with platform data already attached)
755 * Initialise a simple (single base address) mmio pinctrl driver,
756 * assigning the MMIO base address to all mvebu mpp ctrl instances.
758 int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev)
760 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
761 struct mvebu_mpp_ctrl_data *mpp_data;
762 struct resource *res;
766 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
767 base = devm_ioremap_resource(&pdev->dev, res);
769 return PTR_ERR(base);
771 mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data),
776 for (i = 0; i < soc->ncontrols; i++)
777 mpp_data[i].base = base;
779 soc->control_data = mpp_data;
781 return mvebu_pinctrl_probe(pdev);
784 int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data,
785 unsigned int pid, unsigned long *config)
787 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
788 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
792 err = regmap_read(data->regmap.map, data->regmap.offset + off, &val);
796 *config = (val >> shift) & MVEBU_MPP_MASK;
801 int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data,
802 unsigned int pid, unsigned long config)
804 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
805 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
807 return regmap_update_bits(data->regmap.map, data->regmap.offset + off,
808 MVEBU_MPP_MASK << shift, config << shift);
811 int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev,
812 struct device *syscon_dev, u32 offset)
814 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
815 struct mvebu_mpp_ctrl_data *mpp_data;
816 struct regmap *regmap;
819 regmap = syscon_node_to_regmap(syscon_dev->of_node);
821 return PTR_ERR(regmap);
823 mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data),
828 for (i = 0; i < soc->ncontrols; i++) {
829 mpp_data[i].regmap.map = regmap;
830 mpp_data[i].regmap.offset = offset;
833 soc->control_data = mpp_data;
835 return mvebu_pinctrl_probe(pdev);