1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin
4 * bindings for MediaTek SoC.
6 * Copyright (C) 2018 MediaTek Inc.
7 * Author: Sean Wang <sean.wang@mediatek.com>
8 * Zhiyong Tao <zhiyong.tao@mediatek.com>
9 * Hongzhou.Yang <hongzhou.yang@mediatek.com>
12 #include <linux/gpio/driver.h>
13 #include <linux/module.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
15 #include "pinctrl-paris.h"
17 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
19 /* Custom pinconf parameters */
20 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
21 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
22 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
23 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
24 #define MTK_PIN_CONFIG_DRV_ADV (PIN_CONFIG_END + 5)
26 static const struct pinconf_generic_params mtk_custom_bindings[] = {
27 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0},
28 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0},
29 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
30 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
31 {"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2},
34 #ifdef CONFIG_DEBUG_FS
35 static const struct pin_config_item mtk_conf_items[] = {
36 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
37 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
38 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
39 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
40 PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true),
44 static const char * const mtk_gpio_functions[] = {
45 "func0", "func1", "func2", "func3",
46 "func4", "func5", "func6", "func7",
47 "func8", "func9", "func10", "func11",
48 "func12", "func13", "func14", "func15",
51 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
52 struct pinctrl_gpio_range *range,
55 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
56 const struct mtk_pin_desc *desc;
58 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
60 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
64 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
65 struct pinctrl_gpio_range *range,
66 unsigned int pin, bool input)
68 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
69 const struct mtk_pin_desc *desc;
71 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
73 /* hardware would take 0 as input direction */
74 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
77 static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
78 unsigned int pin, unsigned long *config)
80 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
81 u32 param = pinconf_to_config_param(*config);
82 int pullup, err, reg, ret = 1;
83 const struct mtk_pin_desc *desc;
85 if (pin >= hw->soc->npins) {
89 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
92 case PIN_CONFIG_BIAS_DISABLE:
93 case PIN_CONFIG_BIAS_PULL_UP:
94 case PIN_CONFIG_BIAS_PULL_DOWN:
95 if (hw->soc->bias_get_combo) {
96 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
99 if (param == PIN_CONFIG_BIAS_DISABLE) {
100 if (ret == MTK_PUPD_SET_R1R0_00)
102 } else if (param == PIN_CONFIG_BIAS_PULL_UP) {
103 /* When desire to get pull-up value, return
104 * error if current setting is pull-down
108 } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) {
109 /* When desire to get pull-down value, return
110 * error if current setting is pull-up
119 case PIN_CONFIG_SLEW_RATE:
120 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret);
122 case PIN_CONFIG_INPUT_ENABLE:
123 case PIN_CONFIG_OUTPUT_ENABLE:
124 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
127 /* CONFIG Current direction return value
128 * ------------- ----------------- ----------------------
129 * OUTPUT_ENABLE output 1 (= HW value)
130 * input 0 (= HW value)
131 * INPUT_ENABLE output 0 (= reverse HW value)
132 * input 1 (= reverse HW value)
134 if (param == PIN_CONFIG_INPUT_ENABLE)
138 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
139 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
142 /* return error when in output mode
143 * because schmitt trigger only work in input mode
150 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret);
153 case PIN_CONFIG_DRIVE_STRENGTH:
154 if (hw->soc->drive_get)
155 err = hw->soc->drive_get(hw, desc, &ret);
159 case MTK_PIN_CONFIG_TDSEL:
160 case MTK_PIN_CONFIG_RDSEL:
161 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
162 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
163 err = mtk_hw_get_value(hw, desc, reg, &ret);
165 case MTK_PIN_CONFIG_PU_ADV:
166 case MTK_PIN_CONFIG_PD_ADV:
167 if (hw->soc->adv_pull_get) {
168 pullup = param == MTK_PIN_CONFIG_PU_ADV;
169 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
173 case MTK_PIN_CONFIG_DRV_ADV:
174 if (hw->soc->adv_drive_get)
175 err = hw->soc->adv_drive_get(hw, desc, &ret);
185 *config = pinconf_to_config_packed(param, ret);
190 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
191 enum pin_config_param param,
192 enum pin_config_param arg)
194 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
195 const struct mtk_pin_desc *desc;
199 if (pin >= hw->soc->npins) {
203 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
205 switch ((u32)param) {
206 case PIN_CONFIG_BIAS_DISABLE:
207 if (hw->soc->bias_set_combo)
208 err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE);
212 case PIN_CONFIG_BIAS_PULL_UP:
213 if (hw->soc->bias_set_combo)
214 err = hw->soc->bias_set_combo(hw, desc, 1, arg);
218 case PIN_CONFIG_BIAS_PULL_DOWN:
219 if (hw->soc->bias_set_combo)
220 err = hw->soc->bias_set_combo(hw, desc, 0, arg);
224 case PIN_CONFIG_OUTPUT_ENABLE:
225 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
227 /* Keep set direction to consider the case that a GPIO pin
228 * does not have SMT control
230 if (err != -ENOTSUPP)
233 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
236 case PIN_CONFIG_INPUT_ENABLE:
237 /* regard all non-zero value as enable */
238 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg);
242 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
245 case PIN_CONFIG_SLEW_RATE:
246 /* regard all non-zero value as enable */
247 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg);
249 case PIN_CONFIG_OUTPUT:
250 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
255 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
258 case PIN_CONFIG_INPUT_SCHMITT:
259 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
260 /* arg = 1: Input mode & SMT enable ;
261 * arg = 0: Output mode & SMT disable
263 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg);
267 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg);
269 case PIN_CONFIG_DRIVE_STRENGTH:
270 if (hw->soc->drive_set)
271 err = hw->soc->drive_set(hw, desc, arg);
275 case MTK_PIN_CONFIG_TDSEL:
276 case MTK_PIN_CONFIG_RDSEL:
277 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
278 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
279 err = mtk_hw_set_value(hw, desc, reg, arg);
281 case MTK_PIN_CONFIG_PU_ADV:
282 case MTK_PIN_CONFIG_PD_ADV:
283 if (hw->soc->adv_pull_set) {
286 pullup = param == MTK_PIN_CONFIG_PU_ADV;
287 err = hw->soc->adv_pull_set(hw, desc, pullup,
292 case MTK_PIN_CONFIG_DRV_ADV:
293 if (hw->soc->adv_drive_set)
294 err = hw->soc->adv_drive_set(hw, desc, arg);
306 static struct mtk_pinctrl_group *
307 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin)
311 for (i = 0; i < hw->soc->ngrps; i++) {
312 struct mtk_pinctrl_group *grp = hw->groups + i;
321 static const struct mtk_func_desc *
322 mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum)
324 const struct mtk_pin_desc *pin = hw->soc->pins + pin_num;
325 const struct mtk_func_desc *func = pin->funcs;
327 while (func && func->name) {
328 if (func->muxval == fnum)
336 static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num,
341 for (i = 0; i < hw->soc->npins; i++) {
342 const struct mtk_pin_desc *pin = hw->soc->pins + i;
344 if (pin->number == pin_num) {
345 const struct mtk_func_desc *func = pin->funcs;
347 while (func && func->name) {
348 if (func->muxval == fnum)
360 static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl,
362 struct mtk_pinctrl_group *grp,
363 struct pinctrl_map **map,
364 unsigned *reserved_maps,
369 if (*num_maps == *reserved_maps)
372 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
373 (*map)[*num_maps].data.mux.group = grp->name;
375 ret = mtk_pctrl_is_function_valid(pctl, pin, fnum);
377 dev_err(pctl->dev, "invalid function %d on pin %d .\n",
382 (*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum];
388 static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
389 struct device_node *node,
390 struct pinctrl_map **map,
391 unsigned *reserved_maps,
394 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
395 int num_pins, num_funcs, maps_per_pin, i, err;
396 struct mtk_pinctrl_group *grp;
397 unsigned int num_configs;
398 bool has_config = false;
399 unsigned long *configs;
400 u32 pinfunc, pin, func;
401 struct property *pins;
402 unsigned reserve = 0;
404 pins = of_find_property(node, "pinmux", NULL);
406 dev_err(hw->dev, "missing pins property in node %pOFn .\n",
411 err = pinconf_generic_parse_dt_config(node, pctldev, &configs,
419 num_pins = pins->length / sizeof(u32);
420 num_funcs = num_pins;
424 if (has_config && num_pins >= 1)
427 if (!num_pins || !maps_per_pin) {
432 reserve = num_pins * maps_per_pin;
434 err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps,
439 for (i = 0; i < num_pins; i++) {
440 err = of_property_read_u32_index(node, "pinmux", i, &pinfunc);
444 pin = MTK_GET_PIN_NO(pinfunc);
445 func = MTK_GET_PIN_FUNC(pinfunc);
447 if (pin >= hw->soc->npins ||
448 func >= ARRAY_SIZE(mtk_gpio_functions)) {
449 dev_err(hw->dev, "invalid pins value.\n");
454 grp = mtk_pctrl_find_group_by_pin(hw, pin);
456 dev_err(hw->dev, "unable to match pin %d to group\n",
462 err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map,
463 reserved_maps, num_maps);
468 err = pinctrl_utils_add_map_configs(pctldev, map,
474 PIN_MAP_TYPE_CONFIGS_GROUP);
487 static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
488 struct device_node *np_config,
489 struct pinctrl_map **map,
492 struct device_node *np;
493 unsigned reserved_maps;
500 for_each_child_of_node(np_config, np) {
501 ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map,
505 pinctrl_utils_free_map(pctldev, *map, *num_maps);
514 static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
516 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
518 return hw->soc->ngrps;
521 static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev,
524 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
526 return hw->groups[group].name;
529 static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
530 unsigned group, const unsigned **pins,
533 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
535 *pins = (unsigned *)&hw->groups[group].pin;
541 static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field)
543 const struct mtk_pin_desc *desc;
546 if (gpio >= hw->soc->npins)
549 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
551 err = mtk_hw_get_value(hw, desc, field, &value);
558 #define mtk_pctrl_get_pinmux(hw, gpio) \
559 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE)
561 #define mtk_pctrl_get_direction(hw, gpio) \
562 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DIR)
564 #define mtk_pctrl_get_out(hw, gpio) \
565 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DO)
567 #define mtk_pctrl_get_in(hw, gpio) \
568 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DI)
570 #define mtk_pctrl_get_smt(hw, gpio) \
571 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_SMT)
573 #define mtk_pctrl_get_ies(hw, gpio) \
574 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_IES)
576 #define mtk_pctrl_get_driving(hw, gpio) \
577 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)
579 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
580 unsigned int gpio, char *buf, unsigned int bufLen)
582 int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
583 const struct mtk_pin_desc *desc;
585 if (gpio >= hw->soc->npins)
588 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
589 pinmux = mtk_pctrl_get_pinmux(hw, gpio);
590 if (pinmux >= hw->soc->nfuncs)
591 pinmux -= hw->soc->nfuncs;
593 mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
594 if (pullen == MTK_PUPD_SET_R1R0_00) {
598 } else if (pullen == MTK_PUPD_SET_R1R0_01) {
602 } else if (pullen == MTK_PUPD_SET_R1R0_10) {
606 } else if (pullen == MTK_PUPD_SET_R1R0_11) {
610 } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
613 len += scnprintf(buf + len, bufLen - len,
614 "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
617 mtk_pctrl_get_direction(hw, gpio),
618 mtk_pctrl_get_out(hw, gpio),
619 mtk_pctrl_get_in(hw, gpio),
620 mtk_pctrl_get_driving(hw, gpio),
621 mtk_pctrl_get_smt(hw, gpio),
622 mtk_pctrl_get_ies(hw, gpio),
627 len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n",
630 len += scnprintf(buf + len, bufLen - len, "\n");
635 EXPORT_SYMBOL_GPL(mtk_pctrl_show_one_pin);
637 #define PIN_DBG_BUF_SZ 96
638 static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
641 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
642 char buf[PIN_DBG_BUF_SZ];
644 (void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ);
646 seq_printf(s, "%s", buf);
649 static const struct pinctrl_ops mtk_pctlops = {
650 .dt_node_to_map = mtk_pctrl_dt_node_to_map,
651 .dt_free_map = pinctrl_utils_free_map,
652 .get_groups_count = mtk_pctrl_get_groups_count,
653 .get_group_name = mtk_pctrl_get_group_name,
654 .get_group_pins = mtk_pctrl_get_group_pins,
655 .pin_dbg_show = mtk_pctrl_dbg_show,
658 static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
660 return ARRAY_SIZE(mtk_gpio_functions);
663 static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev,
666 return mtk_gpio_functions[selector];
669 static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
671 const char * const **groups,
672 unsigned * const num_groups)
674 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
676 *groups = hw->grp_names;
677 *num_groups = hw->soc->ngrps;
682 static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev,
686 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
687 struct mtk_pinctrl_group *grp = hw->groups + group;
688 const struct mtk_func_desc *desc_func;
689 const struct mtk_pin_desc *desc;
692 ret = mtk_pctrl_is_function_valid(hw, grp->pin, function);
694 dev_err(hw->dev, "invalid function %d on group %d .\n",
699 desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function);
703 desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin];
704 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval);
709 static const struct pinmux_ops mtk_pmxops = {
710 .get_functions_count = mtk_pmx_get_funcs_cnt,
711 .get_function_name = mtk_pmx_get_func_name,
712 .get_function_groups = mtk_pmx_get_func_groups,
713 .set_mux = mtk_pmx_set_mux,
714 .gpio_set_direction = mtk_pinmux_gpio_set_direction,
715 .gpio_request_enable = mtk_pinmux_gpio_request_enable,
718 static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group,
719 unsigned long *config)
721 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
723 *config = hw->groups[group].config;
728 static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
729 unsigned long *configs, unsigned num_configs)
731 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
732 struct mtk_pinctrl_group *grp = &hw->groups[group];
735 for (i = 0; i < num_configs; i++) {
736 ret = mtk_pinconf_set(pctldev, grp->pin,
737 pinconf_to_config_param(configs[i]),
738 pinconf_to_config_argument(configs[i]));
742 grp->config = configs[i];
748 static const struct pinconf_ops mtk_confops = {
749 .pin_config_get = mtk_pinconf_get,
750 .pin_config_group_get = mtk_pconf_group_get,
751 .pin_config_group_set = mtk_pconf_group_set,
755 static struct pinctrl_desc mtk_desc = {
756 .name = PINCTRL_PINCTRL_DEV,
757 .pctlops = &mtk_pctlops,
758 .pmxops = &mtk_pmxops,
759 .confops = &mtk_confops,
760 .owner = THIS_MODULE,
763 static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
765 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
766 const struct mtk_pin_desc *desc;
769 if (gpio >= hw->soc->npins)
773 * "Virtual" GPIOs are always and only used for interrupts
774 * Since they are only used for interrupts, they are always inputs
776 if (mtk_is_virt_gpio(hw, gpio))
779 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
781 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value);
786 return GPIO_LINE_DIRECTION_OUT;
788 return GPIO_LINE_DIRECTION_IN;
791 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
793 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
794 const struct mtk_pin_desc *desc;
797 if (gpio >= hw->soc->npins)
800 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
802 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
809 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
811 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
812 const struct mtk_pin_desc *desc;
814 if (gpio >= hw->soc->npins)
817 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
819 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
822 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
824 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
826 if (gpio >= hw->soc->npins)
829 return pinctrl_gpio_direction_input(chip->base + gpio);
832 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
835 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
837 if (gpio >= hw->soc->npins)
840 mtk_gpio_set(chip, gpio, value);
842 return pinctrl_gpio_direction_output(chip->base + gpio);
845 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
847 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
848 const struct mtk_pin_desc *desc;
853 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
855 if (desc->eint.eint_n == EINT_NA)
858 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
861 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
862 unsigned long config)
864 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
865 const struct mtk_pin_desc *desc;
868 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
871 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
872 desc->eint.eint_n == EINT_NA)
875 debounce = pinconf_to_config_argument(config);
877 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
880 static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np)
882 struct gpio_chip *chip = &hw->chip;
885 chip->label = PINCTRL_PINCTRL_DEV;
886 chip->parent = hw->dev;
887 chip->request = gpiochip_generic_request;
888 chip->free = gpiochip_generic_free;
889 chip->get_direction = mtk_gpio_get_direction;
890 chip->direction_input = mtk_gpio_direction_input;
891 chip->direction_output = mtk_gpio_direction_output;
892 chip->get = mtk_gpio_get;
893 chip->set = mtk_gpio_set;
894 chip->to_irq = mtk_gpio_to_irq,
895 chip->set_config = mtk_gpio_set_config,
897 chip->ngpio = hw->soc->npins;
899 chip->of_gpio_n_cells = 2;
901 ret = gpiochip_add_data(chip, hw);
908 static int mtk_pctrl_build_state(struct platform_device *pdev)
910 struct mtk_pinctrl *hw = platform_get_drvdata(pdev);
913 /* Allocate groups */
914 hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
915 sizeof(*hw->groups), GFP_KERNEL);
919 /* We assume that one pin is one group, use pin name as group name. */
920 hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
921 sizeof(*hw->grp_names), GFP_KERNEL);
925 for (i = 0; i < hw->soc->npins; i++) {
926 const struct mtk_pin_desc *pin = hw->soc->pins + i;
927 struct mtk_pinctrl_group *group = hw->groups + i;
929 group->name = pin->name;
930 group->pin = pin->number;
932 hw->grp_names[i] = pin->name;
938 int mtk_paris_pinctrl_probe(struct platform_device *pdev,
939 const struct mtk_pin_soc *soc)
941 struct pinctrl_pin_desc *pins;
942 struct mtk_pinctrl *hw;
943 struct resource *res;
946 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
950 platform_set_drvdata(pdev, hw);
952 hw->dev = &pdev->dev;
954 if (!hw->soc->nbase_names) {
956 "SoC should be assigned at least one register base\n");
960 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
961 sizeof(*hw->base), GFP_KERNEL);
965 for (i = 0; i < hw->soc->nbase_names; i++) {
966 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
967 hw->soc->base_names[i]);
969 dev_err(&pdev->dev, "missing IO resource\n");
973 hw->base[i] = devm_ioremap_resource(&pdev->dev, res);
974 if (IS_ERR(hw->base[i]))
975 return PTR_ERR(hw->base[i]);
978 hw->nbase = hw->soc->nbase_names;
980 err = mtk_pctrl_build_state(pdev);
982 dev_err(&pdev->dev, "build state failed: %d\n", err);
986 /* Copy from internal struct mtk_pin_desc to register to the core */
987 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
992 for (i = 0; i < hw->soc->npins; i++) {
993 pins[i].number = hw->soc->pins[i].number;
994 pins[i].name = hw->soc->pins[i].name;
997 /* Setup pins descriptions per SoC types */
998 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
999 mtk_desc.npins = hw->soc->npins;
1000 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
1001 mtk_desc.custom_params = mtk_custom_bindings;
1002 #ifdef CONFIG_DEBUG_FS
1003 mtk_desc.custom_conf_items = mtk_conf_items;
1006 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
1011 err = pinctrl_enable(hw->pctrl);
1015 err = mtk_build_eint(hw, pdev);
1017 dev_warn(&pdev->dev,
1018 "Failed to add EINT, but pinctrl still can work\n");
1020 /* Build gpiochip should be after pinctrl_enable is done */
1021 err = mtk_build_gpiochip(hw, pdev->dev.of_node);
1023 dev_err(&pdev->dev, "Failed to add gpio_chip\n");
1027 platform_set_drvdata(pdev, hw);
1031 EXPORT_SYMBOL_GPL(mtk_paris_pinctrl_probe);
1033 static int mtk_paris_pinctrl_suspend(struct device *device)
1035 struct mtk_pinctrl *pctl = dev_get_drvdata(device);
1037 return mtk_eint_do_suspend(pctl->eint);
1040 static int mtk_paris_pinctrl_resume(struct device *device)
1042 struct mtk_pinctrl *pctl = dev_get_drvdata(device);
1044 return mtk_eint_do_resume(pctl->eint);
1047 const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = {
1048 .suspend_noirq = mtk_paris_pinctrl_suspend,
1049 .resume_noirq = mtk_paris_pinctrl_resume,
1052 MODULE_LICENSE("GPL v2");
1053 MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Paris");