1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding
4 * pinctrl-bindings.txt for MediaTek SoC.
6 * Copyright (C) 2017-2018 MediaTek Inc.
7 * Author: Sean Wang <sean.wang@mediatek.com>
11 #include <dt-bindings/pinctrl/mt65xx.h>
12 #include <linux/gpio/driver.h>
14 #include <linux/pinctrl/consumer.h>
16 #include "pinctrl-moore.h"
18 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
20 /* Custom pinconf parameters */
21 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
22 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
23 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
24 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
26 static const struct pinconf_generic_params mtk_custom_bindings[] = {
27 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0},
28 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0},
29 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
30 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
33 #ifdef CONFIG_DEBUG_FS
34 static const struct pin_config_item mtk_conf_items[] = {
35 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
36 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
37 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
38 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
42 static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
43 unsigned int selector, unsigned int group)
45 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
46 struct function_desc *func;
47 struct group_desc *grp;
50 func = pinmux_generic_get_function(pctldev, selector);
54 grp = pinctrl_generic_get_group(pctldev, group);
58 dev_dbg(pctldev->dev, "enable function %s group %s\n",
59 func->name, grp->grp.name);
61 for (i = 0; i < grp->grp.npins; i++) {
62 const struct mtk_pin_desc *desc;
63 int *pin_modes = grp->data;
64 int pin = grp->grp.pins[i];
66 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
70 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
80 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
81 struct pinctrl_gpio_range *range,
84 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
85 const struct mtk_pin_desc *desc;
87 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
91 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
95 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
96 struct pinctrl_gpio_range *range,
97 unsigned int pin, bool input)
99 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
100 const struct mtk_pin_desc *desc;
102 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
106 /* hardware would take 0 as input direction */
107 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
110 static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
111 unsigned int pin, unsigned long *config)
113 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
114 u32 param = pinconf_to_config_param(*config);
115 int val, val2, err, pullup, reg, ret = 1;
116 const struct mtk_pin_desc *desc;
118 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
123 case PIN_CONFIG_BIAS_DISABLE:
124 if (hw->soc->bias_get_combo) {
125 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
128 if (ret != MTK_PUPD_SET_R1R0_00 && ret != MTK_DISABLE)
130 } else if (hw->soc->bias_disable_get) {
131 err = hw->soc->bias_disable_get(hw, desc, &ret);
138 case PIN_CONFIG_BIAS_PULL_UP:
139 if (hw->soc->bias_get_combo) {
140 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
143 if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE)
147 } else if (hw->soc->bias_get) {
148 err = hw->soc->bias_get(hw, desc, 1, &ret);
155 case PIN_CONFIG_BIAS_PULL_DOWN:
156 if (hw->soc->bias_get_combo) {
157 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
160 if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE)
164 } else if (hw->soc->bias_get) {
165 err = hw->soc->bias_get(hw, desc, 0, &ret);
172 case PIN_CONFIG_SLEW_RATE:
173 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val);
181 case PIN_CONFIG_INPUT_ENABLE:
182 case PIN_CONFIG_OUTPUT_ENABLE:
183 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
187 /* HW takes input mode as zero; output mode as non-zero */
188 if ((val && param == PIN_CONFIG_INPUT_ENABLE) ||
189 (!val && param == PIN_CONFIG_OUTPUT_ENABLE))
193 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
194 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
198 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2);
206 case PIN_CONFIG_DRIVE_STRENGTH:
207 if (hw->soc->drive_get) {
208 err = hw->soc->drive_get(hw, desc, &ret);
215 case MTK_PIN_CONFIG_TDSEL:
216 case MTK_PIN_CONFIG_RDSEL:
217 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
218 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
220 err = mtk_hw_get_value(hw, desc, reg, &val);
227 case MTK_PIN_CONFIG_PU_ADV:
228 case MTK_PIN_CONFIG_PD_ADV:
229 if (hw->soc->adv_pull_get) {
232 pullup = param == MTK_PIN_CONFIG_PU_ADV;
233 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
244 *config = pinconf_to_config_packed(param, ret);
249 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
250 unsigned long *configs, unsigned int num_configs)
252 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
253 const struct mtk_pin_desc *desc;
257 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
261 for (cfg = 0; cfg < num_configs; cfg++) {
262 param = pinconf_to_config_param(configs[cfg]);
263 arg = pinconf_to_config_argument(configs[cfg]);
266 case PIN_CONFIG_BIAS_DISABLE:
267 if (hw->soc->bias_set_combo) {
268 err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE);
271 } else if (hw->soc->bias_disable_set) {
272 err = hw->soc->bias_disable_set(hw, desc);
279 case PIN_CONFIG_BIAS_PULL_UP:
280 if (hw->soc->bias_set_combo) {
281 err = hw->soc->bias_set_combo(hw, desc, 1, arg);
284 } else if (hw->soc->bias_set) {
285 err = hw->soc->bias_set(hw, desc, 1);
292 case PIN_CONFIG_BIAS_PULL_DOWN:
293 if (hw->soc->bias_set_combo) {
294 err = hw->soc->bias_set_combo(hw, desc, 0, arg);
297 } else if (hw->soc->bias_set) {
298 err = hw->soc->bias_set(hw, desc, 0);
305 case PIN_CONFIG_OUTPUT_ENABLE:
306 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
311 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
316 case PIN_CONFIG_INPUT_ENABLE:
318 if (hw->soc->ies_present) {
319 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES,
323 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
328 case PIN_CONFIG_SLEW_RATE:
329 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR,
335 case PIN_CONFIG_OUTPUT:
336 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
341 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
346 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
347 /* arg = 1: Input mode & SMT enable ;
348 * arg = 0: Output mode & SMT disable
351 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
356 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
361 case PIN_CONFIG_DRIVE_STRENGTH:
362 if (hw->soc->drive_set) {
363 err = hw->soc->drive_set(hw, desc, arg);
370 case MTK_PIN_CONFIG_TDSEL:
371 case MTK_PIN_CONFIG_RDSEL:
372 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
373 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
375 err = mtk_hw_set_value(hw, desc, reg, arg);
379 case MTK_PIN_CONFIG_PU_ADV:
380 case MTK_PIN_CONFIG_PD_ADV:
381 if (hw->soc->adv_pull_set) {
384 pullup = param == MTK_PIN_CONFIG_PU_ADV;
385 err = hw->soc->adv_pull_set(hw, desc, pullup,
401 static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev,
402 unsigned int group, unsigned long *config)
404 const unsigned int *pins;
405 unsigned int i, npins, old = 0;
408 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
412 for (i = 0; i < npins; i++) {
413 if (mtk_pinconf_get(pctldev, pins[i], config))
416 /* configs do not match between two pins */
417 if (i && old != *config)
426 static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev,
427 unsigned int group, unsigned long *configs,
428 unsigned int num_configs)
430 const unsigned int *pins;
431 unsigned int i, npins;
434 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
438 for (i = 0; i < npins; i++) {
439 ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs);
447 static const struct pinctrl_ops mtk_pctlops = {
448 .get_groups_count = pinctrl_generic_get_group_count,
449 .get_group_name = pinctrl_generic_get_group_name,
450 .get_group_pins = pinctrl_generic_get_group_pins,
451 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
452 .dt_free_map = pinconf_generic_dt_free_map,
455 static const struct pinmux_ops mtk_pmxops = {
456 .get_functions_count = pinmux_generic_get_function_count,
457 .get_function_name = pinmux_generic_get_function_name,
458 .get_function_groups = pinmux_generic_get_function_groups,
459 .set_mux = mtk_pinmux_set_mux,
460 .gpio_request_enable = mtk_pinmux_gpio_request_enable,
461 .gpio_set_direction = mtk_pinmux_gpio_set_direction,
465 static const struct pinconf_ops mtk_confops = {
467 .pin_config_get = mtk_pinconf_get,
468 .pin_config_set = mtk_pinconf_set,
469 .pin_config_group_get = mtk_pinconf_group_get,
470 .pin_config_group_set = mtk_pinconf_group_set,
471 .pin_config_config_dbg_show = pinconf_generic_dump_config,
474 static struct pinctrl_desc mtk_desc = {
475 .name = PINCTRL_PINCTRL_DEV,
476 .pctlops = &mtk_pctlops,
477 .pmxops = &mtk_pmxops,
478 .confops = &mtk_confops,
479 .owner = THIS_MODULE,
482 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
484 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
485 const struct mtk_pin_desc *desc;
488 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
492 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
499 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
501 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
502 const struct mtk_pin_desc *desc;
504 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
506 dev_err(hw->dev, "Failed to set gpio %d\n", gpio);
510 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
513 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
516 mtk_gpio_set(chip, gpio, value);
518 return pinctrl_gpio_direction_output(chip, gpio);
521 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
523 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
524 const struct mtk_pin_desc *desc;
529 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
531 if (desc->eint.eint_n == (u16)EINT_NA)
534 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
537 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
538 unsigned long config)
540 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
541 const struct mtk_pin_desc *desc;
544 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
549 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
550 desc->eint.eint_n == (u16)EINT_NA)
553 debounce = pinconf_to_config_argument(config);
555 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
558 static int mtk_build_gpiochip(struct mtk_pinctrl *hw)
560 struct gpio_chip *chip = &hw->chip;
563 chip->label = PINCTRL_PINCTRL_DEV;
564 chip->parent = hw->dev;
565 chip->request = gpiochip_generic_request;
566 chip->free = gpiochip_generic_free;
567 chip->direction_input = pinctrl_gpio_direction_input;
568 chip->direction_output = mtk_gpio_direction_output;
569 chip->get = mtk_gpio_get;
570 chip->set = mtk_gpio_set;
571 chip->to_irq = mtk_gpio_to_irq;
572 chip->set_config = mtk_gpio_set_config;
574 chip->ngpio = hw->soc->npins;
576 ret = gpiochip_add_data(chip, hw);
580 /* Just for backward compatible for these old pinctrl nodes without
581 * "gpio-ranges" property. Otherwise, called directly from a
582 * DeviceTree-supported pinctrl driver is DEPRECATED.
583 * Please see Section 2.1 of
584 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
585 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
587 if (!of_property_present(hw->dev->of_node, "gpio-ranges")) {
588 ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0,
591 gpiochip_remove(chip);
599 static int mtk_build_groups(struct mtk_pinctrl *hw)
603 for (i = 0; i < hw->soc->ngrps; i++) {
604 const struct group_desc *group = hw->soc->grps + i;
605 const struct pingroup *grp = &group->grp;
607 err = pinctrl_generic_add_group(hw->pctrl, grp->name, grp->pins, grp->npins,
610 dev_err(hw->dev, "Failed to register group %s\n", grp->name);
618 static int mtk_build_functions(struct mtk_pinctrl *hw)
622 for (i = 0; i < hw->soc->nfuncs ; i++) {
623 const struct function_desc *func = hw->soc->funcs + i;
625 err = pinmux_generic_add_function(hw->pctrl, func->name,
627 func->num_group_names,
630 dev_err(hw->dev, "Failed to register function %s\n",
639 int mtk_moore_pinctrl_probe(struct platform_device *pdev,
640 const struct mtk_pin_soc *soc)
642 struct device *dev = &pdev->dev;
643 struct pinctrl_pin_desc *pins;
644 struct mtk_pinctrl *hw;
647 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
652 hw->dev = &pdev->dev;
654 if (!hw->soc->nbase_names)
655 return dev_err_probe(dev, -EINVAL,
656 "SoC should be assigned at least one register base\n");
658 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
659 sizeof(*hw->base), GFP_KERNEL);
663 for (i = 0; i < hw->soc->nbase_names; i++) {
664 hw->base[i] = devm_platform_ioremap_resource_byname(pdev,
665 hw->soc->base_names[i]);
666 if (IS_ERR(hw->base[i]))
667 return PTR_ERR(hw->base[i]);
670 hw->nbase = hw->soc->nbase_names;
672 spin_lock_init(&hw->lock);
674 /* Copy from internal struct mtk_pin_desc to register to the core */
675 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
680 for (i = 0; i < hw->soc->npins; i++) {
681 pins[i].number = hw->soc->pins[i].number;
682 pins[i].name = hw->soc->pins[i].name;
685 /* Setup pins descriptions per SoC types */
686 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
687 mtk_desc.npins = hw->soc->npins;
688 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
689 mtk_desc.custom_params = mtk_custom_bindings;
690 #ifdef CONFIG_DEBUG_FS
691 mtk_desc.custom_conf_items = mtk_conf_items;
694 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
699 /* Setup groups descriptions per SoC types */
700 err = mtk_build_groups(hw);
702 return dev_err_probe(dev, err, "Failed to build groups\n");
704 /* Setup functions descriptions per SoC types */
705 err = mtk_build_functions(hw);
707 return dev_err_probe(dev, err, "Failed to build functions\n");
709 /* For able to make pinctrl_claim_hogs, we must not enable pinctrl
710 * until all groups and functions are being added one.
712 err = pinctrl_enable(hw->pctrl);
716 err = mtk_build_eint(hw, pdev);
719 "Failed to add EINT, but pinctrl still can work\n");
721 /* Build gpiochip should be after pinctrl_enable is done */
722 err = mtk_build_gpiochip(hw);
724 return dev_err_probe(dev, err, "Failed to add gpio_chip\n");
726 platform_set_drvdata(pdev, hw);