drivers/pinctrl/intel/pinctrl-meteorlake.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Intel Meteor Lake PCH pinctrl/GPIO driver
   4  *
   5  * Copyright (C) 2022, Intel Corporation
   6  * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
   7  */
   8
   9 #include <linux/mod_devicetable.h>
  10 #include <linux/module.h>
  11 #include <linux/platform_device.h>
  12
  13 #include <linux/pinctrl/pinctrl.h>
  14
  15 #include "pinctrl-intel.h"
  16
  17 #define MTL_P_PAD_OWN           0x0b0
  18 #define MTL_P_PADCFGLOCK        0x110
  19 #define MTL_P_HOSTSW_OWN        0x140
  20 #define MTL_P_GPI_IS            0x200
  21 #define MTL_P_GPI_IE            0x210
  22
  23 #define MTL_GPP(r, s, e, g)                             \
  24         {                                               \
  25                 .reg_num = (r),                         \
  26                 .base = (s),                            \
  27                 .size = ((e) - (s) + 1),                \
  28                 .gpio_base = (g),                       \
  29         }
  30
  31 #define MTL_COMMUNITY(b, s, e, g)                       \
  32         INTEL_COMMUNITY_GPPS(b, s, e, g, MTL_P)
  33
  34 /* Meteor Lake-P */
  35 static const struct pinctrl_pin_desc mtlp_pins[] = {
  36         /* CPU */
  37         PINCTRL_PIN(0, "PECI"),
  38         PINCTRL_PIN(1, "UFS_RESET_B"),
  39         PINCTRL_PIN(2, "VIDSOUT"),
  40         PINCTRL_PIN(3, "VIDSCK"),
  41         PINCTRL_PIN(4, "VIDALERT_B"),
  42         /* GPP_V */
  43         PINCTRL_PIN(5, "BATLOW_B"),
  44         PINCTRL_PIN(6, "AC_PRESENT"),
  45         PINCTRL_PIN(7, "SOC_WAKE_B"),
  46         PINCTRL_PIN(8, "PWRBTN_B"),
  47         PINCTRL_PIN(9, "SLP_S3_B"),
  48         PINCTRL_PIN(10, "SLP_S4_B"),
  49         PINCTRL_PIN(11, "SLP_A_B"),
  50         PINCTRL_PIN(12, "GPP_V_7"),
  51         PINCTRL_PIN(13, "SUSCLK"),
  52         PINCTRL_PIN(14, "SLP_WLAN_B"),
  53         PINCTRL_PIN(15, "SLP_S5_B"),
  54         PINCTRL_PIN(16, "LANPHYPC"),
  55         PINCTRL_PIN(17, "SLP_LAN_B"),
  56         PINCTRL_PIN(18, "GPP_V_13"),
  57         PINCTRL_PIN(19, "WAKE_B"),
  58         PINCTRL_PIN(20, "GPP_V_15"),
  59         PINCTRL_PIN(21, "GPP_V_16"),
  60         PINCTRL_PIN(22, "GPP_V_17"),
  61         PINCTRL_PIN(23, "GPP_V_18"),
  62         PINCTRL_PIN(24, "CATERR_B"),
  63         PINCTRL_PIN(25, "PROCHOT_B"),
  64         PINCTRL_PIN(26, "THERMTRIP_B"),
  65         PINCTRL_PIN(27, "DSI_DE_TE_2_GENLOCK_REF"),
  66         PINCTRL_PIN(28, "DSI_DE_TE_1_DISP_UTILS"),
  67         /* GPP_C */
  68         PINCTRL_PIN(29, "SMBCLK"),
  69         PINCTRL_PIN(30, "SMBDATA"),
  70         PINCTRL_PIN(31, "SMBALERT_B"),
  71         PINCTRL_PIN(32, "SML0CLK"),
  72         PINCTRL_PIN(33, "SML0DATA"),
  73         PINCTRL_PIN(34, "GPP_C_5"),
  74         PINCTRL_PIN(35, "GPP_C_6"),
  75         PINCTRL_PIN(36, "GPP_C_7"),
  76         PINCTRL_PIN(37, "GPP_C_8"),
  77         PINCTRL_PIN(38, "GPP_C_9"),
  78         PINCTRL_PIN(39, "GPP_C_10"),
  79         PINCTRL_PIN(40, "GPP_C_11"),
  80         PINCTRL_PIN(41, "GPP_C_12"),
  81         PINCTRL_PIN(42, "GPP_C_13"),
  82         PINCTRL_PIN(43, "GPP_C_14"),
  83         PINCTRL_PIN(44, "GPP_C_15"),
  84         PINCTRL_PIN(45, "GPP_C_16"),
  85         PINCTRL_PIN(46, "GPP_C_17"),
  86         PINCTRL_PIN(47, "GPP_C_18"),
  87         PINCTRL_PIN(48, "GPP_C_19"),
  88         PINCTRL_PIN(49, "GPP_C_20"),
  89         PINCTRL_PIN(50, "GPP_C_21"),
  90         PINCTRL_PIN(51, "GPP_C_22"),
  91         PINCTRL_PIN(52, "GPP_C_23"),
  92         /* GPP_A */
  93         PINCTRL_PIN(53, "ESPI_IO_0"),
  94         PINCTRL_PIN(54, "ESPI_IO_1"),
  95         PINCTRL_PIN(55, "ESPI_IO_2"),
  96         PINCTRL_PIN(56, "ESPI_IO_3"),
  97         PINCTRL_PIN(57, "ESPI_CS0_B"),
  98         PINCTRL_PIN(58, "ESPI_CLK"),
  99         PINCTRL_PIN(59, "ESPI_RESET_B"),
 100         PINCTRL_PIN(60, "GPP_A_7"),
 101         PINCTRL_PIN(61, "GPP_A_8"),
 102         PINCTRL_PIN(62, "GPP_A_9"),
 103         PINCTRL_PIN(63, "GPP_A_10"),
 104         PINCTRL_PIN(64, "GPP_A_11"),
 105         PINCTRL_PIN(65, "GPP_A_12"),
 106         PINCTRL_PIN(66, "ESPI_CS1_B"),
 107         PINCTRL_PIN(67, "ESPI_CS2_B"),
 108         PINCTRL_PIN(68, "ESPI_CS3_B"),
 109         PINCTRL_PIN(69, "ESPI_ALERT0_B"),
 110         PINCTRL_PIN(70, "ESPI_ALERT1_B"),
 111         PINCTRL_PIN(71, "ESPI_ALERT2_B"),
 112         PINCTRL_PIN(72, "ESPI_ALERT3_B"),
 113         PINCTRL_PIN(73, "GPP_A_20"),
 114         PINCTRL_PIN(74, "GPP_A_21"),
 115         PINCTRL_PIN(75, "GPP_A_22"),
 116         PINCTRL_PIN(76, "GPP_A_23"),
 117         PINCTRL_PIN(77, "ESPI_CLK_LOOPBK"),
 118         /* GPP_E */
 119         PINCTRL_PIN(78, "GPP_E_0"),
 120         PINCTRL_PIN(79, "GPP_E_1"),
 121         PINCTRL_PIN(80, "GPP_E_2"),
 122         PINCTRL_PIN(81, "GPP_E_3"),
 123         PINCTRL_PIN(82, "GPP_E_4"),
 124         PINCTRL_PIN(83, "GPP_E_5"),
 125         PINCTRL_PIN(84, "GPP_E_6"),
 126         PINCTRL_PIN(85, "GPP_E_7"),
 127         PINCTRL_PIN(86, "GPP_E_8"),
 128         PINCTRL_PIN(87, "GPP_E_9"),
 129         PINCTRL_PIN(88, "GPP_E_10"),
 130         PINCTRL_PIN(89, "GPP_E_11"),
 131         PINCTRL_PIN(90, "GPP_E_12"),
 132         PINCTRL_PIN(91, "GPP_E_13"),
 133         PINCTRL_PIN(92, "GPP_E_14"),
 134         PINCTRL_PIN(93, "SLP_DRAM_B"),
 135         PINCTRL_PIN(94, "GPP_E_16"),
 136         PINCTRL_PIN(95, "GPP_E_17"),
 137         PINCTRL_PIN(96, "GPP_E_18"),
 138         PINCTRL_PIN(97, "GPP_E_19"),
 139         PINCTRL_PIN(98, "GPP_E_20"),
 140         PINCTRL_PIN(99, "GPP_E_21"),
 141         PINCTRL_PIN(100, "DNX_FORCE_RELOAD"),
 142         PINCTRL_PIN(101, "GPP_E_23"),
 143         PINCTRL_PIN(102, "THC0_GSPI0_CLK_LOOPBK"),
 144         /* GPP_H */
 145         PINCTRL_PIN(103, "GPP_H_0"),
 146         PINCTRL_PIN(104, "GPP_H_1"),
 147         PINCTRL_PIN(105, "GPP_H_2"),
 148         PINCTRL_PIN(106, "GPP_H_3"),
 149         PINCTRL_PIN(107, "GPP_H_4"),
 150         PINCTRL_PIN(108, "GPP_H_5"),
 151         PINCTRL_PIN(109, "GPP_H_6"),
 152         PINCTRL_PIN(110, "GPP_H_7"),
 153         PINCTRL_PIN(111, "GPP_H_8"),
 154         PINCTRL_PIN(112, "GPP_H_9"),
 155         PINCTRL_PIN(113, "GPP_H_10"),
 156         PINCTRL_PIN(114, "GPP_H_11"),
 157         PINCTRL_PIN(115, "GPP_H_12"),
 158         PINCTRL_PIN(116, "CPU_C10_GATE_B"),
 159         PINCTRL_PIN(117, "GPP_H_14"),
 160         PINCTRL_PIN(118, "GPP_H_15"),
 161         PINCTRL_PIN(119, "GPP_H_16"),
 162         PINCTRL_PIN(120, "GPP_H_17"),
 163         PINCTRL_PIN(121, "GPP_H_18"),
 164         PINCTRL_PIN(122, "GPP_H_19"),
 165         PINCTRL_PIN(123, "GPP_H_20"),
 166         PINCTRL_PIN(124, "GPP_H_21"),
 167         PINCTRL_PIN(125, "GPP_H_22"),
 168         PINCTRL_PIN(126, "GPP_H_23"),
 169         PINCTRL_PIN(127, "LPI3C1_CLK_LOOPBK"),
 170         PINCTRL_PIN(128, "I3C0_CLK_LOOPBK"),
 171         /* GPP_F */
 172         PINCTRL_PIN(129, "CNV_BRI_DT"),
 173         PINCTRL_PIN(130, "CNV_BRI_RSP"),
 174         PINCTRL_PIN(131, "CNV_RGI_DT"),
 175         PINCTRL_PIN(132, "CNV_RGI_RSP"),
 176         PINCTRL_PIN(133, "CNV_RF_RESET_B"),
 177         PINCTRL_PIN(134, "CRF_CLKREQ"),
 178         PINCTRL_PIN(135, "GPP_F_6"),
 179         PINCTRL_PIN(136, "FUSA_DIAGTEST_EN"),
 180         PINCTRL_PIN(137, "FUSA_DIAGTEST_MODE"),
 181         PINCTRL_PIN(138, "BOOTMPC"),
 182         PINCTRL_PIN(139, "GPP_F_10"),
 183         PINCTRL_PIN(140, "GPP_F_11"),
 184         PINCTRL_PIN(141, "GSXDOUT"),
 185         PINCTRL_PIN(142, "GSXSLOAD"),
 186         PINCTRL_PIN(143, "GSXDIN"),
 187         PINCTRL_PIN(144, "GSXSRESETB"),
 188         PINCTRL_PIN(145, "GSXCLK"),
 189         PINCTRL_PIN(146, "GMII_MDC_0"),
 190         PINCTRL_PIN(147, "GMII_MDIO_0"),
 191         PINCTRL_PIN(148, "GPP_F_19"),
 192         PINCTRL_PIN(149, "GPP_F_20"),
 193         PINCTRL_PIN(150, "GPP_F_21"),
 194         PINCTRL_PIN(151, "GPP_F_22"),
 195         PINCTRL_PIN(152, "GPP_F_23"),
 196         PINCTRL_PIN(153, "THC1_GSPI1_CLK_LOOPBK"),
 197         PINCTRL_PIN(154, "GSPI0A_CLK_LOOPBK"),
 198         /* SPI0 */
 199         PINCTRL_PIN(155, "SPI0_IO_2"),
 200         PINCTRL_PIN(156, "SPI0_IO_3"),
 201         PINCTRL_PIN(157, "SPI0_MOSI_IO_0"),
 202         PINCTRL_PIN(158, "SPI0_MISO_IO_1"),
 203         PINCTRL_PIN(159, "SPI0_TPM_CS_B"),
 204         PINCTRL_PIN(160, "SPI0_FLASH_0_CS_B"),
 205         PINCTRL_PIN(161, "SPI0_FLASH_1_CS_B"),
 206         PINCTRL_PIN(162, "SPI0_CLK"),
 207         PINCTRL_PIN(163, "L_BKLTEN"),
 208         PINCTRL_PIN(164, "L_BKLTCTL"),
 209         PINCTRL_PIN(165, "L_VDDEN"),
 210         PINCTRL_PIN(166, "SYS_PWROK"),
 211         PINCTRL_PIN(167, "SYS_RESET_B"),
 212         PINCTRL_PIN(168, "MLK_RST_B"),
 213         PINCTRL_PIN(169, "SPI0_CLK_LOOPBK"),
 214         /* vGPIO_3 */
 215         PINCTRL_PIN(170, "ESPI_USB_OCB_0"),
 216         PINCTRL_PIN(171, "ESPI_USB_OCB_1"),
 217         PINCTRL_PIN(172, "ESPI_USB_OCB_2"),
 218         PINCTRL_PIN(173, "ESPI_USB_OCB_3"),
 219         PINCTRL_PIN(174, "USB_CPU_OCB_0"),
 220         PINCTRL_PIN(175, "USB_CPU_OCB_1"),
 221         PINCTRL_PIN(176, "USB_CPU_OCB_2"),
 222         PINCTRL_PIN(177, "USB_CPU_OCB_3"),
 223         PINCTRL_PIN(178, "TS0_IN_INT"),
 224         PINCTRL_PIN(179, "TS1_IN_INT"),
 225         PINCTRL_PIN(180, "THC0_WOT_INT"),
 226         PINCTRL_PIN(181, "THC1_WOT_INT"),
 227         PINCTRL_PIN(182, "THC0_WHC_INT"),
 228         PINCTRL_PIN(183, "THC1_WHC_INT"),
 229         /* GPP_S */
 230         PINCTRL_PIN(184, "GPP_S_0"),
 231         PINCTRL_PIN(185, "GPP_S_1"),
 232         PINCTRL_PIN(186, "GPP_S_2"),
 233         PINCTRL_PIN(187, "GPP_S_3"),
 234         PINCTRL_PIN(188, "GPP_S_4"),
 235         PINCTRL_PIN(189, "GPP_S_5"),
 236         PINCTRL_PIN(190, "GPP_S_6"),
 237         PINCTRL_PIN(191, "GPP_S_7"),
 238         /* JTAG */
 239         PINCTRL_PIN(192, "JTAG_MBPB0"),
 240         PINCTRL_PIN(193, "JTAG_MBPB1"),
 241         PINCTRL_PIN(194, "JTAG_MBPB2"),
 242         PINCTRL_PIN(195, "JTAG_MBPB3"),
 243         PINCTRL_PIN(196, "JTAG_TDO"),
 244         PINCTRL_PIN(197, "PRDY_B"),
 245         PINCTRL_PIN(198, "PREQ_B"),
 246         PINCTRL_PIN(199, "JTAG_TDI"),
 247         PINCTRL_PIN(200, "JTAG_TMS"),
 248         PINCTRL_PIN(201, "JTAG_TCK"),
 249         PINCTRL_PIN(202, "DBG_PMODE"),
 250         PINCTRL_PIN(203, "JTAG_TRST_B"),
 251         /* GPP_B */
 252         PINCTRL_PIN(204, "ADM_VID_0"),
 253         PINCTRL_PIN(205, "ADM_VID_1"),
 254         PINCTRL_PIN(206, "GPP_B_2"),
 255         PINCTRL_PIN(207, "GPP_B_3"),
 256         PINCTRL_PIN(208, "GPP_B_4"),
 257         PINCTRL_PIN(209, "GPP_B_5"),
 258         PINCTRL_PIN(210, "GPP_B_6"),
 259         PINCTRL_PIN(211, "GPP_B_7"),
 260         PINCTRL_PIN(212, "GPP_B_8"),
 261         PINCTRL_PIN(213, "GPP_B_9"),
 262         PINCTRL_PIN(214, "GPP_B_10"),
 263         PINCTRL_PIN(215, "GPP_B_11"),
 264         PINCTRL_PIN(216, "SLP_S0_B"),
 265         PINCTRL_PIN(217, "PLTRST_B"),
 266         PINCTRL_PIN(218, "GPP_B_14"),
 267         PINCTRL_PIN(219, "GPP_B_15"),
 268         PINCTRL_PIN(220, "GPP_B_16"),
 269         PINCTRL_PIN(221, "GPP_B_17"),
 270         PINCTRL_PIN(222, "GPP_B_18"),
 271         PINCTRL_PIN(223, "GPP_B_19"),
 272         PINCTRL_PIN(224, "GPP_B_20"),
 273         PINCTRL_PIN(225, "GPP_B_21"),
 274         PINCTRL_PIN(226, "GPP_B_22"),
 275         PINCTRL_PIN(227, "GPP_B_23"),
 276         PINCTRL_PIN(228, "ISH_I3C0_CLK_LOOPBK"),
 277         /* GPP_D */
 278         PINCTRL_PIN(229, "GPP_D_0"),
 279         PINCTRL_PIN(230, "GPP_D_1"),
 280         PINCTRL_PIN(231, "GPP_D_2"),
 281         PINCTRL_PIN(232, "GPP_D_3"),
 282         PINCTRL_PIN(233, "GPP_D_4"),
 283         PINCTRL_PIN(234, "GPP_D_5"),
 284         PINCTRL_PIN(235, "GPP_D_6"),
 285         PINCTRL_PIN(236, "GPP_D_7"),
 286         PINCTRL_PIN(237, "GPP_D_8"),
 287         PINCTRL_PIN(238, "GPP_D_9"),
 288         PINCTRL_PIN(239, "HDA_BCLK"),
 289         PINCTRL_PIN(240, "HDA_SYNC"),
 290         PINCTRL_PIN(241, "HDA_SDO"),
 291         PINCTRL_PIN(242, "HDA_SDI_0"),
 292         PINCTRL_PIN(243, "GPP_D_14"),
 293         PINCTRL_PIN(244, "GPP_D_15"),
 294         PINCTRL_PIN(245, "GPP_D_16"),
 295         PINCTRL_PIN(246, "HDA_RST_B"),
 296         PINCTRL_PIN(247, "GPP_D_18"),
 297         PINCTRL_PIN(248, "GPP_D_19"),
 298         PINCTRL_PIN(249, "GPP_D_20"),
 299         PINCTRL_PIN(250, "UFS_REFCLK"),
 300         PINCTRL_PIN(251, "BPKI3C_SDA"),
 301         PINCTRL_PIN(252, "BPKI3C_SCL"),
 302         PINCTRL_PIN(253, "BOOTHALT_B"),
 303         /* vGPIO */
 304         PINCTRL_PIN(254, "CNV_BTEN"),
 305         PINCTRL_PIN(255, "CNV_BT_HOST_WAKEB"),
 306         PINCTRL_PIN(256, "CNV_BT_IF_SELECT"),
 307         PINCTRL_PIN(257, "vCNV_BT_UART_TXD"),
 308         PINCTRL_PIN(258, "vCNV_BT_UART_RXD"),
 309         PINCTRL_PIN(259, "vCNV_BT_UART_CTS_B"),
 310         PINCTRL_PIN(260, "vCNV_BT_UART_RTS_B"),
 311         PINCTRL_PIN(261, "vCNV_MFUART1_TXD"),
 312         PINCTRL_PIN(262, "vCNV_MFUART1_RXD"),
 313         PINCTRL_PIN(263, "vCNV_MFUART1_CTS_B"),
 314         PINCTRL_PIN(264, "vCNV_MFUART1_RTS_B"),
 315         PINCTRL_PIN(265, "vUART0_TXD"),
 316         PINCTRL_PIN(266, "vUART0_RXD"),
 317         PINCTRL_PIN(267, "vUART0_CTS_B"),
 318         PINCTRL_PIN(268, "vUART0_RTS_B"),
 319         PINCTRL_PIN(269, "vISH_UART0_TXD"),
 320         PINCTRL_PIN(270, "vISH_UART0_RXD"),
 321         PINCTRL_PIN(271, "vISH_UART0_CTS_B"),
 322         PINCTRL_PIN(272, "vISH_UART0_RTS_B"),
 323         PINCTRL_PIN(273, "vCNV_BT_I2S_BCLK"),
 324         PINCTRL_PIN(274, "vCNV_BT_I2S_WS_SYNC"),
 325         PINCTRL_PIN(275, "vCNV_BT_I2S_SDO"),
 326         PINCTRL_PIN(276, "vCNV_BT_I2S_SDI"),
 327         PINCTRL_PIN(277, "vI2S2_SCLK"),
 328         PINCTRL_PIN(278, "vI2S2_SFRM"),
 329         PINCTRL_PIN(279, "vI2S2_TXD"),
 330         PINCTRL_PIN(280, "vI2S2_RXD"),
 331         PINCTRL_PIN(281, "vCNV_BT_I2S_BCLK_2"),
 332         PINCTRL_PIN(282, "vCNV_BT_I2S_WS_SYNC_2"),
 333         PINCTRL_PIN(283, "vCNV_BT_I2S_SDO_2"),
 334         PINCTRL_PIN(284, "vCNV_BT_I2S_SDI_2"),
 335         PINCTRL_PIN(285, "vI2S2_SCLK_2"),
 336         PINCTRL_PIN(286, "vI2S2_SFRM_2"),
 337         PINCTRL_PIN(287, "vI2S2_TXD_2"),
 338         PINCTRL_PIN(288, "vI2S2_RXD_2"),
 339 };
 340
 341 static const struct intel_padgroup mtlp_community0_gpps[] = {
 342         MTL_GPP(0, 0, 4, 0),            /* CPU */
 343         MTL_GPP(1, 5, 28, 32),          /* GPP_V */
 344         MTL_GPP(2, 29, 52, 64),         /* GPP_C */
 345 };
 346
 347 static const struct intel_padgroup mtlp_community1_gpps[] = {
 348         MTL_GPP(0, 53, 77, 96),         /* GPP_A */
 349         MTL_GPP(1, 78, 102, 128),       /* GPP_E */
 350 };
 351
 352 static const struct intel_padgroup mtlp_community3_gpps[] = {
 353         MTL_GPP(0, 103, 128, 160),      /* GPP_H */
 354         MTL_GPP(1, 129, 154, 192),      /* GPP_F */
 355         MTL_GPP(2, 155, 169, 224),      /* SPI0 */
 356         MTL_GPP(3, 170, 183, 256),      /* vGPIO_3 */
 357 };
 358
 359 static const struct intel_padgroup mtlp_community4_gpps[] = {
 360         MTL_GPP(0, 184, 191, 288),      /* GPP_S */
 361         MTL_GPP(1, 192, 203, 320),      /* JTAG */
 362 };
 363
 364 static const struct intel_padgroup mtlp_community5_gpps[] = {
 365         MTL_GPP(0, 204, 228, 352),      /* GPP_B */
 366         MTL_GPP(1, 229, 253, 384),      /* GPP_D */
 367         MTL_GPP(2, 254, 285, 416),      /* vGPIO_0 */
 368         MTL_GPP(3, 286, 288, 448),      /* vGPIO_1 */
 369 };
 370
 371 static const struct intel_community mtlp_communities[] = {
 372         MTL_COMMUNITY(0, 0, 52, mtlp_community0_gpps),
 373         MTL_COMMUNITY(1, 53, 102, mtlp_community1_gpps),
 374         MTL_COMMUNITY(2, 103, 183, mtlp_community3_gpps),
 375         MTL_COMMUNITY(3, 184, 203, mtlp_community4_gpps),
 376         MTL_COMMUNITY(4, 204, 288, mtlp_community5_gpps),
 377 };
 378
 379 static const struct intel_pinctrl_soc_data mtlp_soc_data = {
 380         .pins = mtlp_pins,
 381         .npins = ARRAY_SIZE(mtlp_pins),
 382         .communities = mtlp_communities,
 383         .ncommunities = ARRAY_SIZE(mtlp_communities),
 384 };
 385
 386 static const struct acpi_device_id mtl_pinctrl_acpi_match[] = {
 387         { "INTC1083", (kernel_ulong_t)&mtlp_soc_data },
 388         { }
 389 };
 390 MODULE_DEVICE_TABLE(acpi, mtl_pinctrl_acpi_match);
 391
 392 static INTEL_PINCTRL_PM_OPS(mtl_pinctrl_pm_ops);
 393
 394 static struct platform_driver mtl_pinctrl_driver = {
 395         .probe = intel_pinctrl_probe_by_hid,
 396         .driver = {
 397                 .name = "meteorlake-pinctrl",
 398                 .acpi_match_table = mtl_pinctrl_acpi_match,
 399                 .pm = &mtl_pinctrl_pm_ops,
 400         },
 401 };
 402 module_platform_driver(mtl_pinctrl_driver);
 403
 404 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
 405 MODULE_DESCRIPTION("Intel Meteor Lake PCH pinctrl/GPIO driver");
 406 MODULE_LICENSE("GPL v2");