Merge tag 'mtd/for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
[linux-2.6-microblaze.git] / drivers / pinctrl / intel / pinctrl-emmitsburg.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Intel Emmitsburg PCH pinctrl/GPIO driver
4  *
5  * Copyright (C) 2020, Intel Corporation
6  * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7  */
8
9 #include <linux/mod_devicetable.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12
13 #include <linux/pinctrl/pinctrl.h>
14
15 #include "pinctrl-intel.h"
16
17 #define EBG_PAD_OWN     0x0a0
18 #define EBG_PADCFGLOCK  0x100
19 #define EBG_HOSTSW_OWN  0x130
20 #define EBG_GPI_IS      0x200
21 #define EBG_GPI_IE      0x210
22
23 #define EBG_GPP(r, s, e)                                \
24         {                                               \
25                 .reg_num = (r),                         \
26                 .base = (s),                            \
27                 .size = ((e) - (s) + 1),                \
28         }
29
30 #define EBG_COMMUNITY(b, s, e, g)                       \
31         {                                               \
32                 .barno = (b),                           \
33                 .padown_offset = EBG_PAD_OWN,           \
34                 .padcfglock_offset = EBG_PADCFGLOCK,    \
35                 .hostown_offset = EBG_HOSTSW_OWN,       \
36                 .is_offset = EBG_GPI_IS,                \
37                 .ie_offset = EBG_GPI_IE,                \
38                 .pin_base = (s),                        \
39                 .npins = ((e) - (s) + 1),               \
40                 .gpps = (g),                            \
41                 .ngpps = ARRAY_SIZE(g),                 \
42         }
43
44 /* Emmitsburg */
45 static const struct pinctrl_pin_desc ebg_pins[] = {
46         /* GPP_A */
47         PINCTRL_PIN(0, "ESPI_ALERT0B"),
48         PINCTRL_PIN(1, "ESPI_ALERT1B"),
49         PINCTRL_PIN(2, "ESPI_IO_0"),
50         PINCTRL_PIN(3, "ESPI_IO_1"),
51         PINCTRL_PIN(4, "ESPI_IO_2"),
52         PINCTRL_PIN(5, "ESPI_IO_3"),
53         PINCTRL_PIN(6, "ESPI_CS0B"),
54         PINCTRL_PIN(7, "ESPI_CS1B"),
55         PINCTRL_PIN(8, "ESPI_RESETB"),
56         PINCTRL_PIN(9, "ESPI_CLK"),
57         PINCTRL_PIN(10, "SRCCLKREQB_0"),
58         PINCTRL_PIN(11, "SRCCLKREQB_1"),
59         PINCTRL_PIN(12, "SRCCLKREQB_2"),
60         PINCTRL_PIN(13, "SRCCLKREQB_3"),
61         PINCTRL_PIN(14, "SRCCLKREQB_4"),
62         PINCTRL_PIN(15, "SRCCLKREQB_5"),
63         PINCTRL_PIN(16, "SRCCLKREQB_6"),
64         PINCTRL_PIN(17, "SRCCLKREQB_7"),
65         PINCTRL_PIN(18, "SRCCLKREQB_8"),
66         PINCTRL_PIN(19, "SRCCLKREQB_9"),
67         PINCTRL_PIN(20, "ESPI_CLK_LOOPBK"),
68         /* GPP_B */
69         PINCTRL_PIN(21, "GSXDOUT"),
70         PINCTRL_PIN(22, "GSXSLOAD"),
71         PINCTRL_PIN(23, "GSXDIN"),
72         PINCTRL_PIN(24, "GSXSRESETB"),
73         PINCTRL_PIN(25, "GSXCLK"),
74         PINCTRL_PIN(26, "USB2_OCB_0"),
75         PINCTRL_PIN(27, "USB2_OCB_1"),
76         PINCTRL_PIN(28, "USB2_OCB_2"),
77         PINCTRL_PIN(29, "USB2_OCB_3"),
78         PINCTRL_PIN(30, "USB2_OCB_4"),
79         PINCTRL_PIN(31, "USB2_OCB_5"),
80         PINCTRL_PIN(32, "USB2_OCB_6"),
81         PINCTRL_PIN(33, "HS_UART0_RXD"),
82         PINCTRL_PIN(34, "HS_UART0_TXD"),
83         PINCTRL_PIN(35, "HS_UART0_RTSB"),
84         PINCTRL_PIN(36, "HS_UART0_CTSB"),
85         PINCTRL_PIN(37, "HS_UART1_RXD"),
86         PINCTRL_PIN(38, "HS_UART1_TXD"),
87         PINCTRL_PIN(39, "HS_UART1_RTSB"),
88         PINCTRL_PIN(40, "HS_UART1_CTSB"),
89         PINCTRL_PIN(41, "GPPC_B_20"),
90         PINCTRL_PIN(42, "GPPC_B_21"),
91         PINCTRL_PIN(43, "GPPC_B_22"),
92         PINCTRL_PIN(44, "PS_ONB"),
93         /* SPI */
94         PINCTRL_PIN(45, "SPI0_IO_2"),
95         PINCTRL_PIN(46, "SPI0_IO_3"),
96         PINCTRL_PIN(47, "SPI0_MOSI_IO_0"),
97         PINCTRL_PIN(48, "SPI0_MISO_IO_1"),
98         PINCTRL_PIN(49, "SPI0_TPM_CSB"),
99         PINCTRL_PIN(50, "SPI0_FLASH_0_CSB"),
100         PINCTRL_PIN(51, "SPI0_FLASH_1_CSB"),
101         PINCTRL_PIN(52, "SPI0_CLK"),
102         PINCTRL_PIN(53, "TIME_SYNC_0"),
103         PINCTRL_PIN(54, "SPKR"),
104         PINCTRL_PIN(55, "CPU_GP_0"),
105         PINCTRL_PIN(56, "CPU_GP_1"),
106         PINCTRL_PIN(57, "CPU_GP_2"),
107         PINCTRL_PIN(58, "CPU_GP_3"),
108         PINCTRL_PIN(59, "SUSWARNB_SUSPWRDNACK"),
109         PINCTRL_PIN(60, "SUSACKB"),
110         PINCTRL_PIN(61, "NMIB"),
111         PINCTRL_PIN(62, "SMIB"),
112         PINCTRL_PIN(63, "GPPC_S_10"),
113         PINCTRL_PIN(64, "GPPC_S_11"),
114         PINCTRL_PIN(65, "SPI_CLK_LOOPBK"),
115         /* GPP_C */
116         PINCTRL_PIN(66, "ME_SML0CLK"),
117         PINCTRL_PIN(67, "ME_SML0DATA"),
118         PINCTRL_PIN(68, "ME_SML0ALERTB"),
119         PINCTRL_PIN(69, "ME_SML0BDATA"),
120         PINCTRL_PIN(70, "ME_SML0BCLK"),
121         PINCTRL_PIN(71, "ME_SML0BALERTB"),
122         PINCTRL_PIN(72, "ME_SML1CLK"),
123         PINCTRL_PIN(73, "ME_SML1DATA"),
124         PINCTRL_PIN(74, "ME_SML1ALERTB"),
125         PINCTRL_PIN(75, "ME_SML2CLK"),
126         PINCTRL_PIN(76, "ME_SML2DATA"),
127         PINCTRL_PIN(77, "ME_SML2ALERTB"),
128         PINCTRL_PIN(78, "ME_SML3CLK"),
129         PINCTRL_PIN(79, "ME_SML3DATA"),
130         PINCTRL_PIN(80, "ME_SML3ALERTB"),
131         PINCTRL_PIN(81, "ME_SML4CLK"),
132         PINCTRL_PIN(82, "ME_SML4DATA"),
133         PINCTRL_PIN(83, "ME_SML4ALERTB"),
134         PINCTRL_PIN(84, "GPPC_C_18"),
135         PINCTRL_PIN(85, "MC_SMBCLK"),
136         PINCTRL_PIN(86, "MC_SMBDATA"),
137         PINCTRL_PIN(87, "MC_SMBALERTB"),
138         /* GPP_D */
139         PINCTRL_PIN(88, "HS_SMBCLK"),
140         PINCTRL_PIN(89, "HS_SMBDATA"),
141         PINCTRL_PIN(90, "HS_SMBALERTB"),
142         PINCTRL_PIN(91, "GBE_SMB_ALRT_N"),
143         PINCTRL_PIN(92, "GBE_SMB_CLK"),
144         PINCTRL_PIN(93, "GBE_SMB_DATA"),
145         PINCTRL_PIN(94, "GBE_GPIO10"),
146         PINCTRL_PIN(95, "GBE_GPIO11"),
147         PINCTRL_PIN(96, "CRASHLOG_TRIG_N"),
148         PINCTRL_PIN(97, "PMEB"),
149         PINCTRL_PIN(98, "BM_BUSYB"),
150         PINCTRL_PIN(99, "PLTRSTB"),
151         PINCTRL_PIN(100, "PCHHOTB"),
152         PINCTRL_PIN(101, "ADR_COMPLETE"),
153         PINCTRL_PIN(102, "ADR_TRIGGER_N"),
154         PINCTRL_PIN(103, "VRALERTB"),
155         PINCTRL_PIN(104, "ADR_ACK"),
156         PINCTRL_PIN(105, "THERMTRIP_N"),
157         PINCTRL_PIN(106, "MEMTRIP_N"),
158         PINCTRL_PIN(107, "MSMI_N"),
159         PINCTRL_PIN(108, "CATERR_N"),
160         PINCTRL_PIN(109, "GLB_RST_WARN_B"),
161         PINCTRL_PIN(110, "USB2_OCB_7"),
162         PINCTRL_PIN(111, "GPP_D_23"),
163         /* GPP_E */
164         PINCTRL_PIN(112, "SATA1_XPCIE_0"),
165         PINCTRL_PIN(113, "SATA1_XPCIE_1"),
166         PINCTRL_PIN(114, "SATA1_XPCIE_2"),
167         PINCTRL_PIN(115, "SATA1_XPCIE_3"),
168         PINCTRL_PIN(116, "SATA0_XPCIE_2"),
169         PINCTRL_PIN(117, "SATA0_XPCIE_3"),
170         PINCTRL_PIN(118, "SATA0_USB3_XPCIE_0"),
171         PINCTRL_PIN(119, "SATA0_USB3_XPCIE_1"),
172         PINCTRL_PIN(120, "SATA0_SCLOCK"),
173         PINCTRL_PIN(121, "SATA0_SLOAD"),
174         PINCTRL_PIN(122, "SATA0_SDATAOUT"),
175         PINCTRL_PIN(123, "SATA1_SCLOCK"),
176         PINCTRL_PIN(124, "SATA1_SLOAD"),
177         PINCTRL_PIN(125, "SATA1_SDATAOUT"),
178         PINCTRL_PIN(126, "SATA2_SCLOCK"),
179         PINCTRL_PIN(127, "SATA2_SLOAD"),
180         PINCTRL_PIN(128, "SATA2_SDATAOUT"),
181         PINCTRL_PIN(129, "ERR0_N"),
182         PINCTRL_PIN(130, "ERR1_N"),
183         PINCTRL_PIN(131, "ERR2_N"),
184         PINCTRL_PIN(132, "GBE_UART_RXD"),
185         PINCTRL_PIN(133, "GBE_UART_TXD"),
186         PINCTRL_PIN(134, "GBE_UART_RTSB"),
187         PINCTRL_PIN(135, "GBE_UART_CTSB"),
188         /* JTAG */
189         PINCTRL_PIN(136, "JTAG_TDO"),
190         PINCTRL_PIN(137, "JTAG_TDI"),
191         PINCTRL_PIN(138, "JTAG_TCK"),
192         PINCTRL_PIN(139, "JTAG_TMS"),
193         PINCTRL_PIN(140, "JTAGX"),
194         PINCTRL_PIN(141, "PRDYB"),
195         PINCTRL_PIN(142, "PREQB"),
196         PINCTRL_PIN(143, "GLB_PC_DISABLE"),
197         PINCTRL_PIN(144, "DBG_PMODE"),
198         PINCTRL_PIN(145, "GLB_EXT_ACC_DISABLE"),
199         /* GPP_H */
200         PINCTRL_PIN(146, "GBE_GPIO12"),
201         PINCTRL_PIN(147, "GBE_GPIO13"),
202         PINCTRL_PIN(148, "GBE_SDP_TIMESYNC0_S2N"),
203         PINCTRL_PIN(149, "GBE_SDP_TIMESYNC1_S2N"),
204         PINCTRL_PIN(150, "GBE_SDP_TIMESYNC2_S2N"),
205         PINCTRL_PIN(151, "GBE_SDP_TIMESYNC3_S2N"),
206         PINCTRL_PIN(152, "GPPC_H_6"),
207         PINCTRL_PIN(153, "GPPC_H_7"),
208         PINCTRL_PIN(154, "NCSI_CLK_IN"),
209         PINCTRL_PIN(155, "NCSI_CRS_DV"),
210         PINCTRL_PIN(156, "NCSI_RXD0"),
211         PINCTRL_PIN(157, "NCSI_RXD1"),
212         PINCTRL_PIN(158, "NCSI_TX_EN"),
213         PINCTRL_PIN(159, "NCSI_TXD0"),
214         PINCTRL_PIN(160, "NCSI_TXD1"),
215         PINCTRL_PIN(161, "NAC_NCSI_CLK_OUT_0"),
216         PINCTRL_PIN(162, "NAC_NCSI_CLK_OUT_1"),
217         PINCTRL_PIN(163, "NAC_NCSI_CLK_OUT_2"),
218         PINCTRL_PIN(164, "PMCALERTB"),
219         PINCTRL_PIN(165, "GPPC_H_19"),
220         /* GPP_J */
221         PINCTRL_PIN(166, "CPUPWRGD"),
222         PINCTRL_PIN(167, "CPU_THRMTRIP_N"),
223         PINCTRL_PIN(168, "PLTRST_CPUB"),
224         PINCTRL_PIN(169, "TRIGGER0_N"),
225         PINCTRL_PIN(170, "TRIGGER1_N"),
226         PINCTRL_PIN(171, "CPU_PWR_DEBUG_N"),
227         PINCTRL_PIN(172, "CPU_MEMTRIP_N"),
228         PINCTRL_PIN(173, "CPU_MSMI_N"),
229         PINCTRL_PIN(174, "ME_PECI"),
230         PINCTRL_PIN(175, "NAC_SPARE0"),
231         PINCTRL_PIN(176, "NAC_SPARE1"),
232         PINCTRL_PIN(177, "NAC_SPARE2"),
233         PINCTRL_PIN(178, "CPU_ERR0_N"),
234         PINCTRL_PIN(179, "CPU_CATERR_N"),
235         PINCTRL_PIN(180, "CPU_ERR1_N"),
236         PINCTRL_PIN(181, "CPU_ERR2_N"),
237         PINCTRL_PIN(182, "GPP_J_16"),
238         PINCTRL_PIN(183, "GPP_J_17"),
239         /* GPP_I */
240         PINCTRL_PIN(184, "GBE_GPIO4"),
241         PINCTRL_PIN(185, "GBE_GPIO5"),
242         PINCTRL_PIN(186, "GBE_GPIO6"),
243         PINCTRL_PIN(187, "GBE_GPIO7"),
244         PINCTRL_PIN(188, "GBE1_LED1"),
245         PINCTRL_PIN(189, "GBE1_LED2"),
246         PINCTRL_PIN(190, "GBE2_LED0"),
247         PINCTRL_PIN(191, "GBE2_LED1"),
248         PINCTRL_PIN(192, "GBE2_LED2"),
249         PINCTRL_PIN(193, "GBE3_LED0"),
250         PINCTRL_PIN(194, "GBE3_LED1"),
251         PINCTRL_PIN(195, "GBE3_LED2"),
252         PINCTRL_PIN(196, "GBE0_I2C_CLK"),
253         PINCTRL_PIN(197, "GBE0_I2C_DATA"),
254         PINCTRL_PIN(198, "GBE1_I2C_CLK"),
255         PINCTRL_PIN(199, "GBE1_I2C_DATA"),
256         PINCTRL_PIN(200, "GBE2_I2C_CLK"),
257         PINCTRL_PIN(201, "GBE2_I2C_DATA"),
258         PINCTRL_PIN(202, "GBE3_I2C_CLK"),
259         PINCTRL_PIN(203, "GBE3_I2C_DATA"),
260         PINCTRL_PIN(204, "GBE4_I2C_CLK"),
261         PINCTRL_PIN(205, "GBE4_I2C_DATA"),
262         PINCTRL_PIN(206, "GBE_GPIO8"),
263         PINCTRL_PIN(207, "GBE_GPIO9"),
264         /* GPP_L */
265         PINCTRL_PIN(208, "PM_SYNC_0"),
266         PINCTRL_PIN(209, "PM_DOWN_0"),
267         PINCTRL_PIN(210, "PM_SYNC_CLK_0"),
268         PINCTRL_PIN(211, "GPP_L_3"),
269         PINCTRL_PIN(212, "GPP_L_4"),
270         PINCTRL_PIN(213, "GPP_L_5"),
271         PINCTRL_PIN(214, "GPP_L_6"),
272         PINCTRL_PIN(215, "GPP_L_7"),
273         PINCTRL_PIN(216, "GPP_L_8"),
274         PINCTRL_PIN(217, "NAC_GBE_GPIO0_S2N"),
275         PINCTRL_PIN(218, "NAC_GBE_GPIO1_S2N"),
276         PINCTRL_PIN(219, "NAC_GBE_GPIO2_S2N"),
277         PINCTRL_PIN(220, "NAC_GBE_GPIO3_S2N"),
278         PINCTRL_PIN(221, "NAC_GBE_SMB_DATA_IN"),
279         PINCTRL_PIN(222, "NAC_GBE_SMB_DATA_OUT"),
280         PINCTRL_PIN(223, "NAC_GBE_SMB_ALRT_N"),
281         PINCTRL_PIN(224, "NAC_GBE_SMB_CLK_IN"),
282         PINCTRL_PIN(225, "NAC_GBE_SMB_CLK_OUT"),
283         /* GPP_M */
284         PINCTRL_PIN(226, "GPP_M_0"),
285         PINCTRL_PIN(227, "GPP_M_1"),
286         PINCTRL_PIN(228, "GPP_M_2"),
287         PINCTRL_PIN(229, "GPP_M_3"),
288         PINCTRL_PIN(230, "NAC_WAKE_N"),
289         PINCTRL_PIN(231, "GPP_M_5"),
290         PINCTRL_PIN(232, "GPP_M_6"),
291         PINCTRL_PIN(233, "GPP_M_7"),
292         PINCTRL_PIN(234, "GPP_M_8"),
293         PINCTRL_PIN(235, "NAC_SBLINK_S2N"),
294         PINCTRL_PIN(236, "NAC_SBLINK_N2S"),
295         PINCTRL_PIN(237, "NAC_SBLINK_CLK_N2S"),
296         PINCTRL_PIN(238, "NAC_SBLINK_CLK_S2N"),
297         PINCTRL_PIN(239, "NAC_XTAL_VALID"),
298         PINCTRL_PIN(240, "NAC_RESET_NAC_N"),
299         PINCTRL_PIN(241, "GPP_M_15"),
300         PINCTRL_PIN(242, "GPP_M_16"),
301         PINCTRL_PIN(243, "GPP_M_17"),
302         /* GPP_N */
303         PINCTRL_PIN(244, "GPP_N_0"),
304         PINCTRL_PIN(245, "NAC_NCSI_TXD0"),
305         PINCTRL_PIN(246, "GPP_N_2"),
306         PINCTRL_PIN(247, "GPP_N_3"),
307         PINCTRL_PIN(248, "NAC_NCSI_REFCLK_IN"),
308         PINCTRL_PIN(249, "GPP_N_5"),
309         PINCTRL_PIN(250, "GPP_N_6"),
310         PINCTRL_PIN(251, "GPP_N_7"),
311         PINCTRL_PIN(252, "NAC_NCSI_RXD0"),
312         PINCTRL_PIN(253, "NAC_NCSI_RXD1"),
313         PINCTRL_PIN(254, "NAC_NCSI_CRS_DV"),
314         PINCTRL_PIN(255, "NAC_NCSI_CLK_IN"),
315         PINCTRL_PIN(256, "NAC_NCSI_REFCLK_OUT"),
316         PINCTRL_PIN(257, "NAC_NCSI_TX_EN"),
317         PINCTRL_PIN(258, "NAC_NCSI_TXD1"),
318         PINCTRL_PIN(259, "NAC_NCSI_OE_N"),
319         PINCTRL_PIN(260, "NAC_GR_N"),
320         PINCTRL_PIN(261, "NAC_INIT_SX_WAKE_N"),
321 };
322
323 static const struct intel_padgroup ebg_community0_gpps[] = {
324         EBG_GPP(0, 0, 20),      /* GPP_A */
325         EBG_GPP(1, 21, 44),     /* GPP_B */
326         EBG_GPP(2, 45, 65),     /* SPI */
327 };
328
329 static const struct intel_padgroup ebg_community1_gpps[] = {
330         EBG_GPP(0, 66, 87),     /* GPP_C */
331         EBG_GPP(1, 88, 111),    /* GPP_D */
332 };
333
334 static const struct intel_padgroup ebg_community3_gpps[] = {
335         EBG_GPP(0, 112, 135),   /* GPP_E */
336         EBG_GPP(1, 136, 145),   /* JTAG */
337 };
338
339 static const struct intel_padgroup ebg_community4_gpps[] = {
340         EBG_GPP(0, 146, 165),   /* GPP_H */
341         EBG_GPP(1, 166, 183),   /* GPP_J */
342 };
343
344 static const struct intel_padgroup ebg_community5_gpps[] = {
345         EBG_GPP(0, 184, 207),   /* GPP_I */
346         EBG_GPP(1, 208, 225),   /* GPP_L */
347         EBG_GPP(2, 226, 243),   /* GPP_M */
348         EBG_GPP(3, 244, 261),   /* GPP_N */
349 };
350
351 static const struct intel_community ebg_communities[] = {
352         EBG_COMMUNITY(0, 0, 65, ebg_community0_gpps),
353         EBG_COMMUNITY(1, 66, 111, ebg_community1_gpps),
354         EBG_COMMUNITY(2, 112, 145, ebg_community3_gpps),
355         EBG_COMMUNITY(3, 146, 183, ebg_community4_gpps),
356         EBG_COMMUNITY(4, 184, 261, ebg_community5_gpps),
357 };
358
359 static const struct intel_pinctrl_soc_data ebg_soc_data = {
360         .pins = ebg_pins,
361         .npins = ARRAY_SIZE(ebg_pins),
362         .communities = ebg_communities,
363         .ncommunities = ARRAY_SIZE(ebg_communities),
364 };
365
366 static const struct acpi_device_id ebg_pinctrl_acpi_match[] = {
367         { "INTC1071", (kernel_ulong_t)&ebg_soc_data },
368         { }
369 };
370 MODULE_DEVICE_TABLE(acpi, ebg_pinctrl_acpi_match);
371
372 static INTEL_PINCTRL_PM_OPS(ebg_pinctrl_pm_ops);
373
374 static struct platform_driver ebg_pinctrl_driver = {
375         .probe = intel_pinctrl_probe_by_hid,
376         .driver = {
377                 .name = "emmitsburg-pinctrl",
378                 .acpi_match_table = ebg_pinctrl_acpi_match,
379                 .pm = &ebg_pinctrl_pm_ops,
380         },
381 };
382
383 module_platform_driver(ebg_pinctrl_driver);
384
385 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
386 MODULE_DESCRIPTION("Intel Emmitsburg PCH pinctrl/GPIO driver");
387 MODULE_LICENSE("GPL v2");