1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for BCM6362 GPIO unit (pinctrl + GPIO)
5 * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
6 * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
9 #include <linux/bits.h>
10 #include <linux/gpio/driver.h>
11 #include <linux/kernel.h>
13 #include <linux/pinctrl/pinmux.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
17 #include "../pinctrl-utils.h"
19 #include "pinctrl-bcm63xx.h"
21 #define BCM6362_BANK_GPIOS 32
22 #define BCM6362_NUM_GPIOS 48
23 #define BCM6362_NUM_LEDS 24
25 #define BCM6362_LED_REG 0x10
26 #define BCM6362_MODE_REG 0x18
27 #define BCM6362_CTRL_REG 0x1c
28 #define BCM6362_BASEMODE_REG 0x38
29 #define BASEMODE_NAND BIT(2)
31 enum bcm6362_pinctrl_reg {
38 struct bcm6362_function {
40 const char * const *groups;
41 const unsigned num_groups;
43 enum bcm6362_pinctrl_reg reg;
44 uint32_t basemode_mask;
47 #define BCM6362_PIN(a, b, mask) \
51 .drv_data = (void *)(mask), \
54 static const struct pinctrl_pin_desc bcm6362_pins[] = {
55 PINCTRL_PIN(0, "gpio0"),
56 PINCTRL_PIN(1, "gpio1"),
57 PINCTRL_PIN(2, "gpio2"),
58 PINCTRL_PIN(3, "gpio3"),
59 PINCTRL_PIN(4, "gpio4"),
60 PINCTRL_PIN(5, "gpio5"),
61 PINCTRL_PIN(6, "gpio6"),
62 PINCTRL_PIN(7, "gpio7"),
63 BCM6362_PIN(8, "gpio8", BASEMODE_NAND),
64 PINCTRL_PIN(9, "gpio9"),
65 PINCTRL_PIN(10, "gpio10"),
66 PINCTRL_PIN(11, "gpio11"),
67 BCM6362_PIN(12, "gpio12", BASEMODE_NAND),
68 BCM6362_PIN(13, "gpio13", BASEMODE_NAND),
69 BCM6362_PIN(14, "gpio14", BASEMODE_NAND),
70 BCM6362_PIN(15, "gpio15", BASEMODE_NAND),
71 BCM6362_PIN(16, "gpio16", BASEMODE_NAND),
72 BCM6362_PIN(17, "gpio17", BASEMODE_NAND),
73 BCM6362_PIN(18, "gpio18", BASEMODE_NAND),
74 BCM6362_PIN(19, "gpio19", BASEMODE_NAND),
75 BCM6362_PIN(20, "gpio20", BASEMODE_NAND),
76 BCM6362_PIN(21, "gpio21", BASEMODE_NAND),
77 BCM6362_PIN(22, "gpio22", BASEMODE_NAND),
78 BCM6362_PIN(23, "gpio23", BASEMODE_NAND),
79 PINCTRL_PIN(24, "gpio24"),
80 PINCTRL_PIN(25, "gpio25"),
81 PINCTRL_PIN(26, "gpio26"),
82 BCM6362_PIN(27, "gpio27", BASEMODE_NAND),
83 PINCTRL_PIN(28, "gpio28"),
84 PINCTRL_PIN(29, "gpio29"),
85 PINCTRL_PIN(30, "gpio30"),
86 PINCTRL_PIN(31, "gpio31"),
87 PINCTRL_PIN(32, "gpio32"),
88 PINCTRL_PIN(33, "gpio33"),
89 PINCTRL_PIN(34, "gpio34"),
90 PINCTRL_PIN(35, "gpio35"),
91 PINCTRL_PIN(36, "gpio36"),
92 PINCTRL_PIN(37, "gpio37"),
93 PINCTRL_PIN(38, "gpio38"),
94 PINCTRL_PIN(39, "gpio39"),
95 PINCTRL_PIN(40, "gpio40"),
96 PINCTRL_PIN(41, "gpio41"),
97 PINCTRL_PIN(42, "gpio42"),
98 PINCTRL_PIN(43, "gpio43"),
99 PINCTRL_PIN(44, "gpio44"),
100 PINCTRL_PIN(45, "gpio45"),
101 PINCTRL_PIN(46, "gpio46"),
102 PINCTRL_PIN(47, "gpio47"),
105 static unsigned gpio0_pins[] = { 0 };
106 static unsigned gpio1_pins[] = { 1 };
107 static unsigned gpio2_pins[] = { 2 };
108 static unsigned gpio3_pins[] = { 3 };
109 static unsigned gpio4_pins[] = { 4 };
110 static unsigned gpio5_pins[] = { 5 };
111 static unsigned gpio6_pins[] = { 6 };
112 static unsigned gpio7_pins[] = { 7 };
113 static unsigned gpio8_pins[] = { 8 };
114 static unsigned gpio9_pins[] = { 9 };
115 static unsigned gpio10_pins[] = { 10 };
116 static unsigned gpio11_pins[] = { 11 };
117 static unsigned gpio12_pins[] = { 12 };
118 static unsigned gpio13_pins[] = { 13 };
119 static unsigned gpio14_pins[] = { 14 };
120 static unsigned gpio15_pins[] = { 15 };
121 static unsigned gpio16_pins[] = { 16 };
122 static unsigned gpio17_pins[] = { 17 };
123 static unsigned gpio18_pins[] = { 18 };
124 static unsigned gpio19_pins[] = { 19 };
125 static unsigned gpio20_pins[] = { 20 };
126 static unsigned gpio21_pins[] = { 21 };
127 static unsigned gpio22_pins[] = { 22 };
128 static unsigned gpio23_pins[] = { 23 };
129 static unsigned gpio24_pins[] = { 24 };
130 static unsigned gpio25_pins[] = { 25 };
131 static unsigned gpio26_pins[] = { 26 };
132 static unsigned gpio27_pins[] = { 27 };
133 static unsigned gpio28_pins[] = { 28 };
134 static unsigned gpio29_pins[] = { 29 };
135 static unsigned gpio30_pins[] = { 30 };
136 static unsigned gpio31_pins[] = { 31 };
137 static unsigned gpio32_pins[] = { 32 };
138 static unsigned gpio33_pins[] = { 33 };
139 static unsigned gpio34_pins[] = { 34 };
140 static unsigned gpio35_pins[] = { 35 };
141 static unsigned gpio36_pins[] = { 36 };
142 static unsigned gpio37_pins[] = { 37 };
143 static unsigned gpio38_pins[] = { 38 };
144 static unsigned gpio39_pins[] = { 39 };
145 static unsigned gpio40_pins[] = { 40 };
146 static unsigned gpio41_pins[] = { 41 };
147 static unsigned gpio42_pins[] = { 42 };
148 static unsigned gpio43_pins[] = { 43 };
149 static unsigned gpio44_pins[] = { 44 };
150 static unsigned gpio45_pins[] = { 45 };
151 static unsigned gpio46_pins[] = { 46 };
152 static unsigned gpio47_pins[] = { 47 };
154 static unsigned nand_grp_pins[] = {
155 8, 12, 13, 14, 15, 16, 17,
156 18, 19, 20, 21, 22, 23, 27,
159 static struct pingroup bcm6362_groups[] = {
160 BCM_PIN_GROUP(gpio0),
161 BCM_PIN_GROUP(gpio1),
162 BCM_PIN_GROUP(gpio2),
163 BCM_PIN_GROUP(gpio3),
164 BCM_PIN_GROUP(gpio4),
165 BCM_PIN_GROUP(gpio5),
166 BCM_PIN_GROUP(gpio6),
167 BCM_PIN_GROUP(gpio7),
168 BCM_PIN_GROUP(gpio8),
169 BCM_PIN_GROUP(gpio9),
170 BCM_PIN_GROUP(gpio10),
171 BCM_PIN_GROUP(gpio11),
172 BCM_PIN_GROUP(gpio12),
173 BCM_PIN_GROUP(gpio13),
174 BCM_PIN_GROUP(gpio14),
175 BCM_PIN_GROUP(gpio15),
176 BCM_PIN_GROUP(gpio16),
177 BCM_PIN_GROUP(gpio17),
178 BCM_PIN_GROUP(gpio18),
179 BCM_PIN_GROUP(gpio19),
180 BCM_PIN_GROUP(gpio20),
181 BCM_PIN_GROUP(gpio21),
182 BCM_PIN_GROUP(gpio22),
183 BCM_PIN_GROUP(gpio23),
184 BCM_PIN_GROUP(gpio24),
185 BCM_PIN_GROUP(gpio25),
186 BCM_PIN_GROUP(gpio26),
187 BCM_PIN_GROUP(gpio27),
188 BCM_PIN_GROUP(gpio28),
189 BCM_PIN_GROUP(gpio29),
190 BCM_PIN_GROUP(gpio30),
191 BCM_PIN_GROUP(gpio31),
192 BCM_PIN_GROUP(gpio32),
193 BCM_PIN_GROUP(gpio33),
194 BCM_PIN_GROUP(gpio34),
195 BCM_PIN_GROUP(gpio35),
196 BCM_PIN_GROUP(gpio36),
197 BCM_PIN_GROUP(gpio37),
198 BCM_PIN_GROUP(gpio38),
199 BCM_PIN_GROUP(gpio39),
200 BCM_PIN_GROUP(gpio40),
201 BCM_PIN_GROUP(gpio41),
202 BCM_PIN_GROUP(gpio42),
203 BCM_PIN_GROUP(gpio43),
204 BCM_PIN_GROUP(gpio44),
205 BCM_PIN_GROUP(gpio45),
206 BCM_PIN_GROUP(gpio46),
207 BCM_PIN_GROUP(gpio47),
208 BCM_PIN_GROUP(nand_grp),
211 static const char * const led_groups[] = {
238 static const char * const usb_device_led_groups[] = {
242 static const char * const sys_irq_groups[] = {
246 static const char * const serial_led_clk_groups[] = {
250 static const char * const serial_led_data_groups[] = {
254 static const char * const robosw_led_data_groups[] = {
258 static const char * const robosw_led_clk_groups[] = {
262 static const char * const robosw_led0_groups[] = {
266 static const char * const robosw_led1_groups[] = {
270 static const char * const inet_led_groups[] = {
274 static const char * const spi_cs2_groups[] = {
278 static const char * const spi_cs3_groups[] = {
282 static const char * const ntr_pulse_groups[] = {
286 static const char * const uart1_scts_groups[] = {
290 static const char * const uart1_srts_groups[] = {
294 static const char * const uart1_sdin_groups[] = {
298 static const char * const uart1_sdout_groups[] = {
302 static const char * const adsl_spi_miso_groups[] = {
306 static const char * const adsl_spi_mosi_groups[] = {
310 static const char * const adsl_spi_clk_groups[] = {
314 static const char * const adsl_spi_cs_groups[] = {
318 static const char * const ephy0_led_groups[] = {
322 static const char * const ephy1_led_groups[] = {
326 static const char * const ephy2_led_groups[] = {
330 static const char * const ephy3_led_groups[] = {
334 static const char * const ext_irq0_groups[] = {
338 static const char * const ext_irq1_groups[] = {
342 static const char * const ext_irq2_groups[] = {
346 static const char * const ext_irq3_groups[] = {
350 static const char * const wifi_groups[] = {
369 static const char * const nand_groups[] = {
373 #define BCM6362_LED_FUN(n) \
376 .groups = n##_groups, \
377 .num_groups = ARRAY_SIZE(n##_groups), \
378 .reg = BCM6362_LEDCTRL, \
381 #define BCM6362_MODE_FUN(n) \
384 .groups = n##_groups, \
385 .num_groups = ARRAY_SIZE(n##_groups), \
386 .reg = BCM6362_MODE, \
389 #define BCM6362_CTRL_FUN(n) \
392 .groups = n##_groups, \
393 .num_groups = ARRAY_SIZE(n##_groups), \
394 .reg = BCM6362_CTRL, \
397 #define BCM6362_BASEMODE_FUN(n, mask) \
400 .groups = n##_groups, \
401 .num_groups = ARRAY_SIZE(n##_groups), \
402 .reg = BCM6362_BASEMODE, \
403 .basemode_mask = (mask), \
406 static const struct bcm6362_function bcm6362_funcs[] = {
407 BCM6362_LED_FUN(led),
408 BCM6362_MODE_FUN(usb_device_led),
409 BCM6362_MODE_FUN(sys_irq),
410 BCM6362_MODE_FUN(serial_led_clk),
411 BCM6362_MODE_FUN(serial_led_data),
412 BCM6362_MODE_FUN(robosw_led_data),
413 BCM6362_MODE_FUN(robosw_led_clk),
414 BCM6362_MODE_FUN(robosw_led0),
415 BCM6362_MODE_FUN(robosw_led1),
416 BCM6362_MODE_FUN(inet_led),
417 BCM6362_MODE_FUN(spi_cs2),
418 BCM6362_MODE_FUN(spi_cs3),
419 BCM6362_MODE_FUN(ntr_pulse),
420 BCM6362_MODE_FUN(uart1_scts),
421 BCM6362_MODE_FUN(uart1_srts),
422 BCM6362_MODE_FUN(uart1_sdin),
423 BCM6362_MODE_FUN(uart1_sdout),
424 BCM6362_MODE_FUN(adsl_spi_miso),
425 BCM6362_MODE_FUN(adsl_spi_mosi),
426 BCM6362_MODE_FUN(adsl_spi_clk),
427 BCM6362_MODE_FUN(adsl_spi_cs),
428 BCM6362_MODE_FUN(ephy0_led),
429 BCM6362_MODE_FUN(ephy1_led),
430 BCM6362_MODE_FUN(ephy2_led),
431 BCM6362_MODE_FUN(ephy3_led),
432 BCM6362_MODE_FUN(ext_irq0),
433 BCM6362_MODE_FUN(ext_irq1),
434 BCM6362_MODE_FUN(ext_irq2),
435 BCM6362_MODE_FUN(ext_irq3),
436 BCM6362_CTRL_FUN(wifi),
437 BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND),
440 static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
442 return ARRAY_SIZE(bcm6362_groups);
445 static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
448 return bcm6362_groups[group].name;
451 static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
452 unsigned group, const unsigned **pins,
455 *pins = bcm6362_groups[group].pins;
456 *npins = bcm6362_groups[group].npins;
461 static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
463 return ARRAY_SIZE(bcm6362_funcs);
466 static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
469 return bcm6362_funcs[selector].name;
472 static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev,
474 const char * const **groups,
475 unsigned * const num_groups)
477 *groups = bcm6362_funcs[selector].groups;
478 *num_groups = bcm6362_funcs[selector].num_groups;
483 static void bcm6362_set_gpio(struct bcm63xx_pinctrl *pc, unsigned pin)
485 const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin];
486 unsigned int basemode = (uintptr_t)desc->drv_data;
487 unsigned int mask = bcm63xx_bank_pin(pin);
490 regmap_update_bits(pc->regs, BCM6362_BASEMODE_REG, basemode, 0);
492 if (pin < BCM63XX_BANK_GPIOS) {
493 /* base mode 0 => gpio 1 => mux function */
494 regmap_update_bits(pc->regs, BCM6362_MODE_REG, mask, 0);
496 /* pins 0-23 might be muxed to led */
497 if (pin < BCM6362_NUM_LEDS)
498 regmap_update_bits(pc->regs, BCM6362_LED_REG, mask, 0);
500 /* ctrl reg 0 => wifi function 1 => gpio */
501 regmap_update_bits(pc->regs, BCM6362_CTRL_REG, mask, mask);
505 static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev,
506 unsigned selector, unsigned group)
508 struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
509 const struct pingroup *pg = &bcm6362_groups[group];
510 const struct bcm6362_function *f = &bcm6362_funcs[selector];
513 unsigned int val, mask;
515 for (i = 0; i < pg->npins; i++)
516 bcm6362_set_gpio(pc, pg->pins[i]);
519 case BCM6362_LEDCTRL:
520 reg = BCM6362_LED_REG;
521 mask = BIT(pg->pins[0]);
522 val = BIT(pg->pins[0]);
525 reg = BCM6362_MODE_REG;
526 mask = BIT(pg->pins[0]);
527 val = BIT(pg->pins[0]);
530 reg = BCM6362_CTRL_REG;
531 mask = BIT(pg->pins[0]);
534 case BCM6362_BASEMODE:
535 reg = BCM6362_BASEMODE_REG;
536 mask = f->basemode_mask;
537 val = f->basemode_mask;
544 regmap_update_bits(pc->regs, reg, mask, val);
549 static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev,
550 struct pinctrl_gpio_range *range,
553 struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
555 /* disable all functions using this pin */
556 bcm6362_set_gpio(pc, offset);
561 static const struct pinctrl_ops bcm6362_pctl_ops = {
562 .dt_free_map = pinctrl_utils_free_map,
563 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
564 .get_group_name = bcm6362_pinctrl_get_group_name,
565 .get_group_pins = bcm6362_pinctrl_get_group_pins,
566 .get_groups_count = bcm6362_pinctrl_get_group_count,
569 static const struct pinmux_ops bcm6362_pmx_ops = {
570 .get_function_groups = bcm6362_pinctrl_get_groups,
571 .get_function_name = bcm6362_pinctrl_get_func_name,
572 .get_functions_count = bcm6362_pinctrl_get_func_count,
573 .gpio_request_enable = bcm6362_gpio_request_enable,
574 .set_mux = bcm6362_pinctrl_set_mux,
578 static const struct bcm63xx_pinctrl_soc bcm6362_soc = {
579 .ngpios = BCM6362_NUM_GPIOS,
580 .npins = ARRAY_SIZE(bcm6362_pins),
581 .pctl_ops = &bcm6362_pctl_ops,
582 .pins = bcm6362_pins,
583 .pmx_ops = &bcm6362_pmx_ops,
586 static int bcm6362_pinctrl_probe(struct platform_device *pdev)
588 return bcm63xx_pinctrl_probe(pdev, &bcm6362_soc, NULL);
591 static const struct of_device_id bcm6362_pinctrl_match[] = {
592 { .compatible = "brcm,bcm6362-pinctrl", },
596 static struct platform_driver bcm6362_pinctrl_driver = {
597 .probe = bcm6362_pinctrl_probe,
599 .name = "bcm6362-pinctrl",
600 .of_match_table = bcm6362_pinctrl_match,
604 builtin_platform_driver(bcm6362_pinctrl_driver);