1 # SPDX-License-Identifier: GPL-2.0-only
3 # PINCTRL infrastructure and drivers
11 config GENERIC_PINCTRL_GROUPS
15 bool "Support pin multiplexing controllers" if COMPILE_TEST
17 config GENERIC_PINMUX_FUNCTIONS
22 bool "Support pin configuration controllers" if COMPILE_TEST
24 config GENERIC_PINCONF
29 bool "Debug PINCTRL calls"
30 depends on DEBUG_KERNEL
32 Say Y here to add some extra checks and diagnostics to PINCTRL calls.
34 config PINCTRL_APPLE_GPIO
35 tristate "Apple SoC GPIO pin controller driver"
39 select GPIOLIB_IRQCHIP
40 select GENERIC_PINCTRL_GROUPS
41 select GENERIC_PINMUX_FUNCTIONS
44 This is the driver for the GPIO controller found on Apple ARM SoCs,
47 This driver can also be built as a module. If so, the module
48 will be called pinctrl-apple-gpio.
50 config PINCTRL_ARTPEC6
51 bool "Axis ARTPEC-6 pin controller driver"
52 depends on MACH_ARTPEC6
54 select GENERIC_PINCONF
56 This is the driver for the Axis ARTPEC-6 pin controller. This driver
57 supports pin function multiplexing as well as pin bias and drive
58 strength configuration. Device tree integration instructions can be
59 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
62 tristate "Pinctrl and GPIO driver for ams AS3722 PMIC"
63 depends on MFD_AS3722 && GPIOLIB
65 select GENERIC_PINCONF
67 AS3722 device supports the configuration of GPIO pins for different
68 functionality. This driver supports the pinmux, push-pull and
69 open drain configuration for the GPIO pins of AS3722 devices. It also
70 supports the GPIO functionality through gpiolib.
73 tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
77 select GENERIC_PINCONF
80 AXP PMICs provides multiple GPIOs that can be muxed for different
81 functions. This driver bundles a pinctrl driver to select the function
82 muxing and a GPIO driver to handle the GPIO when the GPIO function is
84 Say yes to enable pinctrl and GPIO support for the AXP209 PMIC
87 bool "AT91 pinctrl driver"
94 select GPIOLIB_IRQCHIP
96 Say Y here to enable the at91 pinctrl driver
98 config PINCTRL_AT91PIO4
99 bool "AT91 PIO4 pinctrl driver"
102 depends on ARCH_AT91 || COMPILE_TEST
104 select GENERIC_PINCONF
106 select GPIOLIB_IRQCHIP
109 Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4
110 controller available on sama5d2 SoC.
113 tristate "AMD GPIO pin control"
115 depends on ACPI || COMPILE_TEST
117 select GPIOLIB_IRQCHIP
120 select GENERIC_PINCONF
122 driver for memory mapped GPIO functionality on AMD platforms
123 (x86 or arm).Most pins are usually muxed to some other
124 functionality by firmware,so only a small amount is available
127 Requires ACPI/FDT device enumeration code to set up a platform
130 config PINCTRL_BM1880
131 bool "Bitmain BM1880 Pinctrl driver"
132 depends on OF && (ARCH_BITMAIN || COMPILE_TEST)
136 Pinctrl driver for Bitmain BM1880 SoC.
138 config PINCTRL_DA850_PUPD
139 tristate "TI DA850/OMAP-L138/AM18XX pullup/pulldown groups"
140 depends on OF && (ARCH_DAVINCI_DA850 || COMPILE_TEST)
142 select GENERIC_PINCONF
144 Driver for TI DA850/OMAP-L138/AM18XX pinconf. Used to control
145 pullup/pulldown pin groups.
147 config PINCTRL_DA9062
148 tristate "Dialog Semiconductor DA9062 PMIC pinctrl and GPIO Support"
149 depends on MFD_DA9062
152 The Dialog DA9062 PMIC provides multiple GPIOs that can be muxed for
153 different functions. This driver bundles a pinctrl driver to select the
154 function muxing and a GPIO driver to handle the GPIO when the GPIO
155 function is selected.
157 Say yes to enable pinctrl and GPIO support for the DA9062 PMIC.
159 config PINCTRL_DIGICOLOR
161 depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST)
163 select GENERIC_PINCONF
165 config PINCTRL_LANTIQ
171 config PINCTRL_LPC18XX
172 bool "NXP LPC18XX/43XX SCU pinctrl driver"
173 depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
176 select GENERIC_PINCONF
178 Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
180 config PINCTRL_FALCON
182 depends on SOC_FALCON
183 depends on PINCTRL_LANTIQ
185 config PINCTRL_GEMINI
187 depends on ARCH_GEMINI
190 select GENERIC_PINCONF
193 config PINCTRL_MCP23S08_I2C
197 config PINCTRL_MCP23S08_SPI
201 config PINCTRL_MCP23S08
202 tristate "Microchip MCP23xxx I/O expander"
203 depends on SPI_MASTER || I2C
205 select GPIOLIB_IRQCHIP
206 select GENERIC_PINCONF
207 select PINCTRL_MCP23S08_I2C if I2C
208 select PINCTRL_MCP23S08_SPI if SPI_MASTER
210 SPI/I2C driver for Microchip MCP23S08 / MCP23S17 / MCP23S18 /
211 MCP23008 / MCP23017 / MCP23018 I/O expanders.
212 This provides a GPIO interface supporting inputs and outputs and a
213 corresponding interrupt-controller.
220 select GENERIC_PINCONF
223 select GPIOLIB_IRQCHIP
226 config PINCTRL_ROCKCHIP
227 tristate "Rockchip gpio and pinctrl driver"
228 depends on ARCH_ROCKCHIP || COMPILE_TEST
232 select GENERIC_PINCONF
233 select GENERIC_IRQ_CHIP
236 default ARCH_ROCKCHIP
238 This support pinctrl and gpio driver for Rockchip SoCs.
240 config PINCTRL_SINGLE
241 tristate "One-register-per-pin type device tree based pinctrl driver"
244 select GENERIC_PINCTRL_GROUPS
245 select GENERIC_PINMUX_FUNCTIONS
246 select GENERIC_PINCONF
248 This selects the device tree based generic pinctrl driver.
250 config PINCTRL_SX150X
251 bool "Semtech SX150x I2C GPIO expander pinctrl driver"
255 select GENERIC_PINCONF
257 select GPIOLIB_IRQCHIP
260 Say yes here to provide support for Semtech SX150x-series I2C
261 GPIO expanders as pinctrl module.
262 Compatible models include:
263 - 8 bits: sx1508q, sx1502q
264 - 16 bits: sx1509q, sx1506q
266 config PINCTRL_PISTACHIO
267 bool "IMG Pistachio SoC pinctrl driver"
268 depends on OF && (MIPS || COMPILE_TEST)
271 select GENERIC_PINCONF
272 select GPIOLIB_IRQCHIP
275 This support pinctrl and gpio driver for IMG Pistachio SoC.
282 select GPIOLIB_IRQCHIP
284 config PINCTRL_STARFIVE
285 tristate "Pinctrl and GPIO driver for the StarFive JH7100 SoC"
286 depends on SOC_STARFIVE || COMPILE_TEST
289 select GENERIC_PINCTRL_GROUPS
290 select GENERIC_PINMUX_FUNCTIONS
291 select GENERIC_PINCONF
293 select GPIOLIB_IRQCHIP
296 Say yes here to support pin control on the StarFive JH7100 SoC.
297 This also provides an interface to the GPIO pins not used by other
298 peripherals supporting inputs, outputs, configuring pull-up/pull-down
299 and interrupts on input changes.
302 tristate "STMicroelectronics STMFX GPIO expander pinctrl driver"
305 select GENERIC_PINCONF
306 select GPIOLIB_IRQCHIP
309 Driver for STMicroelectronics Multi-Function eXpander (STMFX)
311 This provides a GPIO interface supporting inputs and outputs,
312 and configuring push-pull, open-drain, and can also be used as
313 interrupt-controller.
315 config PINCTRL_MAX77620
316 tristate "MAX77620/MAX20024 Pincontrol support"
317 depends on MFD_MAX77620 && OF
319 select GENERIC_PINCONF
321 Say Yes here to enable Pin control support for Maxim PMIC MAX77620.
322 This PMIC has 8 GPIO pins that work as GPIO as well as special
323 function in alternate mode. This driver also configure push-pull,
324 open drain, FPS slots etc.
326 config PINCTRL_PALMAS
327 tristate "Pinctrl driver for the PALMAS Series MFD devices"
328 depends on OF && MFD_PALMAS
330 select GENERIC_PINCONF
332 Palmas device supports the configuration of pins for different
333 functionality. This driver supports the pinmux, push-pull and
334 open drain configuration for the Palmas series devices like
335 TPS65913, TPS80036 etc.
338 bool "Microchip PIC32 pin controller driver"
340 depends on MACH_PIC32
342 select GENERIC_PINCONF
343 select GPIOLIB_IRQCHIP
346 This is the pin controller and gpio driver for Microchip PIC32
347 microcontrollers. This option is selected automatically when specific
348 machine and arch are selected to build.
350 config PINCTRL_PIC32MZDA
351 def_bool y if PIC32MZDA
355 bool "Pinctrl driver for Xilinx Zynq"
358 select GENERIC_PINCONF
360 This selects the pinctrl driver for Xilinx Zynq.
362 config PINCTRL_ZYNQMP
363 tristate "Pinctrl driver for Xilinx ZynqMP"
364 depends on ZYNQMP_FIRMWARE
366 select GENERIC_PINCONF
367 default ZYNQMP_FIRMWARE
369 This selects the pinctrl driver for Xilinx ZynqMP platform.
370 This driver will query the pin information from the firmware
371 and allow configuring the pins.
372 Configuration can include the mux function to select on those
373 pin(s)/group(s), and various pin configuration parameters
374 such as pull-up, slew rate, etc.
375 This driver can also be built as a module. If so, the module
376 will be called pinctrl-zynqmp.
378 config PINCTRL_INGENIC
379 bool "Pinctrl driver for the Ingenic JZ47xx SoCs"
382 depends on MIPS || COMPILE_TEST
383 select GENERIC_PINCONF
384 select GENERIC_PINCTRL_GROUPS
385 select GENERIC_PINMUX_FUNCTIONS
387 select GPIOLIB_IRQCHIP
391 tristate "Pinctrl and GPIO driver for RK805 PMIC"
395 select GENERIC_PINCONF
397 This selects the pinctrl driver for RK805.
399 config PINCTRL_OCELOT
400 bool "Pinctrl driver for the Microsemi Ocelot and Jaguar2 SoCs"
404 select GPIOLIB_IRQCHIP
405 select GENERIC_PINCONF
406 select GENERIC_PINCTRL_GROUPS
407 select GENERIC_PINMUX_FUNCTIONS
411 config PINCTRL_MICROCHIP_SGPIO
412 bool "Pinctrl driver for Microsemi/Microchip Serial GPIO"
416 select GPIOLIB_IRQCHIP
417 select GENERIC_PINCONF
418 select GENERIC_PINCTRL_GROUPS
419 select GENERIC_PINMUX_FUNCTIONS
422 Support for the serial GPIO interface used on Microsemi and
423 Microchip SoC's. By using a serial interface, the SIO
424 controller significantly extends the number of available
425 GPIOs with a minimum number of additional pins on the
426 device. The primary purpose of the SIO controller is to
427 connect control signals from SFP modules and to act as an
431 bool "Pinctrl driver for the Canaan Kendryte K210 SoC"
432 depends on RISCV && SOC_CANAAN && OF
433 select GENERIC_PINMUX_FUNCTIONS
434 select GENERIC_PINCONF
440 Add support for the Canaan Kendryte K210 RISC-V SOC Field
441 Programmable IO Array (FPIOA) controller.
443 config PINCTRL_KEEMBAY
444 tristate "Pinctrl driver for Intel Keem Bay SoC"
445 depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST)
449 select GENERIC_PINCONF
450 select GENERIC_PINCTRL_GROUPS
451 select GENERIC_PINMUX_FUNCTIONS
453 select GPIOLIB_IRQCHIP
456 This selects pin control driver for the Intel Keembay SoC.
457 It provides pin config functions such as pullup, pulldown,
458 interrupt, drive strength, sec lock, schmitt trigger, slew
459 rate control and direction control. This module will be
460 called as pinctrl-keembay.
462 source "drivers/pinctrl/actions/Kconfig"
463 source "drivers/pinctrl/aspeed/Kconfig"
464 source "drivers/pinctrl/bcm/Kconfig"
465 source "drivers/pinctrl/berlin/Kconfig"
466 source "drivers/pinctrl/freescale/Kconfig"
467 source "drivers/pinctrl/intel/Kconfig"
468 source "drivers/pinctrl/mvebu/Kconfig"
469 source "drivers/pinctrl/nomadik/Kconfig"
470 source "drivers/pinctrl/nuvoton/Kconfig"
471 source "drivers/pinctrl/pxa/Kconfig"
472 source "drivers/pinctrl/qcom/Kconfig"
473 source "drivers/pinctrl/ralink/Kconfig"
474 source "drivers/pinctrl/renesas/Kconfig"
475 source "drivers/pinctrl/samsung/Kconfig"
476 source "drivers/pinctrl/spear/Kconfig"
477 source "drivers/pinctrl/sprd/Kconfig"
478 source "drivers/pinctrl/stm32/Kconfig"
479 source "drivers/pinctrl/sunxi/Kconfig"
480 source "drivers/pinctrl/tegra/Kconfig"
481 source "drivers/pinctrl/ti/Kconfig"
482 source "drivers/pinctrl/uniphier/Kconfig"
483 source "drivers/pinctrl/vt8500/Kconfig"
484 source "drivers/pinctrl/mediatek/Kconfig"
485 source "drivers/pinctrl/meson/Kconfig"
486 source "drivers/pinctrl/cirrus/Kconfig"
487 source "drivers/pinctrl/visconti/Kconfig"
491 depends on SOC_TYPE_XWAY
492 depends on PINCTRL_LANTIQ
496 depends on OF && ARC_PLAT_TB10X
499 config PINCTRL_EQUILIBRIUM
500 tristate "Generic pinctrl and GPIO driver for Intel Lightning Mountain SoC"
501 depends on OF && HAS_IOMEM
502 depends on X86 || COMPILE_TEST
507 select GPIOLIB_IRQCHIP
508 select GENERIC_PINCONF
509 select GENERIC_PINCTRL_GROUPS
510 select GENERIC_PINMUX_FUNCTIONS
513 Equilibrium pinctrl driver is a pinctrl & GPIO driver for Intel Lightning
514 Mountain network processor SoC that supports both the linux GPIO and pin
515 control frameworks. It provides interfaces to setup pinmux, assign desired
516 pin functions, configure GPIO attributes for LGM SoC pins. Pinmux and
517 pinconf settings are retrieved from device tree.