virtio_ring: rename vring_unmap_state_packed() to vring_unmap_extra_packed()
[linux-2.6-microblaze.git] / drivers / phy / ti / phy-twl4030-usb.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
4  *
5  * Copyright (C) 2004-2007 Texas Instruments
6  * Copyright (C) 2008 Nokia Corporation
7  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
8  *
9  * Current status:
10  *      - HS USB ULPI mode works.
11  *      - 3-pin mode support may be added in future.
12  */
13
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/platform_device.h>
18 #include <linux/workqueue.h>
19 #include <linux/io.h>
20 #include <linux/delay.h>
21 #include <linux/usb/otg.h>
22 #include <linux/phy/phy.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/usb/musb.h>
25 #include <linux/usb/ulpi.h>
26 #include <linux/mfd/twl.h>
27 #include <linux/regulator/consumer.h>
28 #include <linux/err.h>
29 #include <linux/slab.h>
30
31 /* Register defines */
32
33 #define MCPC_CTRL                       0x30
34 #define MCPC_CTRL_RTSOL                 (1 << 7)
35 #define MCPC_CTRL_EXTSWR                (1 << 6)
36 #define MCPC_CTRL_EXTSWC                (1 << 5)
37 #define MCPC_CTRL_VOICESW               (1 << 4)
38 #define MCPC_CTRL_OUT64K                (1 << 3)
39 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
40 #define MCPC_CTRL_HS_UART               (1 << 0)
41
42 #define MCPC_IO_CTRL                    0x33
43 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
44 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
45 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
46 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
47 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
48 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
49
50 #define MCPC_CTRL2                      0x36
51 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
52
53 #define OTHER_FUNC_CTRL                 0x80
54 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
55 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
56
57 #define OTHER_IFC_CTRL                  0x83
58 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
59 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
60 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
61 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
62 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
63 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
64
65 #define OTHER_INT_EN_RISE               0x86
66 #define OTHER_INT_EN_FALL               0x89
67 #define OTHER_INT_STS                   0x8C
68 #define OTHER_INT_LATCH                 0x8D
69 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
70 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
71 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
72 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
73 #define OTHER_INT_MANU                  (1 << 1)
74 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
75
76 #define ID_STATUS                       0x96
77 #define ID_RES_FLOAT                    (1 << 4)
78 #define ID_RES_440K                     (1 << 3)
79 #define ID_RES_200K                     (1 << 2)
80 #define ID_RES_102K                     (1 << 1)
81 #define ID_RES_GND                      (1 << 0)
82
83 #define POWER_CTRL                      0xAC
84 #define POWER_CTRL_OTG_ENAB             (1 << 5)
85
86 #define OTHER_IFC_CTRL2                 0xAF
87 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
88 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
89 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
90 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
91 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
92 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
93
94 #define REG_CTRL_EN                     0xB2
95 #define REG_CTRL_ERROR                  0xB5
96 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
97
98 #define OTHER_FUNC_CTRL2                0xB8
99 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
100
101 /* following registers do not have separate _clr and _set registers */
102 #define VBUS_DEBOUNCE                   0xC0
103 #define ID_DEBOUNCE                     0xC1
104 #define VBAT_TIMER                      0xD3
105 #define PHY_PWR_CTRL                    0xFD
106 #define PHY_PWR_PHYPWD                  (1 << 0)
107 #define PHY_CLK_CTRL                    0xFE
108 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
109 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
110 #define REQ_PHY_DPLL_CLK                (1 << 0)
111 #define PHY_CLK_CTRL_STS                0xFF
112 #define PHY_DPLL_CLK                    (1 << 0)
113
114 /* In module TWL_MODULE_PM_MASTER */
115 #define STS_HW_CONDITIONS               0x0F
116
117 /* In module TWL_MODULE_PM_RECEIVER */
118 #define VUSB_DEDICATED1                 0x7D
119 #define VUSB_DEDICATED2                 0x7E
120 #define VUSB1V5_DEV_GRP                 0x71
121 #define VUSB1V5_TYPE                    0x72
122 #define VUSB1V5_REMAP                   0x73
123 #define VUSB1V8_DEV_GRP                 0x74
124 #define VUSB1V8_TYPE                    0x75
125 #define VUSB1V8_REMAP                   0x76
126 #define VUSB3V1_DEV_GRP                 0x77
127 #define VUSB3V1_TYPE                    0x78
128 #define VUSB3V1_REMAP                   0x79
129
130 /* In module TWL4030_MODULE_INTBR */
131 #define PMBR1                           0x0D
132 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
133
134 static irqreturn_t twl4030_usb_irq(int irq, void *_twl);
135 /*
136  * If VBUS is valid or ID is ground, then we know a
137  * cable is present and we need to be runtime-enabled
138  */
139 static inline bool cable_present(enum musb_vbus_id_status stat)
140 {
141         return stat == MUSB_VBUS_VALID ||
142                 stat == MUSB_ID_GROUND;
143 }
144
145 struct twl4030_usb {
146         struct usb_phy          phy;
147         struct device           *dev;
148
149         /* TWL4030 internal USB regulator supplies */
150         struct regulator        *usb1v5;
151         struct regulator        *usb1v8;
152         struct regulator        *usb3v1;
153
154         /* for vbus reporting with irqs disabled */
155         struct mutex            lock;
156
157         /* pin configuration */
158         enum twl4030_usb_mode   usb_mode;
159
160         int                     irq;
161         enum musb_vbus_id_status linkstat;
162         atomic_t                connected;
163         bool                    vbus_supplied;
164         bool                    musb_mailbox_pending;
165         unsigned long           runtime_suspended:1;
166         unsigned long           needs_resume:1;
167
168         struct delayed_work     id_workaround_work;
169 };
170
171 /* internal define on top of container_of */
172 #define phy_to_twl(x)           container_of((x), struct twl4030_usb, phy)
173
174 /*-------------------------------------------------------------------------*/
175
176 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
177                 u8 module, u8 data, u8 address)
178 {
179         u8 check = 0xFF;
180
181         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
182             (twl_i2c_read_u8(module, &check, address) >= 0) &&
183                                                 (check == data))
184                 return 0;
185         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
186                         1, module, address, check, data);
187
188         /* Failed once: Try again */
189         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
190             (twl_i2c_read_u8(module, &check, address) >= 0) &&
191                                                 (check == data))
192                 return 0;
193         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
194                         2, module, address, check, data);
195
196         /* Failed again: Return error */
197         return -EBUSY;
198 }
199
200 #define twl4030_usb_write_verify(twl, address, data)    \
201         twl4030_i2c_write_u8_verify(twl, TWL_MODULE_USB, (data), (address))
202
203 static inline int twl4030_usb_write(struct twl4030_usb *twl,
204                 u8 address, u8 data)
205 {
206         int ret = 0;
207
208         ret = twl_i2c_write_u8(TWL_MODULE_USB, data, address);
209         if (ret < 0)
210                 dev_dbg(twl->dev,
211                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
212         return ret;
213 }
214
215 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
216 {
217         u8 data;
218         int ret = 0;
219
220         ret = twl_i2c_read_u8(module, &data, address);
221         if (ret >= 0)
222                 ret = data;
223         else
224                 dev_dbg(twl->dev,
225                         "TWL4030:readb[0x%x,0x%x] Error %d\n",
226                                         module, address, ret);
227
228         return ret;
229 }
230
231 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
232 {
233         return twl4030_readb(twl, TWL_MODULE_USB, address);
234 }
235
236 /*-------------------------------------------------------------------------*/
237
238 static inline int
239 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
240 {
241         return twl4030_usb_write(twl, ULPI_SET(reg), bits);
242 }
243
244 static inline int
245 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
246 {
247         return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
248 }
249
250 /*-------------------------------------------------------------------------*/
251
252 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
253 {
254         int ret;
255
256         ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
257         if (ret < 0 || !(ret & PHY_DPLL_CLK))
258                 /*
259                  * if clocks are off, registers are not updated,
260                  * but we can assume we don't drive VBUS in this case
261                  */
262                 return false;
263
264         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
265         if (ret < 0)
266                 return false;
267
268         return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
269 }
270
271 static enum musb_vbus_id_status
272         twl4030_usb_linkstat(struct twl4030_usb *twl)
273 {
274         int     status;
275         enum musb_vbus_id_status linkstat = MUSB_UNKNOWN;
276
277         twl->vbus_supplied = false;
278
279         /*
280          * For ID/VBUS sensing, see manual section 15.4.8 ...
281          * except when using only battery backup power, two
282          * comparators produce VBUS_PRES and ID_PRES signals,
283          * which don't match docs elsewhere.  But ... BIT(7)
284          * and BIT(2) of STS_HW_CONDITIONS, respectively, do
285          * seem to match up.  If either is true the USB_PRES
286          * signal is active, the OTG module is activated, and
287          * its interrupt may be raised (may wake the system).
288          */
289         status = twl4030_readb(twl, TWL_MODULE_PM_MASTER, STS_HW_CONDITIONS);
290         if (status < 0)
291                 dev_err(twl->dev, "USB link status err %d\n", status);
292         else if (status & (BIT(7) | BIT(2))) {
293                 if (status & BIT(7)) {
294                         if (twl4030_is_driving_vbus(twl))
295                                 status &= ~BIT(7);
296                         else
297                                 twl->vbus_supplied = true;
298                 }
299
300                 if (status & BIT(2))
301                         linkstat = MUSB_ID_GROUND;
302                 else if (status & BIT(7))
303                         linkstat = MUSB_VBUS_VALID;
304                 else
305                         linkstat = MUSB_VBUS_OFF;
306         } else {
307                 if (twl->linkstat != MUSB_UNKNOWN)
308                         linkstat = MUSB_VBUS_OFF;
309         }
310
311         kobject_uevent(&twl->dev->kobj, linkstat == MUSB_VBUS_VALID
312                                         ? KOBJ_ONLINE : KOBJ_OFFLINE);
313
314         dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
315                         status, status, linkstat);
316
317         /* REVISIT this assumes host and peripheral controllers
318          * are registered, and that both are active...
319          */
320
321         return linkstat;
322 }
323
324 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
325 {
326         twl->usb_mode = mode;
327
328         switch (mode) {
329         case T2_USB_MODE_ULPI:
330                 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
331                                         ULPI_IFC_CTRL_CARKITMODE);
332                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
333                 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
334                                         ULPI_FUNC_CTRL_XCVRSEL_MASK |
335                                         ULPI_FUNC_CTRL_OPMODE_MASK);
336                 break;
337         case -1:
338                 /* FIXME: power on defaults */
339                 break;
340         default:
341                 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
342                                 mode);
343                 break;
344         }
345 }
346
347 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
348 {
349         unsigned long timeout;
350         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
351
352         if (val >= 0) {
353                 if (on) {
354                         /* enable DPLL to access PHY registers over I2C */
355                         val |= REQ_PHY_DPLL_CLK;
356                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
357                                                 (u8)val) < 0);
358
359                         timeout = jiffies + HZ;
360                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
361                                                         PHY_DPLL_CLK)
362                                 && time_before(jiffies, timeout))
363                                         udelay(10);
364                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
365                                                         PHY_DPLL_CLK))
366                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
367                                                 "PHY DPLL clock\n");
368                 } else {
369                         /* let ULPI control the DPLL clock */
370                         val &= ~REQ_PHY_DPLL_CLK;
371                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
372                                                 (u8)val) < 0);
373                 }
374         }
375 }
376
377 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
378 {
379         u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
380
381         if (on)
382                 pwr &= ~PHY_PWR_PHYPWD;
383         else
384                 pwr |= PHY_PWR_PHYPWD;
385
386         WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
387 }
388
389 static int twl4030_usb_runtime_suspend(struct device *dev);
390 static int twl4030_usb_runtime_resume(struct device *dev);
391
392 static int __maybe_unused twl4030_usb_suspend(struct device *dev)
393 {
394         struct twl4030_usb *twl = dev_get_drvdata(dev);
395
396         /*
397          * we need enabled runtime on resume,
398          * so turn irq off here, so we do not get it early
399          * note: wakeup on usb plug works independently of this
400          */
401         dev_dbg(twl->dev, "%s\n", __func__);
402         disable_irq(twl->irq);
403         if (!twl->runtime_suspended && !atomic_read(&twl->connected)) {
404                 twl4030_usb_runtime_suspend(dev);
405                 twl->needs_resume = 1;
406         }
407
408         return 0;
409 }
410
411 static int __maybe_unused twl4030_usb_resume(struct device *dev)
412 {
413         struct twl4030_usb *twl = dev_get_drvdata(dev);
414
415         dev_dbg(twl->dev, "%s\n", __func__);
416         enable_irq(twl->irq);
417         if (twl->needs_resume)
418                 twl4030_usb_runtime_resume(dev);
419         /* check whether cable status changed */
420         twl4030_usb_irq(0, twl);
421
422         twl->runtime_suspended = 0;
423
424         return 0;
425 }
426
427 static int __maybe_unused twl4030_usb_runtime_suspend(struct device *dev)
428 {
429         struct twl4030_usb *twl = dev_get_drvdata(dev);
430
431         dev_dbg(twl->dev, "%s\n", __func__);
432
433         __twl4030_phy_power(twl, 0);
434         regulator_disable(twl->usb1v5);
435         regulator_disable(twl->usb1v8);
436         regulator_disable(twl->usb3v1);
437
438         twl->runtime_suspended = 1;
439
440         return 0;
441 }
442
443 static int __maybe_unused twl4030_usb_runtime_resume(struct device *dev)
444 {
445         struct twl4030_usb *twl = dev_get_drvdata(dev);
446         int res;
447
448         dev_dbg(twl->dev, "%s\n", __func__);
449
450         res = regulator_enable(twl->usb3v1);
451         if (res)
452                 dev_err(twl->dev, "Failed to enable usb3v1\n");
453
454         res = regulator_enable(twl->usb1v8);
455         if (res)
456                 dev_err(twl->dev, "Failed to enable usb1v8\n");
457
458         /*
459          * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
460          * in twl4030) resets the VUSB_DEDICATED2 register. This reset
461          * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
462          * SLEEP. We work around this by clearing the bit after usv3v1
463          * is re-activated. This ensures that VUSB3V1 is really active.
464          */
465         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
466
467         res = regulator_enable(twl->usb1v5);
468         if (res)
469                 dev_err(twl->dev, "Failed to enable usb1v5\n");
470
471         __twl4030_phy_power(twl, 1);
472         twl4030_usb_write(twl, PHY_CLK_CTRL,
473                           twl4030_usb_read(twl, PHY_CLK_CTRL) |
474                           (PHY_CLK_CTRL_CLOCKGATING_EN |
475                            PHY_CLK_CTRL_CLK32K_EN));
476
477         twl4030_i2c_access(twl, 1);
478         twl4030_usb_set_mode(twl, twl->usb_mode);
479         if (twl->usb_mode == T2_USB_MODE_ULPI)
480                 twl4030_i2c_access(twl, 0);
481         /*
482          * According to the TPS65950 TRM, there has to be at least 50ms
483          * delay between setting POWER_CTRL_OTG_ENAB and enabling charging
484          * so wait here so that a fully enabled phy can be expected after
485          * resume
486          */
487         msleep(50);
488         return 0;
489 }
490
491 static int twl4030_phy_power_off(struct phy *phy)
492 {
493         struct twl4030_usb *twl = phy_get_drvdata(phy);
494
495         dev_dbg(twl->dev, "%s\n", __func__);
496
497         return 0;
498 }
499
500 static int twl4030_phy_power_on(struct phy *phy)
501 {
502         struct twl4030_usb *twl = phy_get_drvdata(phy);
503
504         dev_dbg(twl->dev, "%s\n", __func__);
505         pm_runtime_get_sync(twl->dev);
506         schedule_delayed_work(&twl->id_workaround_work, HZ);
507         pm_runtime_mark_last_busy(twl->dev);
508         pm_runtime_put_autosuspend(twl->dev);
509
510         return 0;
511 }
512
513 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
514 {
515         /* Enable writing to power configuration registers */
516         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
517                          TWL4030_PM_MASTER_PROTECT_KEY);
518
519         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
520                          TWL4030_PM_MASTER_PROTECT_KEY);
521
522         /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
523         /*twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
524
525         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
526         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
527
528         /* Initialize 3.1V regulator */
529         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
530
531         twl->usb3v1 = devm_regulator_get(twl->dev, "usb3v1");
532         if (IS_ERR(twl->usb3v1))
533                 return -ENODEV;
534
535         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
536
537         /* Initialize 1.5V regulator */
538         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
539
540         twl->usb1v5 = devm_regulator_get(twl->dev, "usb1v5");
541         if (IS_ERR(twl->usb1v5))
542                 return -ENODEV;
543
544         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
545
546         /* Initialize 1.8V regulator */
547         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
548
549         twl->usb1v8 = devm_regulator_get(twl->dev, "usb1v8");
550         if (IS_ERR(twl->usb1v8))
551                 return -ENODEV;
552
553         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
554
555         /* disable access to power configuration registers */
556         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
557                          TWL4030_PM_MASTER_PROTECT_KEY);
558
559         return 0;
560 }
561
562 static ssize_t vbus_show(struct device *dev,
563                          struct device_attribute *attr, char *buf)
564 {
565         struct twl4030_usb *twl = dev_get_drvdata(dev);
566         int ret = -EINVAL;
567
568         mutex_lock(&twl->lock);
569         ret = sprintf(buf, "%s\n",
570                         twl->vbus_supplied ? "on" : "off");
571         mutex_unlock(&twl->lock);
572
573         return ret;
574 }
575 static DEVICE_ATTR_RO(vbus);
576
577 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
578 {
579         struct twl4030_usb *twl = _twl;
580         enum musb_vbus_id_status status;
581         int err;
582
583         status = twl4030_usb_linkstat(twl);
584
585         mutex_lock(&twl->lock);
586         twl->linkstat = status;
587         mutex_unlock(&twl->lock);
588
589         if (cable_present(status)) {
590                 if (atomic_add_unless(&twl->connected, 1, 1)) {
591                         dev_dbg(twl->dev, "%s: cable connected %i\n",
592                                 __func__, status);
593                         pm_runtime_get_sync(twl->dev);
594                         twl->musb_mailbox_pending = true;
595                 }
596         } else {
597                 if (atomic_add_unless(&twl->connected, -1, 0)) {
598                         dev_dbg(twl->dev, "%s: cable disconnected %i\n",
599                                 __func__, status);
600                         pm_runtime_mark_last_busy(twl->dev);
601                         pm_runtime_put_autosuspend(twl->dev);
602                         twl->musb_mailbox_pending = true;
603                 }
604         }
605         if (twl->musb_mailbox_pending) {
606                 err = musb_mailbox(status);
607                 if (!err)
608                         twl->musb_mailbox_pending = false;
609         }
610
611         /* don't schedule during sleep - irq works right then */
612         if (status == MUSB_ID_GROUND && pm_runtime_active(twl->dev)) {
613                 cancel_delayed_work(&twl->id_workaround_work);
614                 schedule_delayed_work(&twl->id_workaround_work, HZ);
615         }
616
617         if (irq)
618                 sysfs_notify(&twl->dev->kobj, NULL, "vbus");
619
620         return IRQ_HANDLED;
621 }
622
623 static void twl4030_id_workaround_work(struct work_struct *work)
624 {
625         struct twl4030_usb *twl = container_of(work, struct twl4030_usb,
626                 id_workaround_work.work);
627
628         twl4030_usb_irq(0, twl);
629 }
630
631 static int twl4030_phy_init(struct phy *phy)
632 {
633         struct twl4030_usb *twl = phy_get_drvdata(phy);
634
635         pm_runtime_get_sync(twl->dev);
636         twl->linkstat = MUSB_UNKNOWN;
637         schedule_delayed_work(&twl->id_workaround_work, HZ);
638         pm_runtime_mark_last_busy(twl->dev);
639         pm_runtime_put_autosuspend(twl->dev);
640
641         return 0;
642 }
643
644 static int twl4030_set_peripheral(struct usb_otg *otg,
645                                         struct usb_gadget *gadget)
646 {
647         if (!otg)
648                 return -ENODEV;
649
650         otg->gadget = gadget;
651         if (!gadget)
652                 otg->state = OTG_STATE_UNDEFINED;
653
654         return 0;
655 }
656
657 static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host)
658 {
659         if (!otg)
660                 return -ENODEV;
661
662         otg->host = host;
663         if (!host)
664                 otg->state = OTG_STATE_UNDEFINED;
665
666         return 0;
667 }
668
669 static const struct phy_ops ops = {
670         .init           = twl4030_phy_init,
671         .power_on       = twl4030_phy_power_on,
672         .power_off      = twl4030_phy_power_off,
673         .owner          = THIS_MODULE,
674 };
675
676 static const struct dev_pm_ops twl4030_usb_pm_ops = {
677         SET_RUNTIME_PM_OPS(twl4030_usb_runtime_suspend,
678                            twl4030_usb_runtime_resume, NULL)
679         SET_SYSTEM_SLEEP_PM_OPS(twl4030_usb_suspend, twl4030_usb_resume)
680 };
681
682 static int twl4030_usb_probe(struct platform_device *pdev)
683 {
684         struct twl4030_usb_data *pdata = dev_get_platdata(&pdev->dev);
685         struct twl4030_usb      *twl;
686         struct phy              *phy;
687         int                     status, err;
688         struct usb_otg          *otg;
689         struct device_node      *np = pdev->dev.of_node;
690         struct phy_provider     *phy_provider;
691
692         twl = devm_kzalloc(&pdev->dev, sizeof(*twl), GFP_KERNEL);
693         if (!twl)
694                 return -ENOMEM;
695
696         if (np)
697                 of_property_read_u32(np, "usb_mode",
698                                 (enum twl4030_usb_mode *)&twl->usb_mode);
699         else if (pdata) {
700                 twl->usb_mode = pdata->usb_mode;
701         } else {
702                 dev_err(&pdev->dev, "twl4030 initialized without pdata\n");
703                 return -EINVAL;
704         }
705
706         otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
707         if (!otg)
708                 return -ENOMEM;
709
710         twl->dev                = &pdev->dev;
711         twl->irq                = platform_get_irq(pdev, 0);
712         twl->vbus_supplied      = false;
713         twl->linkstat           = MUSB_UNKNOWN;
714         twl->musb_mailbox_pending = false;
715
716         twl->phy.dev            = twl->dev;
717         twl->phy.label          = "twl4030";
718         twl->phy.otg            = otg;
719         twl->phy.type           = USB_PHY_TYPE_USB2;
720
721         otg->usb_phy            = &twl->phy;
722         otg->set_host           = twl4030_set_host;
723         otg->set_peripheral     = twl4030_set_peripheral;
724
725         phy = devm_phy_create(twl->dev, NULL, &ops);
726         if (IS_ERR(phy)) {
727                 dev_dbg(&pdev->dev, "Failed to create PHY\n");
728                 return PTR_ERR(phy);
729         }
730
731         phy_set_drvdata(phy, twl);
732
733         phy_provider = devm_of_phy_provider_register(twl->dev,
734                 of_phy_simple_xlate);
735         if (IS_ERR(phy_provider))
736                 return PTR_ERR(phy_provider);
737
738         /* init mutex for workqueue */
739         mutex_init(&twl->lock);
740
741         INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work);
742
743         err = twl4030_usb_ldo_init(twl);
744         if (err) {
745                 dev_err(&pdev->dev, "ldo init failed\n");
746                 return err;
747         }
748         usb_add_phy_dev(&twl->phy);
749
750         platform_set_drvdata(pdev, twl);
751         if (device_create_file(&pdev->dev, &dev_attr_vbus))
752                 dev_warn(&pdev->dev, "could not create sysfs file\n");
753
754         ATOMIC_INIT_NOTIFIER_HEAD(&twl->phy.notifier);
755
756         pm_runtime_use_autosuspend(&pdev->dev);
757         pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
758         pm_runtime_enable(&pdev->dev);
759         pm_runtime_get_sync(&pdev->dev);
760
761         /* Our job is to use irqs and status from the power module
762          * to keep the transceiver disabled when nothing's connected.
763          *
764          * FIXME we actually shouldn't start enabling it until the
765          * USB controller drivers have said they're ready, by calling
766          * set_host() and/or set_peripheral() ... OTG_capable boards
767          * need both handles, otherwise just one suffices.
768          */
769         status = devm_request_threaded_irq(twl->dev, twl->irq, NULL,
770                         twl4030_usb_irq, IRQF_TRIGGER_FALLING |
771                         IRQF_TRIGGER_RISING | IRQF_ONESHOT, "twl4030_usb", twl);
772         if (status < 0) {
773                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
774                         twl->irq, status);
775                 return status;
776         }
777
778         if (pdata)
779                 err = phy_create_lookup(phy, "usb", "musb-hdrc.0");
780         if (err)
781                 return err;
782
783         pm_runtime_mark_last_busy(&pdev->dev);
784         pm_runtime_put_autosuspend(twl->dev);
785
786         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
787         return 0;
788 }
789
790 static int twl4030_usb_remove(struct platform_device *pdev)
791 {
792         struct twl4030_usb *twl = platform_get_drvdata(pdev);
793         int val;
794
795         usb_remove_phy(&twl->phy);
796         pm_runtime_get_sync(twl->dev);
797         cancel_delayed_work_sync(&twl->id_workaround_work);
798         device_remove_file(twl->dev, &dev_attr_vbus);
799
800         /* set transceiver mode to power on defaults */
801         twl4030_usb_set_mode(twl, -1);
802
803         /* idle ulpi before powering off */
804         if (cable_present(twl->linkstat))
805                 pm_runtime_put_noidle(twl->dev);
806         pm_runtime_mark_last_busy(twl->dev);
807         pm_runtime_dont_use_autosuspend(&pdev->dev);
808         pm_runtime_put_sync(twl->dev);
809         pm_runtime_disable(twl->dev);
810
811         /* autogate 60MHz ULPI clock,
812          * clear dpll clock request for i2c access,
813          * disable 32KHz
814          */
815         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
816         if (val >= 0) {
817                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
818                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
819                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
820         }
821
822         /* disable complete OTG block */
823         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
824
825         return 0;
826 }
827
828 #ifdef CONFIG_OF
829 static const struct of_device_id twl4030_usb_id_table[] = {
830         { .compatible = "ti,twl4030-usb" },
831         {}
832 };
833 MODULE_DEVICE_TABLE(of, twl4030_usb_id_table);
834 #endif
835
836 static struct platform_driver twl4030_usb_driver = {
837         .probe          = twl4030_usb_probe,
838         .remove         = twl4030_usb_remove,
839         .driver         = {
840                 .name   = "twl4030_usb",
841                 .pm     = &twl4030_usb_pm_ops,
842                 .of_match_table = of_match_ptr(twl4030_usb_id_table),
843         },
844 };
845
846 static int __init twl4030_usb_init(void)
847 {
848         return platform_driver_register(&twl4030_usb_driver);
849 }
850 subsys_initcall(twl4030_usb_init);
851
852 static void __exit twl4030_usb_exit(void)
853 {
854         platform_driver_unregister(&twl4030_usb_driver);
855 }
856 module_exit(twl4030_usb_exit);
857
858 MODULE_ALIAS("platform:twl4030_usb");
859 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
860 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
861 MODULE_LICENSE("GPL");