1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Qualcomm and Atheros platforms
6 tristate "Atheros AR71XX/9XXX USB PHY driver"
7 depends on OF && (ATH79 || COMPILE_TEST)
8 default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM
9 select RESET_CONTROLLER
12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
14 config PHY_QCOM_APQ8064_SATA
15 tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
22 tristate "Qualcomm eDP PHY driver"
23 depends on ARCH_QCOM || COMPILE_TEST
28 Enable this driver to support the Qualcomm eDP PHY found in various
31 config PHY_QCOM_IPQ4019_USB
32 tristate "Qualcomm IPQ4019 USB PHY driver"
33 depends on OF && (ARCH_QCOM || COMPILE_TEST)
36 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
38 config PHY_QCOM_IPQ806X_SATA
39 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
46 tristate "Qualcomm PCIe Gen2 PHY Driver"
47 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
50 Enable this to support the Qualcomm PCIe PHY, used with the Synopsys
51 based PCIe controller.
53 menuconfig PHY_QCOM_QMP
54 tristate "Qualcomm QMP PHY Drivers"
55 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
59 config PHY_QCOM_QMP_COMBO
60 tristate "Qualcomm QMP Combo PHY Driver"
62 depends on TYPEC || TYPEC=n
63 depends on DRM || DRM=n
66 select DRM_AUX_BRIDGE if DRM_BRIDGE
68 Enable this to support the QMP Combo PHY transceiver that is used
69 with USB3 and DisplayPort controllers on Qualcomm chips.
71 config PHY_QCOM_QMP_PCIE
72 tristate "Qualcomm QMP PCIe PHY Driver"
73 depends on PCI || COMPILE_TEST
77 Enable this to support the QMP PCIe PHY transceiver that is used
78 with PCIe controllers on Qualcomm chips.
80 config PHY_QCOM_QMP_PCIE_8996
81 tristate "Qualcomm QMP PCIe 8996 PHY Driver"
82 depends on PCI || COMPILE_TEST
86 Enable this to support the QMP PCIe PHY transceiver that is used
87 with PCIe controllers on Qualcomm msm8996 chips.
89 config PHY_QCOM_QMP_UFS
90 tristate "Qualcomm QMP UFS PHY Driver"
94 Enable this to support the QMP UFS PHY transceiver that is used
95 with UFS controllers on Qualcomm chips.
97 config PHY_QCOM_QMP_USB
98 tristate "Qualcomm QMP USB PHY Driver"
102 Enable this to support the QMP USB PHY transceiver that is used
103 with USB3 controllers on Qualcomm chips.
105 config PHY_QCOM_QMP_USB_LEGACY
106 tristate "Qualcomm QMP legacy USB PHY Driver"
110 Enable this legacy driver to support the QMP USB+DisplayPort Combo
111 PHY transceivers working only in USB3 mode on Qualcomm chips. This
112 driver exists only for compatibility with older device trees,
113 existing users have been migrated to PHY_QCOM_QMP_COMBO driver.
117 config PHY_QCOM_QUSB2
118 tristate "Qualcomm QUSB2 PHY Driver"
119 depends on OF && (ARCH_QCOM || COMPILE_TEST)
120 depends on NVMEM || !NVMEM
123 Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
124 controllers on Qualcomm chips. This driver supports the high-speed
125 PHY which is usually paired with either the ChipIdea or Synopsys DWC3
128 config PHY_QCOM_SNPS_EUSB2
129 tristate "Qualcomm SNPS eUSB2 PHY Driver"
130 depends on OF && (ARCH_QCOM || COMPILE_TEST)
133 Enable support for the USB high-speed SNPS eUSB2 phy on Qualcomm
134 chipsets. The PHY is paired with a Synopsys DWC3 USB controller
137 config PHY_QCOM_EUSB2_REPEATER
138 tristate "Qualcomm SNPS eUSB2 Repeater Driver"
139 depends on OF && (ARCH_QCOM || COMPILE_TEST)
142 Enable support for the USB high-speed SNPS eUSB2 repeater on Qualcomm
143 PMICs. The repeater is paired with a Synopsys eUSB2 Phy
146 config PHY_QCOM_M31_USB
147 tristate "Qualcomm M31 HS PHY driver support"
148 depends on USB && (ARCH_QCOM || COMPILE_TEST)
151 Enable this to support M31 HS PHY transceivers on Qualcomm chips
152 with DWC3 USB core. It handles PHY initialization, clock
153 management required after resetting the hardware and power
154 management. This driver is required even for peripheral only or
155 host only mode configurations.
157 config PHY_QCOM_USB_HS
158 tristate "Qualcomm USB HS PHY module"
159 depends on USB_ULPI_BUS
160 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
163 Support for the USB high-speed ULPI compliant phy on Qualcomm
166 config PHY_QCOM_USB_SNPS_FEMTO_V2
167 tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module"
168 depends on OF && (ARCH_QCOM || COMPILE_TEST)
171 Enable support for the USB high-speed SNPS Femto phy on Qualcomm
172 chipsets. This PHY has differences in the register map compared
173 to the V1 variants. The PHY is paired with a Synopsys DWC3 USB
174 controller on Qualcomm SOCs.
176 config PHY_QCOM_USB_HSIC
177 tristate "Qualcomm USB HSIC ULPI PHY module"
178 depends on USB_ULPI_BUS
181 Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
183 config PHY_QCOM_USB_HS_28NM
184 tristate "Qualcomm 28nm High-Speed PHY"
185 depends on OF && (ARCH_QCOM || COMPILE_TEST)
186 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
189 Enable this to support the Qualcomm Synopsys DesignWare Core 28nm
190 High-Speed PHY driver. This driver supports the Hi-Speed PHY which
191 is usually paired with either the ChipIdea or Synopsys DWC3 USB
194 config PHY_QCOM_USB_SS
195 tristate "Qualcomm USB Super-Speed PHY driver"
196 depends on OF && (ARCH_QCOM || COMPILE_TEST)
197 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
200 Enable this to support the Super-Speed USB transceiver on various
203 config PHY_QCOM_IPQ806X_USB
204 tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
206 depends on OF && (ARCH_QCOM || COMPILE_TEST)
209 This option enables support for the Synopsis PHYs present inside the
210 Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports
211 both HS and SS PHY controllers.
213 config PHY_QCOM_SGMII_ETH
214 tristate "Qualcomm DWMAC SGMII SerDes/PHY driver"
215 depends on OF && (ARCH_QCOM || COMPILE_TEST)
219 Enable this to support the internal SerDes/SGMII PHY on various