1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2010 Broadcom Corporation.
9 #include <linux/delay.h>
10 #include <linux/export.h>
11 #include <linux/sched/signal.h>
14 /* VPD access through PCI 2.2+ VPD capability */
17 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
18 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
22 const struct pci_vpd_ops *ops;
31 static struct pci_dev *pci_get_func0_dev(struct pci_dev *dev)
33 return pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
37 * pci_read_vpd - Read one entry from Vital Product Data
38 * @dev: pci device struct
39 * @pos: offset in vpd space
40 * @count: number of bytes to read
41 * @buf: pointer to where to store result
43 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
45 if (!dev->vpd || !dev->vpd->ops)
47 return dev->vpd->ops->read(dev, pos, count, buf);
49 EXPORT_SYMBOL(pci_read_vpd);
52 * pci_write_vpd - Write entry to Vital Product Data
53 * @dev: pci device struct
54 * @pos: offset in vpd space
55 * @count: number of bytes to write
56 * @buf: buffer containing write data
58 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
60 if (!dev->vpd || !dev->vpd->ops)
62 return dev->vpd->ops->write(dev, pos, count, buf);
64 EXPORT_SYMBOL(pci_write_vpd);
66 #define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1)
69 * pci_vpd_size - determine actual size of Vital Product Data
70 * @dev: pci device struct
71 * @old_size: current assumed size, also maximum allowed size
73 static size_t pci_vpd_size(struct pci_dev *dev, size_t old_size)
76 unsigned char header[1+2]; /* 1 byte tag, 2 bytes length */
78 while (off < old_size && pci_read_vpd(dev, off, 1, header) == 1) {
81 if (!header[0] && !off) {
82 pci_info(dev, "Invalid VPD tag 00, assume missing optional VPD EPROM\n");
86 if (header[0] & PCI_VPD_LRDT) {
87 /* Large Resource Data Type Tag */
88 tag = pci_vpd_lrdt_tag(header);
89 /* Only read length from known tag items */
90 if ((tag == PCI_VPD_LTIN_ID_STRING) ||
91 (tag == PCI_VPD_LTIN_RO_DATA) ||
92 (tag == PCI_VPD_LTIN_RW_DATA)) {
93 if (pci_read_vpd(dev, off+1, 2,
95 pci_warn(dev, "invalid large VPD tag %02x size at offset %zu",
99 off += PCI_VPD_LRDT_TAG_SIZE +
100 pci_vpd_lrdt_size(header);
103 /* Short Resource Data Type Tag */
104 off += PCI_VPD_SRDT_TAG_SIZE +
105 pci_vpd_srdt_size(header);
106 tag = pci_vpd_srdt_tag(header);
109 if (tag == PCI_VPD_STIN_END) /* End tag descriptor */
112 if ((tag != PCI_VPD_LTIN_ID_STRING) &&
113 (tag != PCI_VPD_LTIN_RO_DATA) &&
114 (tag != PCI_VPD_LTIN_RW_DATA)) {
115 pci_warn(dev, "invalid %s VPD tag %02x at offset %zu",
116 (header[0] & PCI_VPD_LRDT) ? "large" : "short",
125 * Wait for last operation to complete.
126 * This code has to spin since there is no other notification from the PCI
127 * hardware. Since the VPD is often implemented by serial attachment to an
128 * EEPROM, it may take many milliseconds to complete.
130 * Returns 0 on success, negative values indicate error.
132 static int pci_vpd_wait(struct pci_dev *dev)
134 struct pci_vpd *vpd = dev->vpd;
135 unsigned long timeout = jiffies + msecs_to_jiffies(125);
136 unsigned long max_sleep = 16;
144 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
149 if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
154 if (fatal_signal_pending(current))
157 if (time_after(jiffies, timeout))
160 usleep_range(10, max_sleep);
161 if (max_sleep < 1024)
165 pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n");
169 static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count,
172 struct pci_vpd *vpd = dev->vpd;
174 loff_t end = pos + count;
182 vpd->len = pci_vpd_size(dev, vpd->len);
191 if (end > vpd->len) {
196 if (mutex_lock_killable(&vpd->lock))
199 ret = pci_vpd_wait(dev);
205 unsigned int i, skip;
207 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
212 vpd->flag = PCI_VPD_ADDR_F;
213 ret = pci_vpd_wait(dev);
217 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
222 for (i = 0; i < sizeof(u32); i++) {
232 mutex_unlock(&vpd->lock);
233 return ret ? ret : count;
236 static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count,
239 struct pci_vpd *vpd = dev->vpd;
241 loff_t end = pos + count;
244 if (pos < 0 || (pos & 3) || (count & 3))
249 vpd->len = pci_vpd_size(dev, vpd->len);
258 if (mutex_lock_killable(&vpd->lock))
261 ret = pci_vpd_wait(dev);
273 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, val);
276 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
277 pos | PCI_VPD_ADDR_F);
283 ret = pci_vpd_wait(dev);
290 mutex_unlock(&vpd->lock);
291 return ret ? ret : count;
294 static const struct pci_vpd_ops pci_vpd_ops = {
295 .read = pci_vpd_read,
296 .write = pci_vpd_write,
299 static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count,
302 struct pci_dev *tdev = pci_get_func0_dev(dev);
308 ret = pci_read_vpd(tdev, pos, count, arg);
313 static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count,
316 struct pci_dev *tdev = pci_get_func0_dev(dev);
322 ret = pci_write_vpd(tdev, pos, count, arg);
327 static const struct pci_vpd_ops pci_vpd_f0_ops = {
328 .read = pci_vpd_f0_read,
329 .write = pci_vpd_f0_write,
332 void pci_vpd_init(struct pci_dev *dev)
337 cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
341 vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
345 vpd->len = PCI_VPD_MAX_SIZE;
346 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0)
347 vpd->ops = &pci_vpd_f0_ops;
349 vpd->ops = &pci_vpd_ops;
350 mutex_init(&vpd->lock);
357 void pci_vpd_release(struct pci_dev *dev)
362 static ssize_t vpd_read(struct file *filp, struct kobject *kobj,
363 struct bin_attribute *bin_attr, char *buf, loff_t off,
366 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
368 return pci_read_vpd(dev, off, count, buf);
371 static ssize_t vpd_write(struct file *filp, struct kobject *kobj,
372 struct bin_attribute *bin_attr, char *buf, loff_t off,
375 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
377 return pci_write_vpd(dev, off, count, buf);
379 static BIN_ATTR(vpd, 0600, vpd_read, vpd_write, 0);
381 static struct bin_attribute *vpd_attrs[] = {
386 static umode_t vpd_attr_is_visible(struct kobject *kobj,
387 struct bin_attribute *a, int n)
389 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
397 const struct attribute_group pci_dev_vpd_attr_group = {
398 .bin_attrs = vpd_attrs,
399 .is_bin_visible = vpd_attr_is_visible,
402 int pci_vpd_find_tag(const u8 *buf, unsigned int len, u8 rdt)
406 /* look for LRDT tags only, end tag is the only SRDT tag */
407 while (i + PCI_VPD_LRDT_TAG_SIZE <= len && buf[i] & PCI_VPD_LRDT) {
411 i += PCI_VPD_LRDT_TAG_SIZE + pci_vpd_lrdt_size(buf + i);
416 EXPORT_SYMBOL_GPL(pci_vpd_find_tag);
418 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
419 unsigned int len, const char *kw)
423 for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) {
424 if (buf[i + 0] == kw[0] &&
428 i += PCI_VPD_INFO_FLD_HDR_SIZE +
429 pci_vpd_info_field_size(&buf[i]);
434 EXPORT_SYMBOL_GPL(pci_vpd_find_info_keyword);
436 #ifdef CONFIG_PCI_QUIRKS
438 * Quirk non-zero PCI functions to route VPD access through function 0 for
439 * devices that share VPD resources between functions. The functions are
440 * expected to be identical devices.
442 static void quirk_f0_vpd_link(struct pci_dev *dev)
446 if (!PCI_FUNC(dev->devfn))
449 f0 = pci_get_func0_dev(dev);
453 if (f0->vpd && dev->class == f0->class &&
454 dev->vendor == f0->vendor && dev->device == f0->device)
455 dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
459 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
460 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link);
463 * If a device follows the VPD format spec, the PCI core will not read or
464 * write past the VPD End Tag. But some vendors do not follow the VPD
465 * format spec, so we can't tell how much data is safe to access. Devices
466 * may behave unpredictably if we access too much. Blacklist these devices
467 * so we don't touch VPD at all.
469 static void quirk_blacklist_vpd(struct pci_dev *dev)
473 pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");
476 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd);
477 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd);
478 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd);
479 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd);
480 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd);
481 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd);
482 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd);
483 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd);
484 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd);
485 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd);
486 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd);
487 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID,
488 quirk_blacklist_vpd);
490 * The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port
491 * device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class.
493 DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031,
494 PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd);
496 static void pci_vpd_set_size(struct pci_dev *dev, size_t len)
498 struct pci_vpd *vpd = dev->vpd;
500 if (!vpd || len == 0 || len > PCI_VPD_MAX_SIZE)
507 static void quirk_chelsio_extend_vpd(struct pci_dev *dev)
509 int chip = (dev->device & 0xf000) >> 12;
510 int func = (dev->device & 0x0f00) >> 8;
511 int prod = (dev->device & 0x00ff) >> 0;
514 * If this is a T3-based adapter, there's a 1KB VPD area at offset
515 * 0xc00 which contains the preferred VPD values. If this is a T4 or
516 * later based adapter, the special VPD is at offset 0x400 for the
517 * Physical Functions (the SR-IOV Virtual Functions have no VPD
518 * Capabilities). The PCI VPD Access core routines will normally
519 * compute the size of the VPD by parsing the VPD Data Structure at
520 * offset 0x000. This will result in silent failures when attempting
521 * to accesses these other VPD areas which are beyond those computed
524 if (chip == 0x0 && prod >= 0x20)
525 pci_vpd_set_size(dev, 8192);
526 else if (chip >= 0x4 && func < 0x8)
527 pci_vpd_set_size(dev, 2048);
530 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
531 quirk_chelsio_extend_vpd);