1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2010 Broadcom Corporation.
9 #include <linux/delay.h>
10 #include <linux/export.h>
11 #include <linux/sched/signal.h>
14 /* VPD access through PCI 2.2+ VPD capability */
16 static struct pci_dev *pci_get_func0_dev(struct pci_dev *dev)
18 return pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
21 #define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1)
22 #define PCI_VPD_SZ_INVALID UINT_MAX
25 * pci_vpd_size - determine actual size of Vital Product Data
26 * @dev: pci device struct
28 static size_t pci_vpd_size(struct pci_dev *dev)
31 unsigned char tag, header[1+2]; /* 1 byte tag, 2 bytes length */
33 /* Otherwise the following reads would fail. */
34 dev->vpd.len = PCI_VPD_MAX_SIZE;
36 while (pci_read_vpd(dev, off, 1, header) == 1) {
39 if (off == 0 && (header[0] == 0x00 || header[0] == 0xff))
42 if (header[0] & PCI_VPD_LRDT) {
43 /* Large Resource Data Type Tag */
44 if (pci_read_vpd(dev, off + 1, 2, &header[1]) != 2) {
45 pci_warn(dev, "failed VPD read at offset %zu\n",
47 return off ?: PCI_VPD_SZ_INVALID;
49 size = pci_vpd_lrdt_size(header);
50 if (off + size > PCI_VPD_MAX_SIZE)
53 off += PCI_VPD_LRDT_TAG_SIZE + size;
55 /* Short Resource Data Type Tag */
56 tag = pci_vpd_srdt_tag(header);
57 size = pci_vpd_srdt_size(header);
58 if (off + size > PCI_VPD_MAX_SIZE)
61 off += PCI_VPD_SRDT_TAG_SIZE + size;
62 if (tag == PCI_VPD_STIN_END) /* End tag descriptor */
69 pci_info(dev, "invalid VPD tag %#04x (size %zu) at offset %zu%s\n",
70 header[0], size, off, off == 0 ?
71 "; assume missing optional EEPROM" : "");
72 return off ?: PCI_VPD_SZ_INVALID;
76 * Wait for last operation to complete.
77 * This code has to spin since there is no other notification from the PCI
78 * hardware. Since the VPD is often implemented by serial attachment to an
79 * EEPROM, it may take many milliseconds to complete.
80 * @set: if true wait for flag to be set, else wait for it to be cleared
82 * Returns 0 on success, negative values indicate error.
84 static int pci_vpd_wait(struct pci_dev *dev, bool set)
86 struct pci_vpd *vpd = &dev->vpd;
87 unsigned long timeout = jiffies + msecs_to_jiffies(125);
88 unsigned long max_sleep = 16;
93 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
98 if (!!(status & PCI_VPD_ADDR_F) == set)
101 if (time_after(jiffies, timeout))
104 usleep_range(10, max_sleep);
105 if (max_sleep < 1024)
109 pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n");
113 static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count,
116 struct pci_vpd *vpd = &dev->vpd;
118 loff_t end = pos + count;
130 if (end > vpd->len) {
135 if (mutex_lock_killable(&vpd->lock))
140 unsigned int i, skip;
142 if (fatal_signal_pending(current)) {
147 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
151 ret = pci_vpd_wait(dev, true);
155 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
160 for (i = 0; i < sizeof(u32); i++) {
170 mutex_unlock(&vpd->lock);
171 return ret ? ret : count;
174 static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count,
177 struct pci_vpd *vpd = &dev->vpd;
179 loff_t end = pos + count;
185 if (pos < 0 || (pos & 3) || (count & 3))
191 if (mutex_lock_killable(&vpd->lock))
202 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, val);
205 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
206 pos | PCI_VPD_ADDR_F);
210 ret = pci_vpd_wait(dev, false);
217 mutex_unlock(&vpd->lock);
218 return ret ? ret : count;
221 void pci_vpd_init(struct pci_dev *dev)
223 dev->vpd.cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
224 mutex_init(&dev->vpd.lock);
227 dev->vpd.len = pci_vpd_size(dev);
229 if (dev->vpd.len == PCI_VPD_SZ_INVALID)
233 static ssize_t vpd_read(struct file *filp, struct kobject *kobj,
234 struct bin_attribute *bin_attr, char *buf, loff_t off,
237 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
239 return pci_read_vpd(dev, off, count, buf);
242 static ssize_t vpd_write(struct file *filp, struct kobject *kobj,
243 struct bin_attribute *bin_attr, char *buf, loff_t off,
246 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
248 return pci_write_vpd(dev, off, count, buf);
250 static BIN_ATTR(vpd, 0600, vpd_read, vpd_write, 0);
252 static struct bin_attribute *vpd_attrs[] = {
257 static umode_t vpd_attr_is_visible(struct kobject *kobj,
258 struct bin_attribute *a, int n)
260 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
268 const struct attribute_group pci_dev_vpd_attr_group = {
269 .bin_attrs = vpd_attrs,
270 .is_bin_visible = vpd_attr_is_visible,
273 void *pci_vpd_alloc(struct pci_dev *dev, unsigned int *size)
275 unsigned int len = dev->vpd.len;
280 return ERR_PTR(-ENODEV);
282 buf = kmalloc(len, GFP_KERNEL);
284 return ERR_PTR(-ENOMEM);
286 cnt = pci_read_vpd(dev, 0, len, buf);
289 return ERR_PTR(-EIO);
297 EXPORT_SYMBOL_GPL(pci_vpd_alloc);
299 static int pci_vpd_find_tag(const u8 *buf, unsigned int len, u8 rdt, unsigned int *size)
303 /* look for LRDT tags only, end tag is the only SRDT tag */
304 while (i + PCI_VPD_LRDT_TAG_SIZE <= len && buf[i] & PCI_VPD_LRDT) {
305 unsigned int lrdt_len = pci_vpd_lrdt_size(buf + i);
308 i += PCI_VPD_LRDT_TAG_SIZE;
310 if (i + lrdt_len > len)
323 static int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
324 unsigned int len, const char *kw)
328 for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) {
329 if (buf[i + 0] == kw[0] &&
333 i += PCI_VPD_INFO_FLD_HDR_SIZE +
334 pci_vpd_info_field_size(&buf[i]);
341 * pci_read_vpd - Read one entry from Vital Product Data
342 * @dev: PCI device struct
343 * @pos: offset in VPD space
344 * @count: number of bytes to read
345 * @buf: pointer to where to store result
347 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
351 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
352 dev = pci_get_func0_dev(dev);
356 ret = pci_vpd_read(dev, pos, count, buf);
361 return pci_vpd_read(dev, pos, count, buf);
363 EXPORT_SYMBOL(pci_read_vpd);
366 * pci_write_vpd - Write entry to Vital Product Data
367 * @dev: PCI device struct
368 * @pos: offset in VPD space
369 * @count: number of bytes to write
370 * @buf: buffer containing write data
372 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
376 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
377 dev = pci_get_func0_dev(dev);
381 ret = pci_vpd_write(dev, pos, count, buf);
386 return pci_vpd_write(dev, pos, count, buf);
388 EXPORT_SYMBOL(pci_write_vpd);
390 int pci_vpd_find_ro_info_keyword(const void *buf, unsigned int len,
391 const char *kw, unsigned int *size)
393 int ro_start, infokw_start;
394 unsigned int ro_len, infokw_size;
396 ro_start = pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_RO_DATA, &ro_len);
400 infokw_start = pci_vpd_find_info_keyword(buf, ro_start, ro_len, kw);
401 if (infokw_start < 0)
404 infokw_size = pci_vpd_info_field_size(buf + infokw_start);
405 infokw_start += PCI_VPD_INFO_FLD_HDR_SIZE;
407 if (infokw_start + infokw_size > len)
415 EXPORT_SYMBOL_GPL(pci_vpd_find_ro_info_keyword);
417 int pci_vpd_check_csum(const void *buf, unsigned int len)
424 rv_start = pci_vpd_find_ro_info_keyword(buf, len, PCI_VPD_RO_KEYWORD_CHKSUM, &size);
425 if (rv_start == -ENOENT) /* no checksum in VPD */
427 else if (rv_start < 0)
433 while (rv_start >= 0)
434 csum += vpd[rv_start--];
436 return csum ? -EILSEQ : 0;
438 EXPORT_SYMBOL_GPL(pci_vpd_check_csum);
440 #ifdef CONFIG_PCI_QUIRKS
442 * Quirk non-zero PCI functions to route VPD access through function 0 for
443 * devices that share VPD resources between functions. The functions are
444 * expected to be identical devices.
446 static void quirk_f0_vpd_link(struct pci_dev *dev)
450 if (!PCI_FUNC(dev->devfn))
453 f0 = pci_get_func0_dev(dev);
457 if (f0->vpd.cap && dev->class == f0->class &&
458 dev->vendor == f0->vendor && dev->device == f0->device)
459 dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
463 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
464 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link);
467 * If a device follows the VPD format spec, the PCI core will not read or
468 * write past the VPD End Tag. But some vendors do not follow the VPD
469 * format spec, so we can't tell how much data is safe to access. Devices
470 * may behave unpredictably if we access too much. Blacklist these devices
471 * so we don't touch VPD at all.
473 static void quirk_blacklist_vpd(struct pci_dev *dev)
475 dev->vpd.len = PCI_VPD_SZ_INVALID;
476 pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");
478 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd);
479 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd);
480 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd);
481 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd);
482 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd);
483 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd);
484 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd);
485 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd);
486 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd);
487 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd);
488 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd);
489 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID, quirk_blacklist_vpd);
491 * The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port
492 * device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class.
494 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031,
495 PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd);
497 static void quirk_chelsio_extend_vpd(struct pci_dev *dev)
499 int chip = (dev->device & 0xf000) >> 12;
500 int func = (dev->device & 0x0f00) >> 8;
501 int prod = (dev->device & 0x00ff) >> 0;
504 * If this is a T3-based adapter, there's a 1KB VPD area at offset
505 * 0xc00 which contains the preferred VPD values. If this is a T4 or
506 * later based adapter, the special VPD is at offset 0x400 for the
507 * Physical Functions (the SR-IOV Virtual Functions have no VPD
508 * Capabilities). The PCI VPD Access core routines will normally
509 * compute the size of the VPD by parsing the VPD Data Structure at
510 * offset 0x000. This will result in silent failures when attempting
511 * to accesses these other VPD areas which are beyond those computed
514 if (chip == 0x0 && prod >= 0x20)
516 else if (chip >= 0x4 && func < 0x8)
520 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
521 quirk_chelsio_extend_vpd);