3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 * Copyright (C) 2016 Christoph Hellwig.
10 #include <linux/err.h>
12 #include <linux/irq.h>
13 #include <linux/interrupt.h>
14 #include <linux/export.h>
15 #include <linux/ioport.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
18 #include <linux/msi.h>
19 #include <linux/smp.h>
20 #include <linux/errno.h>
22 #include <linux/acpi_iort.h>
23 #include <linux/slab.h>
24 #include <linux/irqdomain.h>
25 #include <linux/of_irq.h>
29 static int pci_msi_enable = 1;
30 int pci_msi_ignore_mask;
32 #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
34 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
35 static struct irq_domain *pci_msi_default_domain;
36 static DEFINE_MUTEX(pci_msi_domain_lock);
38 struct irq_domain * __weak arch_get_pci_msi_domain(struct pci_dev *dev)
40 return pci_msi_default_domain;
43 static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev)
45 struct irq_domain *domain;
47 domain = dev_get_msi_domain(&dev->dev);
51 return arch_get_pci_msi_domain(dev);
54 static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
56 struct irq_domain *domain;
58 domain = pci_msi_get_domain(dev);
59 if (domain && irq_domain_is_hierarchy(domain))
60 return pci_msi_domain_alloc_irqs(domain, dev, nvec, type);
62 return arch_setup_msi_irqs(dev, nvec, type);
65 static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
67 struct irq_domain *domain;
69 domain = pci_msi_get_domain(dev);
70 if (domain && irq_domain_is_hierarchy(domain))
71 pci_msi_domain_free_irqs(domain, dev);
73 arch_teardown_msi_irqs(dev);
76 #define pci_msi_setup_msi_irqs arch_setup_msi_irqs
77 #define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
82 int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
84 struct msi_controller *chip = dev->bus->msi;
87 if (!chip || !chip->setup_irq)
90 err = chip->setup_irq(chip, dev, desc);
94 irq_set_chip_data(desc->irq, chip);
99 void __weak arch_teardown_msi_irq(unsigned int irq)
101 struct msi_controller *chip = irq_get_chip_data(irq);
103 if (!chip || !chip->teardown_irq)
106 chip->teardown_irq(chip, irq);
109 int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
111 struct msi_controller *chip = dev->bus->msi;
112 struct msi_desc *entry;
115 if (chip && chip->setup_irqs)
116 return chip->setup_irqs(chip, dev, nvec, type);
118 * If an architecture wants to support multiple MSI, it needs to
119 * override arch_setup_msi_irqs()
121 if (type == PCI_CAP_ID_MSI && nvec > 1)
124 for_each_pci_msi_entry(entry, dev) {
125 ret = arch_setup_msi_irq(dev, entry);
136 * We have a default implementation available as a separate non-weak
137 * function, as it is used by the Xen x86 PCI code
139 void default_teardown_msi_irqs(struct pci_dev *dev)
142 struct msi_desc *entry;
144 for_each_pci_msi_entry(entry, dev)
146 for (i = 0; i < entry->nvec_used; i++)
147 arch_teardown_msi_irq(entry->irq + i);
150 void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
152 return default_teardown_msi_irqs(dev);
155 static void default_restore_msi_irq(struct pci_dev *dev, int irq)
157 struct msi_desc *entry;
160 if (dev->msix_enabled) {
161 for_each_pci_msi_entry(entry, dev) {
162 if (irq == entry->irq)
165 } else if (dev->msi_enabled) {
166 entry = irq_get_msi_desc(irq);
170 __pci_write_msi_msg(entry, &entry->msg);
173 void __weak arch_restore_msi_irqs(struct pci_dev *dev)
175 return default_restore_msi_irqs(dev);
178 static inline __attribute_const__ u32 msi_mask(unsigned x)
180 /* Don't shift by >= width of type */
183 return (1 << (1 << x)) - 1;
187 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
188 * mask all MSI interrupts by clearing the MSI enable bit does not work
189 * reliably as devices without an INTx disable bit will then generate a
190 * level IRQ which will never be cleared.
192 u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
194 u32 mask_bits = desc->masked;
196 if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit)
201 pci_write_config_dword(msi_desc_to_pci_dev(desc), desc->mask_pos,
207 static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
209 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag);
212 static void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
214 return desc->mask_base +
215 desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
219 * This internal function does not flush PCI writes to the device.
220 * All users must ensure that they read from the device before either
221 * assuming that the device state is up to date, or returning out of this
222 * file. This saves a few milliseconds when initialising devices with lots
223 * of MSI-X interrupts.
225 u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
227 u32 mask_bits = desc->masked;
229 if (pci_msi_ignore_mask)
232 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
234 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
235 writel(mask_bits, pci_msix_desc_addr(desc) + PCI_MSIX_ENTRY_VECTOR_CTRL);
240 static void msix_mask_irq(struct msi_desc *desc, u32 flag)
242 desc->masked = __pci_msix_desc_mask_irq(desc, flag);
245 static void msi_set_mask_bit(struct irq_data *data, u32 flag)
247 struct msi_desc *desc = irq_data_get_msi_desc(data);
249 if (desc->msi_attrib.is_msix) {
250 msix_mask_irq(desc, flag);
251 readl(desc->mask_base); /* Flush write to device */
253 unsigned offset = data->irq - desc->irq;
254 msi_mask_irq(desc, 1 << offset, flag << offset);
259 * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts
260 * @data: pointer to irqdata associated to that interrupt
262 void pci_msi_mask_irq(struct irq_data *data)
264 msi_set_mask_bit(data, 1);
266 EXPORT_SYMBOL_GPL(pci_msi_mask_irq);
269 * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
270 * @data: pointer to irqdata associated to that interrupt
272 void pci_msi_unmask_irq(struct irq_data *data)
274 msi_set_mask_bit(data, 0);
276 EXPORT_SYMBOL_GPL(pci_msi_unmask_irq);
278 void default_restore_msi_irqs(struct pci_dev *dev)
280 struct msi_desc *entry;
282 for_each_pci_msi_entry(entry, dev)
283 default_restore_msi_irq(dev, entry->irq);
286 void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
288 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
290 BUG_ON(dev->current_state != PCI_D0);
292 if (entry->msi_attrib.is_msix) {
293 void __iomem *base = pci_msix_desc_addr(entry);
295 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
296 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
297 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
299 int pos = dev->msi_cap;
302 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
304 if (entry->msi_attrib.is_64) {
305 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
307 pci_read_config_word(dev, pos + PCI_MSI_DATA_64, &data);
310 pci_read_config_word(dev, pos + PCI_MSI_DATA_32, &data);
316 void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
318 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
320 if (dev->current_state != PCI_D0) {
321 /* Don't touch the hardware now */
322 } else if (entry->msi_attrib.is_msix) {
323 void __iomem *base = pci_msix_desc_addr(entry);
325 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
326 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
327 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
329 int pos = dev->msi_cap;
332 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
333 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
334 msgctl |= entry->msi_attrib.multiple << 4;
335 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl);
337 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
339 if (entry->msi_attrib.is_64) {
340 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
342 pci_write_config_word(dev, pos + PCI_MSI_DATA_64,
345 pci_write_config_word(dev, pos + PCI_MSI_DATA_32,
352 void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
354 struct msi_desc *entry = irq_get_msi_desc(irq);
356 __pci_write_msi_msg(entry, msg);
358 EXPORT_SYMBOL_GPL(pci_write_msi_msg);
360 static void free_msi_irqs(struct pci_dev *dev)
362 struct list_head *msi_list = dev_to_msi_list(&dev->dev);
363 struct msi_desc *entry, *tmp;
364 struct attribute **msi_attrs;
365 struct device_attribute *dev_attr;
368 for_each_pci_msi_entry(entry, dev)
370 for (i = 0; i < entry->nvec_used; i++)
371 BUG_ON(irq_has_action(entry->irq + i));
373 pci_msi_teardown_msi_irqs(dev);
375 list_for_each_entry_safe(entry, tmp, msi_list, list) {
376 if (entry->msi_attrib.is_msix) {
377 if (list_is_last(&entry->list, msi_list))
378 iounmap(entry->mask_base);
381 list_del(&entry->list);
385 if (dev->msi_irq_groups) {
386 sysfs_remove_groups(&dev->dev.kobj, dev->msi_irq_groups);
387 msi_attrs = dev->msi_irq_groups[0]->attrs;
388 while (msi_attrs[count]) {
389 dev_attr = container_of(msi_attrs[count],
390 struct device_attribute, attr);
391 kfree(dev_attr->attr.name);
396 kfree(dev->msi_irq_groups[0]);
397 kfree(dev->msi_irq_groups);
398 dev->msi_irq_groups = NULL;
402 static void pci_intx_for_msi(struct pci_dev *dev, int enable)
404 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
405 pci_intx(dev, enable);
408 static void __pci_restore_msi_state(struct pci_dev *dev)
411 struct msi_desc *entry;
413 if (!dev->msi_enabled)
416 entry = irq_get_msi_desc(dev->irq);
418 pci_intx_for_msi(dev, 0);
419 pci_msi_set_enable(dev, 0);
420 arch_restore_msi_irqs(dev);
422 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
423 msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
425 control &= ~PCI_MSI_FLAGS_QSIZE;
426 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
427 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
430 static void __pci_restore_msix_state(struct pci_dev *dev)
432 struct msi_desc *entry;
434 if (!dev->msix_enabled)
436 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
438 /* route the table */
439 pci_intx_for_msi(dev, 0);
440 pci_msix_clear_and_set_ctrl(dev, 0,
441 PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
443 arch_restore_msi_irqs(dev);
444 for_each_pci_msi_entry(entry, dev)
445 msix_mask_irq(entry, entry->masked);
447 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
450 void pci_restore_msi_state(struct pci_dev *dev)
452 __pci_restore_msi_state(dev);
453 __pci_restore_msix_state(dev);
455 EXPORT_SYMBOL_GPL(pci_restore_msi_state);
457 static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
460 struct msi_desc *entry;
464 retval = kstrtoul(attr->attr.name, 10, &irq);
468 entry = irq_get_msi_desc(irq);
470 return sprintf(buf, "%s\n",
471 entry->msi_attrib.is_msix ? "msix" : "msi");
476 static int populate_msi_sysfs(struct pci_dev *pdev)
478 struct attribute **msi_attrs;
479 struct attribute *msi_attr;
480 struct device_attribute *msi_dev_attr;
481 struct attribute_group *msi_irq_group;
482 const struct attribute_group **msi_irq_groups;
483 struct msi_desc *entry;
489 /* Determine how many msi entries we have */
490 for_each_pci_msi_entry(entry, pdev)
491 num_msi += entry->nvec_used;
495 /* Dynamically create the MSI attributes for the PCI device */
496 msi_attrs = kzalloc(sizeof(void *) * (num_msi + 1), GFP_KERNEL);
499 for_each_pci_msi_entry(entry, pdev) {
500 for (i = 0; i < entry->nvec_used; i++) {
501 msi_dev_attr = kzalloc(sizeof(*msi_dev_attr), GFP_KERNEL);
504 msi_attrs[count] = &msi_dev_attr->attr;
506 sysfs_attr_init(&msi_dev_attr->attr);
507 msi_dev_attr->attr.name = kasprintf(GFP_KERNEL, "%d",
509 if (!msi_dev_attr->attr.name)
511 msi_dev_attr->attr.mode = S_IRUGO;
512 msi_dev_attr->show = msi_mode_show;
517 msi_irq_group = kzalloc(sizeof(*msi_irq_group), GFP_KERNEL);
520 msi_irq_group->name = "msi_irqs";
521 msi_irq_group->attrs = msi_attrs;
523 msi_irq_groups = kzalloc(sizeof(void *) * 2, GFP_KERNEL);
525 goto error_irq_group;
526 msi_irq_groups[0] = msi_irq_group;
528 ret = sysfs_create_groups(&pdev->dev.kobj, msi_irq_groups);
530 goto error_irq_groups;
531 pdev->msi_irq_groups = msi_irq_groups;
536 kfree(msi_irq_groups);
538 kfree(msi_irq_group);
541 msi_attr = msi_attrs[count];
543 msi_dev_attr = container_of(msi_attr, struct device_attribute, attr);
544 kfree(msi_attr->name);
547 msi_attr = msi_attrs[count];
553 static struct msi_desc *
554 msi_setup_entry(struct pci_dev *dev, int nvec, bool affinity)
556 struct cpumask *masks = NULL;
557 struct msi_desc *entry;
561 masks = irq_create_affinity_masks(dev->irq_affinity, nvec);
563 pr_err("Unable to allocate affinity masks, ignoring\n");
566 /* MSI Entry Initialization */
567 entry = alloc_msi_entry(&dev->dev, nvec, masks);
571 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
573 entry->msi_attrib.is_msix = 0;
574 entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
575 entry->msi_attrib.entry_nr = 0;
576 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
577 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
578 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
579 entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
581 if (control & PCI_MSI_FLAGS_64BIT)
582 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
584 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
586 /* Save the initial mask status */
587 if (entry->msi_attrib.maskbit)
588 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
595 static int msi_verify_entries(struct pci_dev *dev)
597 struct msi_desc *entry;
599 for_each_pci_msi_entry(entry, dev) {
600 if (!dev->no_64bit_msi || !entry->msg.address_hi)
602 dev_err(&dev->dev, "Device has broken 64-bit MSI but arch"
603 " tried to assign one above 4G\n");
610 * msi_capability_init - configure device's MSI capability structure
611 * @dev: pointer to the pci_dev data structure of MSI device function
612 * @nvec: number of interrupts to allocate
613 * @affinity: flag to indicate cpu irq affinity mask should be set
615 * Setup the MSI capability structure of the device with the requested
616 * number of interrupts. A return value of zero indicates the successful
617 * setup of an entry with the new MSI irq. A negative return value indicates
618 * an error, and a positive return value indicates the number of interrupts
619 * which could have been allocated.
621 static int msi_capability_init(struct pci_dev *dev, int nvec, bool affinity)
623 struct msi_desc *entry;
627 pci_msi_set_enable(dev, 0); /* Disable MSI during set up */
629 entry = msi_setup_entry(dev, nvec, affinity);
633 /* All MSIs are unmasked by default, Mask them all */
634 mask = msi_mask(entry->msi_attrib.multi_cap);
635 msi_mask_irq(entry, mask, mask);
637 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
639 /* Configure MSI capability structure */
640 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
642 msi_mask_irq(entry, mask, ~mask);
647 ret = msi_verify_entries(dev);
649 msi_mask_irq(entry, mask, ~mask);
654 ret = populate_msi_sysfs(dev);
656 msi_mask_irq(entry, mask, ~mask);
661 /* Set MSI enabled bits */
662 pci_intx_for_msi(dev, 0);
663 pci_msi_set_enable(dev, 1);
664 dev->msi_enabled = 1;
666 pcibios_free_irq(dev);
667 dev->irq = entry->irq;
671 static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
673 resource_size_t phys_addr;
678 pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
680 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
681 flags = pci_resource_flags(dev, bir);
682 if (!flags || (flags & IORESOURCE_UNSET))
685 table_offset &= PCI_MSIX_TABLE_OFFSET;
686 phys_addr = pci_resource_start(dev, bir) + table_offset;
688 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
691 static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
692 struct msix_entry *entries, int nvec,
695 struct cpumask *curmsk, *masks = NULL;
696 struct msi_desc *entry;
700 masks = irq_create_affinity_masks(dev->irq_affinity, nvec);
702 pr_err("Unable to allocate affinity masks, ignoring\n");
705 for (i = 0, curmsk = masks; i < nvec; i++) {
706 entry = alloc_msi_entry(&dev->dev, 1, curmsk);
712 /* No enough memory. Don't try again */
717 entry->msi_attrib.is_msix = 1;
718 entry->msi_attrib.is_64 = 1;
720 entry->msi_attrib.entry_nr = entries[i].entry;
722 entry->msi_attrib.entry_nr = i;
723 entry->msi_attrib.default_irq = dev->irq;
724 entry->mask_base = base;
726 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
736 static void msix_program_entries(struct pci_dev *dev,
737 struct msix_entry *entries)
739 struct msi_desc *entry;
742 for_each_pci_msi_entry(entry, dev) {
744 entries[i++].vector = entry->irq;
745 entry->masked = readl(pci_msix_desc_addr(entry) +
746 PCI_MSIX_ENTRY_VECTOR_CTRL);
747 msix_mask_irq(entry, 1);
752 * msix_capability_init - configure device's MSI-X capability
753 * @dev: pointer to the pci_dev data structure of MSI-X device function
754 * @entries: pointer to an array of struct msix_entry entries
755 * @nvec: number of @entries
756 * @affinity: flag to indicate cpu irq affinity mask should be set
758 * Setup the MSI-X capability structure of device function with a
759 * single MSI-X irq. A return of zero indicates the successful setup of
760 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
762 static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries,
763 int nvec, bool affinity)
769 /* Ensure MSI-X is disabled while it is set up */
770 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
772 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
773 /* Request & Map MSI-X table region */
774 base = msix_map_region(dev, msix_table_size(control));
778 ret = msix_setup_entries(dev, base, entries, nvec, affinity);
782 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
786 /* Check if all MSI entries honor device restrictions */
787 ret = msi_verify_entries(dev);
792 * Some devices require MSI-X to be enabled before we can touch the
793 * MSI-X registers. We need to mask all the vectors to prevent
794 * interrupts coming in before they're fully set up.
796 pci_msix_clear_and_set_ctrl(dev, 0,
797 PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE);
799 msix_program_entries(dev, entries);
801 ret = populate_msi_sysfs(dev);
805 /* Set MSI-X enabled bits and unmask the function */
806 pci_intx_for_msi(dev, 0);
807 dev->msix_enabled = 1;
808 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
810 pcibios_free_irq(dev);
816 * If we had some success, report the number of irqs
817 * we succeeded in setting up.
819 struct msi_desc *entry;
822 for_each_pci_msi_entry(entry, dev) {
837 * pci_msi_supported - check whether MSI may be enabled on a device
838 * @dev: pointer to the pci_dev data structure of MSI device function
839 * @nvec: how many MSIs have been requested ?
841 * Look at global flags, the device itself, and its parent buses
842 * to determine if MSI/-X are supported for the device. If MSI/-X is
843 * supported return 1, else return 0.
845 static int pci_msi_supported(struct pci_dev *dev, int nvec)
849 /* MSI must be globally enabled and supported by the device */
853 if (!dev || dev->no_msi || dev->current_state != PCI_D0)
857 * You can't ask to have 0 or less MSIs configured.
859 * b) the list manipulation code assumes nvec >= 1.
865 * Any bridge which does NOT route MSI transactions from its
866 * secondary bus to its primary bus must set NO_MSI flag on
867 * the secondary pci_bus.
868 * We expect only arch-specific PCI host bus controller driver
869 * or quirks for specific PCI bridges to be setting NO_MSI.
871 for (bus = dev->bus; bus; bus = bus->parent)
872 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
879 * pci_msi_vec_count - Return the number of MSI vectors a device can send
880 * @dev: device to report about
882 * This function returns the number of MSI vectors a device requested via
883 * Multiple Message Capable register. It returns a negative errno if the
884 * device is not capable sending MSI interrupts. Otherwise, the call succeeds
885 * and returns a power of two, up to a maximum of 2^5 (32), according to the
888 int pci_msi_vec_count(struct pci_dev *dev)
896 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
897 ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
901 EXPORT_SYMBOL(pci_msi_vec_count);
903 void pci_msi_shutdown(struct pci_dev *dev)
905 struct msi_desc *desc;
908 if (!pci_msi_enable || !dev || !dev->msi_enabled)
911 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
912 desc = first_pci_msi_entry(dev);
914 pci_msi_set_enable(dev, 0);
915 pci_intx_for_msi(dev, 1);
916 dev->msi_enabled = 0;
918 /* Return the device with MSI unmasked as initial states */
919 mask = msi_mask(desc->msi_attrib.multi_cap);
920 /* Keep cached state to be restored */
921 __pci_msi_desc_mask_irq(desc, mask, ~mask);
923 /* Restore dev->irq to its default pin-assertion irq */
924 dev->irq = desc->msi_attrib.default_irq;
925 pcibios_alloc_irq(dev);
928 void pci_disable_msi(struct pci_dev *dev)
930 if (!pci_msi_enable || !dev || !dev->msi_enabled)
933 pci_msi_shutdown(dev);
936 EXPORT_SYMBOL(pci_disable_msi);
939 * pci_msix_vec_count - return the number of device's MSI-X table entries
940 * @dev: pointer to the pci_dev data structure of MSI-X device function
941 * This function returns the number of device's MSI-X table entries and
942 * therefore the number of MSI-X vectors device is capable of sending.
943 * It returns a negative errno if the device is not capable of sending MSI-X
946 int pci_msix_vec_count(struct pci_dev *dev)
953 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
954 return msix_table_size(control);
956 EXPORT_SYMBOL(pci_msix_vec_count);
958 static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries,
959 int nvec, bool affinity)
964 if (!pci_msi_supported(dev, nvec))
967 nr_entries = pci_msix_vec_count(dev);
970 if (nvec > nr_entries)
974 /* Check for any invalid entries */
975 for (i = 0; i < nvec; i++) {
976 if (entries[i].entry >= nr_entries)
977 return -EINVAL; /* invalid entry */
978 for (j = i + 1; j < nvec; j++) {
979 if (entries[i].entry == entries[j].entry)
980 return -EINVAL; /* duplicate entry */
984 WARN_ON(!!dev->msix_enabled);
986 /* Check whether driver already requested for MSI irq */
987 if (dev->msi_enabled) {
988 dev_info(&dev->dev, "can't enable MSI-X (MSI IRQ already assigned)\n");
991 return msix_capability_init(dev, entries, nvec, affinity);
995 * pci_enable_msix - configure device's MSI-X capability structure
996 * @dev: pointer to the pci_dev data structure of MSI-X device function
997 * @entries: pointer to an array of MSI-X entries (optional)
998 * @nvec: number of MSI-X irqs requested for allocation by device driver
1000 * Setup the MSI-X capability structure of device function with the number
1001 * of requested irqs upon its software driver call to request for
1002 * MSI-X mode enabled on its hardware device function. A return of zero
1003 * indicates the successful configuration of MSI-X capability structure
1004 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
1005 * Or a return of > 0 indicates that driver request is exceeding the number
1006 * of irqs or MSI-X vectors available. Driver should use the returned value to
1007 * re-send its request.
1009 int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
1011 return __pci_enable_msix(dev, entries, nvec, false);
1013 EXPORT_SYMBOL(pci_enable_msix);
1015 void pci_msix_shutdown(struct pci_dev *dev)
1017 struct msi_desc *entry;
1019 if (!pci_msi_enable || !dev || !dev->msix_enabled)
1022 /* Return the device with MSI-X masked as initial states */
1023 for_each_pci_msi_entry(entry, dev) {
1024 /* Keep cached states to be restored */
1025 __pci_msix_desc_mask_irq(entry, 1);
1028 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
1029 pci_intx_for_msi(dev, 1);
1030 dev->msix_enabled = 0;
1031 pcibios_alloc_irq(dev);
1034 void pci_disable_msix(struct pci_dev *dev)
1036 if (!pci_msi_enable || !dev || !dev->msix_enabled)
1039 pci_msix_shutdown(dev);
1042 EXPORT_SYMBOL(pci_disable_msix);
1044 void pci_no_msi(void)
1050 * pci_msi_enabled - is MSI enabled?
1052 * Returns true if MSI has not been disabled by the command-line option
1055 int pci_msi_enabled(void)
1057 return pci_msi_enable;
1059 EXPORT_SYMBOL(pci_msi_enabled);
1061 static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec,
1064 bool affinity = flags & PCI_IRQ_AFFINITY;
1068 if (!pci_msi_supported(dev, minvec))
1071 WARN_ON(!!dev->msi_enabled);
1073 /* Check whether driver already requested MSI-X irqs */
1074 if (dev->msix_enabled) {
1076 "can't enable MSI (MSI-X already enabled)\n");
1080 if (maxvec < minvec)
1083 nvec = pci_msi_vec_count(dev);
1094 nvec = irq_calc_affinity_vectors(dev->irq_affinity,
1100 rc = msi_capability_init(dev, nvec, affinity);
1114 * pci_enable_msi_range - configure device's MSI capability structure
1115 * @dev: device to configure
1116 * @minvec: minimal number of interrupts to configure
1117 * @maxvec: maximum number of interrupts to configure
1119 * This function tries to allocate a maximum possible number of interrupts in a
1120 * range between @minvec and @maxvec. It returns a negative errno if an error
1121 * occurs. If it succeeds, it returns the actual number of interrupts allocated
1122 * and updates the @dev's irq member to the lowest new interrupt number;
1123 * the other interrupt numbers allocated to this device are consecutive.
1125 int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
1127 return __pci_enable_msi_range(dev, minvec, maxvec, 0);
1129 EXPORT_SYMBOL(pci_enable_msi_range);
1131 static int __pci_enable_msix_range(struct pci_dev *dev,
1132 struct msix_entry *entries, int minvec, int maxvec,
1135 bool affinity = flags & PCI_IRQ_AFFINITY;
1136 int rc, nvec = maxvec;
1138 if (maxvec < minvec)
1143 nvec = irq_calc_affinity_vectors(dev->irq_affinity,
1149 rc = __pci_enable_msix(dev, entries, nvec, affinity);
1163 * pci_enable_msix_range - configure device's MSI-X capability structure
1164 * @dev: pointer to the pci_dev data structure of MSI-X device function
1165 * @entries: pointer to an array of MSI-X entries
1166 * @minvec: minimum number of MSI-X irqs requested
1167 * @maxvec: maximum number of MSI-X irqs requested
1169 * Setup the MSI-X capability structure of device function with a maximum
1170 * possible number of interrupts in the range between @minvec and @maxvec
1171 * upon its software driver call to request for MSI-X mode enabled on its
1172 * hardware device function. It returns a negative errno if an error occurs.
1173 * If it succeeds, it returns the actual number of interrupts allocated and
1174 * indicates the successful configuration of MSI-X capability structure
1175 * with new allocated MSI-X interrupts.
1177 int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
1178 int minvec, int maxvec)
1180 return __pci_enable_msix_range(dev, entries, minvec, maxvec, 0);
1182 EXPORT_SYMBOL(pci_enable_msix_range);
1185 * pci_alloc_irq_vectors - allocate multiple IRQs for a device
1186 * @dev: PCI device to operate on
1187 * @min_vecs: minimum number of vectors required (must be >= 1)
1188 * @max_vecs: maximum (desired) number of vectors
1189 * @flags: flags or quirks for the allocation
1191 * Allocate up to @max_vecs interrupt vectors for @dev, using MSI-X or MSI
1192 * vectors if available, and fall back to a single legacy vector
1193 * if neither is available. Return the number of vectors allocated,
1194 * (which might be smaller than @max_vecs) if successful, or a negative
1195 * error code on error. If less than @min_vecs interrupt vectors are
1196 * available for @dev the function will fail with -ENOSPC.
1198 * To get the Linux IRQ number used for a vector that can be passed to
1199 * request_irq() use the pci_irq_vector() helper.
1201 int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
1202 unsigned int max_vecs, unsigned int flags)
1206 if (flags & PCI_IRQ_MSIX) {
1207 vecs = __pci_enable_msix_range(dev, NULL, min_vecs, max_vecs,
1213 if (flags & PCI_IRQ_MSI) {
1214 vecs = __pci_enable_msi_range(dev, min_vecs, max_vecs, flags);
1219 /* use legacy irq if allowed */
1220 if ((flags & PCI_IRQ_LEGACY) && min_vecs == 1) {
1227 EXPORT_SYMBOL(pci_alloc_irq_vectors);
1230 * pci_free_irq_vectors - free previously allocated IRQs for a device
1231 * @dev: PCI device to operate on
1233 * Undoes the allocations and enabling in pci_alloc_irq_vectors().
1235 void pci_free_irq_vectors(struct pci_dev *dev)
1237 pci_disable_msix(dev);
1238 pci_disable_msi(dev);
1240 EXPORT_SYMBOL(pci_free_irq_vectors);
1243 * pci_irq_vector - return Linux IRQ number of a device vector
1244 * @dev: PCI device to operate on
1245 * @nr: device-relative interrupt vector index (0-based).
1247 int pci_irq_vector(struct pci_dev *dev, unsigned int nr)
1249 if (dev->msix_enabled) {
1250 struct msi_desc *entry;
1253 for_each_pci_msi_entry(entry, dev) {
1262 if (dev->msi_enabled) {
1263 struct msi_desc *entry = first_pci_msi_entry(dev);
1265 if (WARN_ON_ONCE(nr >= entry->nvec_used))
1268 if (WARN_ON_ONCE(nr > 0))
1272 return dev->irq + nr;
1274 EXPORT_SYMBOL(pci_irq_vector);
1277 * pci_irq_get_affinity - return the affinity of a particular msi vector
1278 * @dev: PCI device to operate on
1279 * @nr: device-relative interrupt vector index (0-based).
1281 const struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr)
1283 if (dev->msix_enabled) {
1284 struct msi_desc *entry;
1287 for_each_pci_msi_entry(entry, dev) {
1289 return entry->affinity;
1294 } else if (dev->msi_enabled) {
1295 struct msi_desc *entry = first_pci_msi_entry(dev);
1297 if (WARN_ON_ONCE(!entry || nr >= entry->nvec_used))
1300 return &entry->affinity[nr];
1302 return cpu_possible_mask;
1305 EXPORT_SYMBOL(pci_irq_get_affinity);
1307 struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc)
1309 return to_pci_dev(desc->dev);
1311 EXPORT_SYMBOL(msi_desc_to_pci_dev);
1313 void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
1315 struct pci_dev *dev = msi_desc_to_pci_dev(desc);
1317 return dev->bus->sysdata;
1319 EXPORT_SYMBOL_GPL(msi_desc_to_pci_sysdata);
1321 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
1323 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
1324 * @irq_data: Pointer to interrupt data of the MSI interrupt
1325 * @msg: Pointer to the message
1327 void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
1329 struct msi_desc *desc = irq_data_get_msi_desc(irq_data);
1332 * For MSI-X desc->irq is always equal to irq_data->irq. For
1333 * MSI only the first interrupt of MULTI MSI passes the test.
1335 if (desc->irq == irq_data->irq)
1336 __pci_write_msi_msg(desc, msg);
1340 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
1341 * @dev: Pointer to the PCI device
1342 * @desc: Pointer to the msi descriptor
1344 * The ID number is only used within the irqdomain.
1346 irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
1347 struct msi_desc *desc)
1349 return (irq_hw_number_t)desc->msi_attrib.entry_nr |
1350 PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
1351 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
1354 static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
1356 return !desc->msi_attrib.is_msix && desc->nvec_used > 1;
1360 * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
1361 * @domain: The interrupt domain to check
1362 * @info: The domain info for verification
1363 * @dev: The device to check
1366 * 0 if the functionality is supported
1367 * 1 if Multi MSI is requested, but the domain does not support it
1368 * -ENOTSUPP otherwise
1370 int pci_msi_domain_check_cap(struct irq_domain *domain,
1371 struct msi_domain_info *info, struct device *dev)
1373 struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
1375 /* Special handling to support pci_enable_msi_range() */
1376 if (pci_msi_desc_is_multi_msi(desc) &&
1377 !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
1379 else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
1385 static int pci_msi_domain_handle_error(struct irq_domain *domain,
1386 struct msi_desc *desc, int error)
1388 /* Special handling to support pci_enable_msi_range() */
1389 if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
1395 #ifdef GENERIC_MSI_DOMAIN_OPS
1396 static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
1397 struct msi_desc *desc)
1400 arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc),
1404 #define pci_msi_domain_set_desc NULL
1407 static struct msi_domain_ops pci_msi_domain_ops_default = {
1408 .set_desc = pci_msi_domain_set_desc,
1409 .msi_check = pci_msi_domain_check_cap,
1410 .handle_error = pci_msi_domain_handle_error,
1413 static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
1415 struct msi_domain_ops *ops = info->ops;
1418 info->ops = &pci_msi_domain_ops_default;
1420 if (ops->set_desc == NULL)
1421 ops->set_desc = pci_msi_domain_set_desc;
1422 if (ops->msi_check == NULL)
1423 ops->msi_check = pci_msi_domain_check_cap;
1424 if (ops->handle_error == NULL)
1425 ops->handle_error = pci_msi_domain_handle_error;
1429 static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
1431 struct irq_chip *chip = info->chip;
1434 if (!chip->irq_write_msi_msg)
1435 chip->irq_write_msi_msg = pci_msi_domain_write_msg;
1436 if (!chip->irq_mask)
1437 chip->irq_mask = pci_msi_mask_irq;
1438 if (!chip->irq_unmask)
1439 chip->irq_unmask = pci_msi_unmask_irq;
1443 * pci_msi_create_irq_domain - Create a MSI interrupt domain
1444 * @fwnode: Optional fwnode of the interrupt controller
1445 * @info: MSI domain info
1446 * @parent: Parent irq domain
1448 * Updates the domain and chip ops and creates a MSI interrupt domain.
1451 * A domain pointer or NULL in case of failure.
1453 struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
1454 struct msi_domain_info *info,
1455 struct irq_domain *parent)
1457 struct irq_domain *domain;
1459 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
1460 pci_msi_domain_update_dom_ops(info);
1461 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
1462 pci_msi_domain_update_chip_ops(info);
1464 info->flags |= MSI_FLAG_ACTIVATE_EARLY;
1466 domain = msi_create_irq_domain(fwnode, info, parent);
1470 domain->bus_token = DOMAIN_BUS_PCI_MSI;
1473 EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
1476 * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain
1477 * @domain: The interrupt domain to allocate from
1478 * @dev: The device for which to allocate
1479 * @nvec: The number of interrupts to allocate
1480 * @type: Unused to allow simpler migration from the arch_XXX interfaces
1483 * A virtual interrupt number or an error code in case of failure
1485 int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
1488 return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
1492 * pci_msi_domain_free_irqs - Free interrupts for @dev in @domain
1493 * @domain: The interrupt domain
1494 * @dev: The device for which to free interrupts
1496 void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev)
1498 msi_domain_free_irqs(domain, &dev->dev);
1502 * pci_msi_create_default_irq_domain - Create a default MSI interrupt domain
1503 * @fwnode: Optional fwnode of the interrupt controller
1504 * @info: MSI domain info
1505 * @parent: Parent irq domain
1507 * Returns: A domain pointer or NULL in case of failure. If successful
1508 * the default PCI/MSI irqdomain pointer is updated.
1510 struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode,
1511 struct msi_domain_info *info, struct irq_domain *parent)
1513 struct irq_domain *domain;
1515 mutex_lock(&pci_msi_domain_lock);
1516 if (pci_msi_default_domain) {
1517 pr_err("PCI: default irq domain for PCI MSI has already been created.\n");
1520 domain = pci_msi_create_irq_domain(fwnode, info, parent);
1521 pci_msi_default_domain = domain;
1523 mutex_unlock(&pci_msi_domain_lock);
1528 static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data)
1536 * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID)
1537 * @domain: The interrupt domain
1538 * @pdev: The PCI device.
1540 * The RID for a device is formed from the alias, with a firmware
1541 * supplied mapping applied
1545 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)
1547 struct device_node *of_node;
1550 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
1552 of_node = irq_domain_get_of_node(domain);
1553 rid = of_node ? of_msi_map_rid(&pdev->dev, of_node, rid) :
1554 iort_msi_map_rid(&pdev->dev, rid);
1560 * pci_msi_get_device_domain - Get the MSI domain for a given PCI device
1561 * @pdev: The PCI device
1563 * Use the firmware data to find a device-specific MSI domain
1564 * (i.e. not one that is ste as a default).
1566 * Returns: The coresponding MSI domain or NULL if none has been found.
1568 struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
1570 struct irq_domain *dom;
1573 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
1574 dom = of_msi_map_get_device_domain(&pdev->dev, rid);
1576 dom = iort_get_device_domain(&pdev->dev, rid);
1579 #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */