1 # SPDX-License-Identifier: GPL-2.0
3 menu "DesignWare PCI Core Support"
11 depends on PCI_MSI_IRQ_DOMAIN
16 depends on PCI_ENDPOINT
22 config PCI_DRA7XX_HOST
23 bool "TI DRA7xx PCIe controller Host Mode"
24 depends on SOC_DRA7XX || COMPILE_TEST
25 depends on PCI_MSI_IRQ_DOMAIN
26 depends on OF && HAS_IOMEM && TI_PIPE3
29 default y if SOC_DRA7XX
31 Enables support for the PCIe controller in the DRA7xx SoC to work in
32 host mode. There are two instances of PCIe controller in DRA7xx.
33 This controller can work either as EP or RC. In order to enable
34 host-specific features PCI_DRA7XX_HOST must be selected and in order
35 to enable device-specific features PCI_DRA7XX_EP must be selected.
36 This uses the DesignWare core.
39 bool "TI DRA7xx PCIe controller Endpoint Mode"
40 depends on SOC_DRA7XX || COMPILE_TEST
41 depends on PCI_ENDPOINT
42 depends on OF && HAS_IOMEM && TI_PIPE3
46 Enables support for the PCIe controller in the DRA7xx SoC to work in
47 endpoint mode. There are two instances of PCIe controller in DRA7xx.
48 This controller can work either as EP or RC. In order to enable
49 host-specific features PCI_DRA7XX_HOST must be selected and in order
50 to enable device-specific features PCI_DRA7XX_EP must be selected.
51 This uses the DesignWare core.
56 config PCIE_DW_PLAT_HOST
57 bool "Platform bus based DesignWare PCIe Controller - Host mode"
58 depends on PCI && PCI_MSI_IRQ_DOMAIN
62 Enables support for the PCIe controller in the Designware IP to
63 work in host mode. There are two instances of PCIe controller in
65 This controller can work either as EP or RC. In order to enable
66 host-specific features PCIE_DW_PLAT_HOST must be selected and in
67 order to enable device-specific features PCI_DW_PLAT_EP must be
70 config PCIE_DW_PLAT_EP
71 bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
72 depends on PCI && PCI_MSI_IRQ_DOMAIN
73 depends on PCI_ENDPOINT
77 Enables support for the PCIe controller in the Designware IP to
78 work in endpoint mode. There are two instances of PCIe controller
80 This controller can work either as EP or RC. In order to enable
81 host-specific features PCIE_DW_PLAT_HOST must be selected and in
82 order to enable device-specific features PCI_DW_PLAT_EP must be
86 bool "Samsung Exynos PCIe controller"
87 depends on SOC_EXYNOS5440 || COMPILE_TEST
88 depends on PCI_MSI_IRQ_DOMAIN
92 bool "Freescale i.MX6/7/8 PCIe controller"
93 depends on ARCH_MXC || COMPILE_TEST
94 depends on PCI_MSI_IRQ_DOMAIN
98 bool "STMicroelectronics SPEAr PCIe controller"
99 depends on ARCH_SPEAR13XX || COMPILE_TEST
100 depends on PCI_MSI_IRQ_DOMAIN
103 Say Y here if you want PCIe support on SPEAr13XX SoCs.
108 config PCI_KEYSTONE_HOST
109 bool "PCI Keystone Host Mode"
110 depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
111 depends on PCI_MSI_IRQ_DOMAIN
115 Enables support for the PCIe controller in the Keystone SoC to
116 work in host mode. The PCI controller on Keystone is based on
117 DesignWare hardware and therefore the driver re-uses the
118 DesignWare core functions to implement the driver.
120 config PCI_KEYSTONE_EP
121 bool "PCI Keystone Endpoint Mode"
122 depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
123 depends on PCI_ENDPOINT
127 Enables support for the PCIe controller in the Keystone SoC to
128 work in endpoint mode. The PCI controller on Keystone is based
129 on DesignWare hardware and therefore the driver re-uses the
130 DesignWare core functions to implement the driver.
132 config PCI_LAYERSCAPE
133 bool "Freescale Layerscape PCIe controller - Host mode"
134 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
135 depends on PCI_MSI_IRQ_DOMAIN
139 Say Y here if you want to enable PCIe controller support on Layerscape
140 SoCs to work in Host mode.
141 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
142 determines which PCIe controller works in EP mode and which PCIe
143 controller works in RC mode.
145 config PCI_LAYERSCAPE_EP
146 bool "Freescale Layerscape PCIe controller - Endpoint mode"
147 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
148 depends on PCI_ENDPOINT
151 Say Y here if you want to enable PCIe controller support on Layerscape
152 SoCs to work in Endpoint mode.
153 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
154 determines which PCIe controller works in EP mode and which PCIe
155 controller works in RC mode.
158 depends on OF && (ARM64 || COMPILE_TEST)
159 bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
160 depends on PCI_MSI_IRQ_DOMAIN
162 select PCI_HOST_COMMON
164 Say Y here if you want PCIe controller support on HiSilicon
168 bool "Qualcomm PCIe controller"
169 depends on OF && (ARCH_QCOM || COMPILE_TEST)
170 depends on PCI_MSI_IRQ_DOMAIN
173 Say Y here to enable PCIe controller support on Qualcomm SoCs. The
174 PCIe controller uses the DesignWare core plus Qualcomm-specific
177 config PCIE_ARMADA_8K
178 bool "Marvell Armada-8K PCIe controller"
179 depends on ARCH_MVEBU || COMPILE_TEST
180 depends on PCI_MSI_IRQ_DOMAIN
183 Say Y here if you want to enable PCIe controller support on
184 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
185 DesignWare hardware and therefore the driver re-uses the
186 DesignWare core functions to implement the driver.
191 config PCIE_ARTPEC6_HOST
192 bool "Axis ARTPEC-6 PCIe controller Host Mode"
193 depends on MACH_ARTPEC6 || COMPILE_TEST
194 depends on PCI_MSI_IRQ_DOMAIN
198 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
199 host mode. This uses the DesignWare core.
201 config PCIE_ARTPEC6_EP
202 bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
203 depends on MACH_ARTPEC6 || COMPILE_TEST
204 depends on PCI_ENDPOINT
208 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
209 endpoint mode. This uses the DesignWare core.
212 bool "Intel Gateway PCIe host controller support"
213 depends on OF && (X86 || COMPILE_TEST)
214 depends on PCI_MSI_IRQ_DOMAIN
217 Say 'Y' here to enable PCIe Host controller support on Intel
219 The PCIe controller uses the DesignWare core plus Intel-specific
223 depends on OF && (ARM64 || COMPILE_TEST)
224 bool "HiSilicon Kirin series SoCs PCIe controllers"
225 depends on PCI_MSI_IRQ_DOMAIN
228 Say Y here if you want PCIe controller support
229 on HiSilicon Kirin series SoCs.
232 bool "HiSilicon STB SoCs PCIe controllers"
233 depends on ARCH_HISI || COMPILE_TEST
234 depends on PCI_MSI_IRQ_DOMAIN
237 Say Y here if you want PCIe controller support on HiSilicon STB SoCs
240 bool "MESON PCIe controller"
241 depends on PCI_MSI_IRQ_DOMAIN
244 Say Y here if you want to enable PCI controller support on Amlogic
245 SoCs. The PCI controller on Amlogic is based on DesignWare hardware
246 and therefore the driver re-uses the DesignWare core functions to
247 implement the driver.
252 config PCIE_TEGRA194_HOST
253 tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
254 depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
255 depends on PCI_MSI_IRQ_DOMAIN
257 select PHY_TEGRA194_P2U
260 Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
261 work in host mode. There are two instances of PCIe controllers in
262 Tegra194. This controller can work either as EP or RC. In order to
263 enable host-specific features PCIE_TEGRA194_HOST must be selected and
264 in order to enable device-specific features PCIE_TEGRA194_EP must be
265 selected. This uses the DesignWare core.
267 config PCIE_TEGRA194_EP
268 tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode"
269 depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
270 depends on PCI_ENDPOINT
272 select PHY_TEGRA194_P2U
275 Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
276 work in host mode. There are two instances of PCIe controllers in
277 Tegra194. This controller can work either as EP or RC. In order to
278 enable host-specific features PCIE_TEGRA194_HOST must be selected and
279 in order to enable device-specific features PCIE_TEGRA194_EP must be
280 selected. This uses the DesignWare core.
283 bool "Socionext UniPhier PCIe host controllers"
284 depends on ARCH_UNIPHIER || COMPILE_TEST
285 depends on OF && HAS_IOMEM
286 depends on PCI_MSI_IRQ_DOMAIN
289 Say Y here if you want PCIe host controller support on UniPhier SoCs.
290 This driver supports LD20 and PXs3 SoCs.
292 config PCIE_UNIPHIER_EP
293 bool "Socionext UniPhier PCIe endpoint controllers"
294 depends on ARCH_UNIPHIER || COMPILE_TEST
295 depends on OF && HAS_IOMEM
296 depends on PCI_ENDPOINT
299 Say Y here if you want PCIe endpoint controller support on
300 UniPhier SoCs. This driver supports Pro5 SoC.
303 bool "Amazon Annapurna Labs PCIe controller"
304 depends on OF && (ARM64 || COMPILE_TEST)
305 depends on PCI_MSI_IRQ_DOMAIN
308 Say Y here to enable support of the Amazon's Annapurna Labs PCIe
309 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
310 core plus Annapurna Labs proprietary hardware wrappers. This is
311 required only for DT-based platforms. ACPI platforms with the
312 Annapurna Labs PCIe controller don't need to enable this.