4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 * Copyright (C) 2011 Advanced Micro Devices,
7 * PCI Express I/O Virtualization (IOV) support.
8 * Address Translation Service 1.0
9 * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
10 * PASID support added by Joerg Roedel <joerg.roedel@amd.com>
13 #include <linux/export.h>
14 #include <linux/pci-ats.h>
15 #include <linux/pci.h>
16 #include <linux/slab.h>
20 static void ats_alloc_one(struct pci_dev *dev)
26 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
30 ats = kzalloc(sizeof(*ats), GFP_KERNEL);
32 dev_warn(&dev->dev, "can't allocate space for ATS state\n");
37 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
38 ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
43 static void ats_free_one(struct pci_dev *dev)
49 void pci_ats_init(struct pci_dev *dev)
54 void pci_ats_free(struct pci_dev *dev)
60 * pci_enable_ats - enable the ATS capability
61 * @dev: the PCI device
62 * @ps: the IOMMU page shift
64 * Returns 0 on success, or negative on failure.
66 int pci_enable_ats(struct pci_dev *dev, int ps)
70 BUG_ON(dev->ats && dev->ats->is_enabled);
75 if (ps < PCI_ATS_MIN_STU)
79 * Note that enabling ATS on a VF fails unless it's already enabled
80 * with the same STU on the PF.
82 ctrl = PCI_ATS_CTRL_ENABLE;
84 struct pci_dev *pdev = dev->physfn;
86 if (pdev->ats->stu != ps)
89 atomic_inc(&pdev->ats->ref_cnt); /* count enabled VFs */
92 ctrl |= PCI_ATS_CTRL_STU(dev->ats->stu - PCI_ATS_MIN_STU);
94 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
96 dev->ats->is_enabled = 1;
99 EXPORT_SYMBOL_GPL(pci_enable_ats);
102 * pci_disable_ats - disable the ATS capability
103 * @dev: the PCI device
105 void pci_disable_ats(struct pci_dev *dev)
109 BUG_ON(!dev->ats || !dev->ats->is_enabled);
111 if (atomic_read(&dev->ats->ref_cnt))
112 return; /* VFs still enabled */
114 if (dev->is_virtfn) {
115 struct pci_dev *pdev = dev->physfn;
117 atomic_dec(&pdev->ats->ref_cnt);
120 pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);
121 ctrl &= ~PCI_ATS_CTRL_ENABLE;
122 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
124 dev->ats->is_enabled = 0;
126 EXPORT_SYMBOL_GPL(pci_disable_ats);
128 void pci_restore_ats_state(struct pci_dev *dev)
132 if (!pci_ats_enabled(dev))
134 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS))
137 ctrl = PCI_ATS_CTRL_ENABLE;
139 ctrl |= PCI_ATS_CTRL_STU(dev->ats->stu - PCI_ATS_MIN_STU);
140 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
142 EXPORT_SYMBOL_GPL(pci_restore_ats_state);
145 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
146 * @dev: the PCI device
148 * Returns the queue depth on success, or negative on failure.
150 * The ATS spec uses 0 in the Invalidate Queue Depth field to
151 * indicate that the function can accept 32 Invalidate Request.
152 * But here we use the `real' values (i.e. 1~32) for the Queue
153 * Depth; and 0 indicates the function shares the Queue with
154 * other functions (doesn't exclusively own a Queue).
156 int pci_ats_queue_depth(struct pci_dev *dev)
162 return dev->ats->qdep;
166 EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
168 #ifdef CONFIG_PCI_PRI
170 * pci_enable_pri - Enable PRI capability
171 * @ pdev: PCI device structure
173 * Returns 0 on success, negative value on error
175 int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
181 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
185 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
186 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
187 if ((control & PCI_PRI_CTRL_ENABLE) ||
188 !(status & PCI_PRI_STATUS_STOPPED))
191 pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
192 reqs = min(max_requests, reqs);
193 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
195 control |= PCI_PRI_CTRL_ENABLE;
196 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
200 EXPORT_SYMBOL_GPL(pci_enable_pri);
203 * pci_disable_pri - Disable PRI capability
204 * @pdev: PCI device structure
206 * Only clears the enabled-bit, regardless of its former value
208 void pci_disable_pri(struct pci_dev *pdev)
213 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
217 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
218 control &= ~PCI_PRI_CTRL_ENABLE;
219 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
221 EXPORT_SYMBOL_GPL(pci_disable_pri);
224 * pci_reset_pri - Resets device's PRI state
225 * @pdev: PCI device structure
227 * The PRI capability must be disabled before this function is called.
228 * Returns 0 on success, negative value on error.
230 int pci_reset_pri(struct pci_dev *pdev)
235 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
239 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
240 if (control & PCI_PRI_CTRL_ENABLE)
243 control |= PCI_PRI_CTRL_RESET;
245 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
249 EXPORT_SYMBOL_GPL(pci_reset_pri);
250 #endif /* CONFIG_PCI_PRI */
252 #ifdef CONFIG_PCI_PASID
254 * pci_enable_pasid - Enable the PASID capability
255 * @pdev: PCI device structure
256 * @features: Features to enable
258 * Returns 0 on success, negative value on error. This function checks
259 * whether the features are actually supported by the device and returns
262 int pci_enable_pasid(struct pci_dev *pdev, int features)
264 u16 control, supported;
267 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
271 pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control);
272 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
274 if (control & PCI_PASID_CTRL_ENABLE)
277 supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
279 /* User wants to enable anything unsupported? */
280 if ((supported & features) != features)
283 control = PCI_PASID_CTRL_ENABLE | features;
285 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
289 EXPORT_SYMBOL_GPL(pci_enable_pasid);
292 * pci_disable_pasid - Disable the PASID capability
293 * @pdev: PCI device structure
296 void pci_disable_pasid(struct pci_dev *pdev)
301 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
305 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
307 EXPORT_SYMBOL_GPL(pci_disable_pasid);
310 * pci_pasid_features - Check which PASID features are supported
311 * @pdev: PCI device structure
313 * Returns a negative value when no PASI capability is present.
314 * Otherwise is returns a bitmask with supported features. Current
315 * features reported are:
316 * PCI_PASID_CAP_EXEC - Execute permission supported
317 * PCI_PASID_CAP_PRIV - Privileged mode supported
319 int pci_pasid_features(struct pci_dev *pdev)
324 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
328 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
330 supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
334 EXPORT_SYMBOL_GPL(pci_pasid_features);
336 #define PASID_NUMBER_SHIFT 8
337 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
339 * pci_max_pasid - Get maximum number of PASIDs supported by device
340 * @pdev: PCI device structure
342 * Returns negative value when PASID capability is not present.
343 * Otherwise it returns the numer of supported PASIDs.
345 int pci_max_pasids(struct pci_dev *pdev)
350 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
354 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
356 supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
358 return (1 << supported);
360 EXPORT_SYMBOL_GPL(pci_max_pasids);
361 #endif /* CONFIG_PCI_PASID */