c393e4b56f39678e5b268e3862058644172b7120
[linux-2.6-microblaze.git] / drivers / nvme / host / nvme.h
1 /*
2  * Copyright (c) 2011-2014, Intel Corporation.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  */
13
14 #ifndef _NVME_H
15 #define _NVME_H
16
17 #include <linux/nvme.h>
18 #include <linux/cdev.h>
19 #include <linux/pci.h>
20 #include <linux/kref.h>
21 #include <linux/blk-mq.h>
22 #include <linux/lightnvm.h>
23 #include <linux/sed-opal.h>
24 #include <linux/fault-inject.h>
25
26 extern unsigned int nvme_io_timeout;
27 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
28
29 extern unsigned int admin_timeout;
30 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
31
32 #define NVME_DEFAULT_KATO       5
33 #define NVME_KATO_GRACE         10
34
35 extern struct workqueue_struct *nvme_wq;
36 extern struct workqueue_struct *nvme_reset_wq;
37 extern struct workqueue_struct *nvme_delete_wq;
38
39 enum {
40         NVME_NS_LBA             = 0,
41         NVME_NS_LIGHTNVM        = 1,
42 };
43
44 /*
45  * List of workarounds for devices that required behavior not specified in
46  * the standard.
47  */
48 enum nvme_quirks {
49         /*
50          * Prefers I/O aligned to a stripe size specified in a vendor
51          * specific Identify field.
52          */
53         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
54
55         /*
56          * The controller doesn't handle Identify value others than 0 or 1
57          * correctly.
58          */
59         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
60
61         /*
62          * The controller deterministically returns O's on reads to
63          * logical blocks that deallocate was called on.
64          */
65         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
66
67         /*
68          * The controller needs a delay before starts checking the device
69          * readiness, which is done by reading the NVME_CSTS_RDY bit.
70          */
71         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
72
73         /*
74          * APST should not be used.
75          */
76         NVME_QUIRK_NO_APST                      = (1 << 4),
77
78         /*
79          * The deepest sleep state should not be used.
80          */
81         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
82
83         /*
84          * Supports the LighNVM command set if indicated in vs[1].
85          */
86         NVME_QUIRK_LIGHTNVM                     = (1 << 6),
87 };
88
89 /*
90  * Common request structure for NVMe passthrough.  All drivers must have
91  * this structure as the first member of their request-private data.
92  */
93 struct nvme_request {
94         struct nvme_command     *cmd;
95         union nvme_result       result;
96         u8                      retries;
97         u8                      flags;
98         u16                     status;
99 };
100
101 /*
102  * Mark a bio as coming in through the mpath node.
103  */
104 #define REQ_NVME_MPATH          REQ_DRV
105
106 enum {
107         NVME_REQ_CANCELLED              = (1 << 0),
108 };
109
110 static inline struct nvme_request *nvme_req(struct request *req)
111 {
112         return blk_mq_rq_to_pdu(req);
113 }
114
115 /* The below value is the specific amount of delay needed before checking
116  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
117  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
118  * found empirically.
119  */
120 #define NVME_QUIRK_DELAY_AMOUNT         2300
121
122 enum nvme_ctrl_state {
123         NVME_CTRL_NEW,
124         NVME_CTRL_LIVE,
125         NVME_CTRL_ADMIN_ONLY,    /* Only admin queue live */
126         NVME_CTRL_RESETTING,
127         NVME_CTRL_CONNECTING,
128         NVME_CTRL_DELETING,
129         NVME_CTRL_DEAD,
130 };
131
132 struct nvme_ctrl {
133         enum nvme_ctrl_state state;
134         bool identified;
135         spinlock_t lock;
136         const struct nvme_ctrl_ops *ops;
137         struct request_queue *admin_q;
138         struct request_queue *connect_q;
139         struct device *dev;
140         int instance;
141         struct blk_mq_tag_set *tagset;
142         struct blk_mq_tag_set *admin_tagset;
143         struct list_head namespaces;
144         struct rw_semaphore namespaces_rwsem;
145         struct device ctrl_device;
146         struct device *device;  /* char device */
147         struct cdev cdev;
148         struct work_struct reset_work;
149         struct work_struct delete_work;
150
151         struct nvme_subsystem *subsys;
152         struct list_head subsys_entry;
153
154         struct opal_dev *opal_dev;
155
156         char name[12];
157         u16 cntlid;
158
159         u32 ctrl_config;
160         u16 mtfa;
161         u32 queue_count;
162
163         u64 cap;
164         u32 page_size;
165         u32 max_hw_sectors;
166         u16 oncs;
167         u16 oacs;
168         u16 nssa;
169         u16 nr_streams;
170         atomic_t abort_limit;
171         u8 vwc;
172         u32 vs;
173         u32 sgls;
174         u16 kas;
175         u8 npss;
176         u8 apsta;
177         u32 aen_result;
178         unsigned int shutdown_timeout;
179         unsigned int kato;
180         bool subsystem;
181         unsigned long quirks;
182         struct nvme_id_power_state psd[32];
183         struct nvme_effects_log *effects;
184         struct work_struct scan_work;
185         struct work_struct async_event_work;
186         struct delayed_work ka_work;
187         struct nvme_command ka_cmd;
188         struct work_struct fw_act_work;
189
190         /* Power saving configuration */
191         u64 ps_max_latency_us;
192         bool apst_enabled;
193
194         /* PCIe only: */
195         u32 hmpre;
196         u32 hmmin;
197         u32 hmminds;
198         u16 hmmaxd;
199
200         /* Fabrics only */
201         u16 sqsize;
202         u32 ioccsz;
203         u32 iorcsz;
204         u16 icdoff;
205         u16 maxcmd;
206         int nr_reconnects;
207         struct nvmf_ctrl_options *opts;
208 };
209
210 struct nvme_subsystem {
211         int                     instance;
212         struct device           dev;
213         /*
214          * Because we unregister the device on the last put we need
215          * a separate refcount.
216          */
217         struct kref             ref;
218         struct list_head        entry;
219         struct mutex            lock;
220         struct list_head        ctrls;
221         struct list_head        nsheads;
222         char                    subnqn[NVMF_NQN_SIZE];
223         char                    serial[20];
224         char                    model[40];
225         char                    firmware_rev[8];
226         u8                      cmic;
227         u16                     vendor_id;
228         struct ida              ns_ida;
229 };
230
231 /*
232  * Container structure for uniqueue namespace identifiers.
233  */
234 struct nvme_ns_ids {
235         u8      eui64[8];
236         u8      nguid[16];
237         uuid_t  uuid;
238 };
239
240 /*
241  * Anchor structure for namespaces.  There is one for each namespace in a
242  * NVMe subsystem that any of our controllers can see, and the namespace
243  * structure for each controller is chained of it.  For private namespaces
244  * there is a 1:1 relation to our namespace structures, that is ->list
245  * only ever has a single entry for private namespaces.
246  */
247 struct nvme_ns_head {
248 #ifdef CONFIG_NVME_MULTIPATH
249         struct gendisk          *disk;
250         struct nvme_ns __rcu    *current_path;
251         struct bio_list         requeue_list;
252         spinlock_t              requeue_lock;
253         struct work_struct      requeue_work;
254 #endif
255         struct list_head        list;
256         struct srcu_struct      srcu;
257         struct nvme_subsystem   *subsys;
258         unsigned                ns_id;
259         struct nvme_ns_ids      ids;
260         struct list_head        entry;
261         struct kref             ref;
262         int                     instance;
263 };
264
265 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
266 struct nvme_fault_inject {
267         struct fault_attr attr;
268         struct dentry *parent;
269         bool dont_retry;        /* DNR, do not retry */
270         u16 status;             /* status code */
271 };
272 #endif
273
274 struct nvme_ns {
275         struct list_head list;
276
277         struct nvme_ctrl *ctrl;
278         struct request_queue *queue;
279         struct gendisk *disk;
280         struct list_head siblings;
281         struct nvm_dev *ndev;
282         struct kref kref;
283         struct nvme_ns_head *head;
284
285         int lba_shift;
286         u16 ms;
287         u16 sgs;
288         u32 sws;
289         bool ext;
290         u8 pi_type;
291         unsigned long flags;
292 #define NVME_NS_REMOVING 0
293 #define NVME_NS_DEAD     1
294         u16 noiob;
295
296 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
297         struct nvme_fault_inject fault_inject;
298 #endif
299
300 };
301
302 struct nvme_ctrl_ops {
303         const char *name;
304         struct module *module;
305         unsigned int flags;
306 #define NVME_F_FABRICS                  (1 << 0)
307 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
308         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
309         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
310         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
311         void (*free_ctrl)(struct nvme_ctrl *ctrl);
312         void (*submit_async_event)(struct nvme_ctrl *ctrl);
313         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
314         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
315         int (*reinit_request)(void *data, struct request *rq);
316         void (*stop_ctrl)(struct nvme_ctrl *ctrl);
317 };
318
319 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
320 void nvme_fault_inject_init(struct nvme_ns *ns);
321 void nvme_fault_inject_fini(struct nvme_ns *ns);
322 void nvme_should_fail(struct request *req);
323 #else
324 static inline void nvme_fault_inject_init(struct nvme_ns *ns) {}
325 static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {}
326 static inline void nvme_should_fail(struct request *req) {}
327 #endif
328
329 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
330 {
331         u32 val = 0;
332
333         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
334                 return false;
335         return val & NVME_CSTS_RDY;
336 }
337
338 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
339 {
340         if (!ctrl->subsystem)
341                 return -ENOTTY;
342         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
343 }
344
345 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
346 {
347         return (sector >> (ns->lba_shift - 9));
348 }
349
350 static inline void nvme_cleanup_cmd(struct request *req)
351 {
352         if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
353                 kfree(page_address(req->special_vec.bv_page) +
354                       req->special_vec.bv_offset);
355         }
356 }
357
358 static inline void nvme_end_request(struct request *req, __le16 status,
359                 union nvme_result result)
360 {
361         struct nvme_request *rq = nvme_req(req);
362
363         rq->status = le16_to_cpu(status) >> 1;
364         rq->result = result;
365         /* inject error when permitted by fault injection framework */
366         nvme_should_fail(req);
367         blk_mq_complete_request(req);
368 }
369
370 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
371 {
372         get_device(ctrl->device);
373 }
374
375 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
376 {
377         put_device(ctrl->device);
378 }
379
380 void nvme_complete_rq(struct request *req);
381 void nvme_cancel_request(struct request *req, void *data, bool reserved);
382 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
383                 enum nvme_ctrl_state new_state);
384 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
385 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
386 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
387 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
388                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
389 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
390 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
391 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
392 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
393 int nvme_init_identify(struct nvme_ctrl *ctrl);
394
395 void nvme_queue_scan(struct nvme_ctrl *ctrl);
396 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
397
398 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
399                 bool send);
400
401 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
402                 union nvme_result *res);
403
404 void nvme_stop_queues(struct nvme_ctrl *ctrl);
405 void nvme_start_queues(struct nvme_ctrl *ctrl);
406 void nvme_kill_queues(struct nvme_ctrl *ctrl);
407 void nvme_unfreeze(struct nvme_ctrl *ctrl);
408 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
409 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
410 void nvme_start_freeze(struct nvme_ctrl *ctrl);
411 int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set);
412
413 #define NVME_QID_ANY -1
414 struct request *nvme_alloc_request(struct request_queue *q,
415                 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
416 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
417                 struct nvme_command *cmd);
418 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
419                 void *buf, unsigned bufflen);
420 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
421                 union nvme_result *result, void *buffer, unsigned bufflen,
422                 unsigned timeout, int qid, int at_head,
423                 blk_mq_req_flags_t flags);
424 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
425 void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
426 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
427 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
428 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
429 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
430 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
431
432 int nvme_get_log_ext(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
433                 u8 log_page, void *log, size_t size, size_t offset);
434
435 extern const struct attribute_group nvme_ns_id_attr_group;
436 extern const struct block_device_operations nvme_ns_head_ops;
437
438 #ifdef CONFIG_NVME_MULTIPATH
439 void nvme_failover_req(struct request *req);
440 bool nvme_req_needs_failover(struct request *req, blk_status_t error);
441 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
442 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
443 void nvme_mpath_add_disk(struct nvme_ns_head *head);
444 void nvme_mpath_add_disk_links(struct nvme_ns *ns);
445 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
446 void nvme_mpath_remove_disk_links(struct nvme_ns *ns);
447
448 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
449 {
450         struct nvme_ns_head *head = ns->head;
451
452         if (head && ns == srcu_dereference(head->current_path, &head->srcu))
453                 rcu_assign_pointer(head->current_path, NULL);
454 }
455 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
456
457 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
458 {
459         struct nvme_ns_head *head = ns->head;
460
461         if (head->disk && list_empty(&head->list))
462                 kblockd_schedule_work(&head->requeue_work);
463 }
464
465 #else
466 static inline void nvme_failover_req(struct request *req)
467 {
468 }
469 static inline bool nvme_req_needs_failover(struct request *req,
470                                            blk_status_t error)
471 {
472         return false;
473 }
474 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
475 {
476 }
477 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
478                 struct nvme_ns_head *head)
479 {
480         return 0;
481 }
482 static inline void nvme_mpath_add_disk(struct nvme_ns_head *head)
483 {
484 }
485 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
486 {
487 }
488 static inline void nvme_mpath_add_disk_links(struct nvme_ns *ns)
489 {
490 }
491 static inline void nvme_mpath_remove_disk_links(struct nvme_ns *ns)
492 {
493 }
494 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
495 {
496 }
497 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
498 {
499 }
500 #endif /* CONFIG_NVME_MULTIPATH */
501
502 #ifdef CONFIG_NVM
503 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
504 void nvme_nvm_unregister(struct nvme_ns *ns);
505 int nvme_nvm_register_sysfs(struct nvme_ns *ns);
506 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
507 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
508 #else
509 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
510                                     int node)
511 {
512         return 0;
513 }
514
515 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
516 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
517 {
518         return 0;
519 }
520 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
521 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
522                                                         unsigned long arg)
523 {
524         return -ENOTTY;
525 }
526 #endif /* CONFIG_NVM */
527
528 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
529 {
530         return dev_to_disk(dev)->private_data;
531 }
532
533 int __init nvme_core_init(void);
534 void nvme_core_exit(void);
535
536 #endif /* _NVME_H */