drivers/nvme/host/nvme.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  */
   5
   6 #ifndef _NVME_H
   7 #define _NVME_H
   8
   9 #include <linux/nvme.h>
  10 #include <linux/cdev.h>
  11 #include <linux/pci.h>
  12 #include <linux/kref.h>
  13 #include <linux/blk-mq.h>
  14 #include <linux/lightnvm.h>
  15 #include <linux/sed-opal.h>
  16 #include <linux/fault-inject.h>
  17 #include <linux/rcupdate.h>
  18
  19 extern unsigned int nvme_io_timeout;
  20 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  21
  22 extern unsigned int admin_timeout;
  23 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  24
  25 #define NVME_DEFAULT_KATO       5
  26 #define NVME_KATO_GRACE         10
  27
  28 extern struct workqueue_struct *nvme_wq;
  29 extern struct workqueue_struct *nvme_reset_wq;
  30 extern struct workqueue_struct *nvme_delete_wq;
  31
  32 enum {
  33         NVME_NS_LBA             = 0,
  34         NVME_NS_LIGHTNVM        = 1,
  35 };
  36
  37 /*
  38  * List of workarounds for devices that required behavior not specified in
  39  * the standard.
  40  */
  41 enum nvme_quirks {
  42         /*
  43          * Prefers I/O aligned to a stripe size specified in a vendor
  44          * specific Identify field.
  45          */
  46         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  47
  48         /*
  49          * The controller doesn't handle Identify value others than 0 or 1
  50          * correctly.
  51          */
  52         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  53
  54         /*
  55          * The controller deterministically returns O's on reads to
  56          * logical blocks that deallocate was called on.
  57          */
  58         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  59
  60         /*
  61          * The controller needs a delay before starts checking the device
  62          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  63          */
  64         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  65
  66         /*
  67          * APST should not be used.
  68          */
  69         NVME_QUIRK_NO_APST                      = (1 << 4),
  70
  71         /*
  72          * The deepest sleep state should not be used.
  73          */
  74         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  75
  76         /*
  77          * Supports the LighNVM command set if indicated in vs[1].
  78          */
  79         NVME_QUIRK_LIGHTNVM                     = (1 << 6),
  80
  81         /*
  82          * Set MEDIUM priority on SQ creation
  83          */
  84         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
  85
  86         /*
  87          * Ignore device provided subnqn.
  88          */
  89         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
  90 };
  91
  92 /*
  93  * Common request structure for NVMe passthrough.  All drivers must have
  94  * this structure as the first member of their request-private data.
  95  */
  96 struct nvme_request {
  97         struct nvme_command     *cmd;
  98         union nvme_result       result;
  99         u8                      retries;
 100         u8                      flags;
 101         u16                     status;
 102         struct nvme_ctrl        *ctrl;
 103 };
 104
 105 /*
 106  * Mark a bio as coming in through the mpath node.
 107  */
 108 #define REQ_NVME_MPATH          REQ_DRV
 109
 110 enum {
 111         NVME_REQ_CANCELLED              = (1 << 0),
 112         NVME_REQ_USERCMD                = (1 << 1),
 113 };
 114
 115 static inline struct nvme_request *nvme_req(struct request *req)
 116 {
 117         return blk_mq_rq_to_pdu(req);
 118 }
 119
 120 static inline u16 nvme_req_qid(struct request *req)
 121 {
 122         if (!req->rq_disk)
 123                 return 0;
 124         return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1;
 125 }
 126
 127 /* The below value is the specific amount of delay needed before checking
 128  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 129  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 130  * found empirically.
 131  */
 132 #define NVME_QUIRK_DELAY_AMOUNT         2300
 133
 134 enum nvme_ctrl_state {
 135         NVME_CTRL_NEW,
 136         NVME_CTRL_LIVE,
 137         NVME_CTRL_ADMIN_ONLY,    /* Only admin queue live */
 138         NVME_CTRL_RESETTING,
 139         NVME_CTRL_CONNECTING,
 140         NVME_CTRL_DELETING,
 141         NVME_CTRL_DEAD,
 142 };
 143
 144 struct nvme_ctrl {
 145         bool comp_seen;
 146         enum nvme_ctrl_state state;
 147         bool identified;
 148         spinlock_t lock;
 149         struct mutex scan_lock;
 150         const struct nvme_ctrl_ops *ops;
 151         struct request_queue *admin_q;
 152         struct request_queue *connect_q;
 153         struct device *dev;
 154         int instance;
 155         int numa_node;
 156         struct blk_mq_tag_set *tagset;
 157         struct blk_mq_tag_set *admin_tagset;
 158         struct list_head namespaces;
 159         struct rw_semaphore namespaces_rwsem;
 160         struct device ctrl_device;
 161         struct device *device;  /* char device */
 162         struct cdev cdev;
 163         struct work_struct reset_work;
 164         struct work_struct delete_work;
 165
 166         struct nvme_subsystem *subsys;
 167         struct list_head subsys_entry;
 168
 169         struct opal_dev *opal_dev;
 170
 171         char name[12];
 172         u16 cntlid;
 173
 174         u32 ctrl_config;
 175         u16 mtfa;
 176         u32 queue_count;
 177
 178         u64 cap;
 179         u32 page_size;
 180         u32 max_hw_sectors;
 181         u32 max_segments;
 182         u16 crdt[3];
 183         u16 oncs;
 184         u16 oacs;
 185         u16 nssa;
 186         u16 nr_streams;
 187         u32 max_namespaces;
 188         atomic_t abort_limit;
 189         u8 vwc;
 190         u32 vs;
 191         u32 sgls;
 192         u16 kas;
 193         u8 npss;
 194         u8 apsta;
 195         u32 oaes;
 196         u32 aen_result;
 197         u32 ctratt;
 198         unsigned int shutdown_timeout;
 199         unsigned int kato;
 200         bool subsystem;
 201         unsigned long quirks;
 202         struct nvme_id_power_state psd[32];
 203         struct nvme_effects_log *effects;
 204         struct work_struct scan_work;
 205         struct work_struct async_event_work;
 206         struct delayed_work ka_work;
 207         struct nvme_command ka_cmd;
 208         struct work_struct fw_act_work;
 209         unsigned long events;
 210
 211 #ifdef CONFIG_NVME_MULTIPATH
 212         /* asymmetric namespace access: */
 213         u8 anacap;
 214         u8 anatt;
 215         u32 anagrpmax;
 216         u32 nanagrpid;
 217         struct mutex ana_lock;
 218         struct nvme_ana_rsp_hdr *ana_log_buf;
 219         size_t ana_log_size;
 220         struct timer_list anatt_timer;
 221         struct work_struct ana_work;
 222 #endif
 223
 224         /* Power saving configuration */
 225         u64 ps_max_latency_us;
 226         bool apst_enabled;
 227
 228         /* PCIe only: */
 229         u32 hmpre;
 230         u32 hmmin;
 231         u32 hmminds;
 232         u16 hmmaxd;
 233
 234         /* Fabrics only */
 235         u16 sqsize;
 236         u32 ioccsz;
 237         u32 iorcsz;
 238         u16 icdoff;
 239         u16 maxcmd;
 240         int nr_reconnects;
 241         struct nvmf_ctrl_options *opts;
 242
 243         struct page *discard_page;
 244         unsigned long discard_page_busy;
 245 };
 246
 247 enum nvme_iopolicy {
 248         NVME_IOPOLICY_NUMA,
 249         NVME_IOPOLICY_RR,
 250 };
 251
 252 struct nvme_subsystem {
 253         int                     instance;
 254         struct device           dev;
 255         /*
 256          * Because we unregister the device on the last put we need
 257          * a separate refcount.
 258          */
 259         struct kref             ref;
 260         struct list_head        entry;
 261         struct mutex            lock;
 262         struct list_head        ctrls;
 263         struct list_head        nsheads;
 264         char                    subnqn[NVMF_NQN_SIZE];
 265         char                    serial[20];
 266         char                    model[40];
 267         char                    firmware_rev[8];
 268         u8                      cmic;
 269         u16                     vendor_id;
 270         struct ida              ns_ida;
 271 #ifdef CONFIG_NVME_MULTIPATH
 272         enum nvme_iopolicy      iopolicy;
 273 #endif
 274 };
 275
 276 /*
 277  * Container structure for uniqueue namespace identifiers.
 278  */
 279 struct nvme_ns_ids {
 280         u8      eui64[8];
 281         u8      nguid[16];
 282         uuid_t  uuid;
 283 };
 284
 285 /*
 286  * Anchor structure for namespaces.  There is one for each namespace in a
 287  * NVMe subsystem that any of our controllers can see, and the namespace
 288  * structure for each controller is chained of it.  For private namespaces
 289  * there is a 1:1 relation to our namespace structures, that is ->list
 290  * only ever has a single entry for private namespaces.
 291  */
 292 struct nvme_ns_head {
 293         struct list_head        list;
 294         struct srcu_struct      srcu;
 295         struct nvme_subsystem   *subsys;
 296         unsigned                ns_id;
 297         struct nvme_ns_ids      ids;
 298         struct list_head        entry;
 299         struct kref             ref;
 300         int                     instance;
 301 #ifdef CONFIG_NVME_MULTIPATH
 302         struct gendisk          *disk;
 303         struct bio_list         requeue_list;
 304         spinlock_t              requeue_lock;
 305         struct work_struct      requeue_work;
 306         struct mutex            lock;
 307         struct nvme_ns __rcu    *current_path[];
 308 #endif
 309 };
 310
 311 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 312 struct nvme_fault_inject {
 313         struct fault_attr attr;
 314         struct dentry *parent;
 315         bool dont_retry;        /* DNR, do not retry */
 316         u16 status;             /* status code */
 317 };
 318 #endif
 319
 320 struct nvme_ns {
 321         struct list_head list;
 322
 323         struct nvme_ctrl *ctrl;
 324         struct request_queue *queue;
 325         struct gendisk *disk;
 326 #ifdef CONFIG_NVME_MULTIPATH
 327         enum nvme_ana_state ana_state;
 328         u32 ana_grpid;
 329 #endif
 330         struct list_head siblings;
 331         struct nvm_dev *ndev;
 332         struct kref kref;
 333         struct nvme_ns_head *head;
 334
 335         int lba_shift;
 336         u16 ms;
 337         u16 sgs;
 338         u32 sws;
 339         bool ext;
 340         u8 pi_type;
 341         unsigned long flags;
 342 #define NVME_NS_REMOVING        0
 343 #define NVME_NS_DEAD            1
 344 #define NVME_NS_ANA_PENDING     2
 345         u16 noiob;
 346
 347 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 348         struct nvme_fault_inject fault_inject;
 349 #endif
 350
 351 };
 352
 353 struct nvme_ctrl_ops {
 354         const char *name;
 355         struct module *module;
 356         unsigned int flags;
 357 #define NVME_F_FABRICS                  (1 << 0)
 358 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 359 #define NVME_F_PCI_P2PDMA               (1 << 2)
 360         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 361         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 362         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 363         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 364         void (*submit_async_event)(struct nvme_ctrl *ctrl);
 365         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
 366         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 367 };
 368
 369 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 370 void nvme_fault_inject_init(struct nvme_ns *ns);
 371 void nvme_fault_inject_fini(struct nvme_ns *ns);
 372 void nvme_should_fail(struct request *req);
 373 #else
 374 static inline void nvme_fault_inject_init(struct nvme_ns *ns) {}
 375 static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {}
 376 static inline void nvme_should_fail(struct request *req) {}
 377 #endif
 378
 379 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 380 {
 381         if (!ctrl->subsystem)
 382                 return -ENOTTY;
 383         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 384 }
 385
 386 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
 387 {
 388         return (sector >> (ns->lba_shift - 9));
 389 }
 390
 391 static inline void nvme_end_request(struct request *req, __le16 status,
 392                 union nvme_result result)
 393 {
 394         struct nvme_request *rq = nvme_req(req);
 395
 396         rq->status = le16_to_cpu(status) >> 1;
 397         rq->result = result;
 398         /* inject error when permitted by fault injection framework */
 399         nvme_should_fail(req);
 400         blk_mq_complete_request(req);
 401 }
 402
 403 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
 404 {
 405         get_device(ctrl->device);
 406 }
 407
 408 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
 409 {
 410         put_device(ctrl->device);
 411 }
 412
 413 void nvme_complete_rq(struct request *req);
 414 bool nvme_cancel_request(struct request *req, void *data, bool reserved);
 415 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 416                 enum nvme_ctrl_state new_state);
 417 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 418 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 419 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 420 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 421                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 422 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 423 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
 424 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
 425 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
 426 int nvme_init_identify(struct nvme_ctrl *ctrl);
 427
 428 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 429
 430 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
 431                 bool send);
 432
 433 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 434                 volatile union nvme_result *res);
 435
 436 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 437 void nvme_start_queues(struct nvme_ctrl *ctrl);
 438 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 439 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 440 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 441 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 442 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 443
 444 #define NVME_QID_ANY -1
 445 struct request *nvme_alloc_request(struct request_queue *q,
 446                 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
 447 void nvme_cleanup_cmd(struct request *req);
 448 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
 449                 struct nvme_command *cmd);
 450 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 451                 void *buf, unsigned bufflen);
 452 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 453                 union nvme_result *result, void *buffer, unsigned bufflen,
 454                 unsigned timeout, int qid, int at_head,
 455                 blk_mq_req_flags_t flags, bool poll);
 456 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 457 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 458 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 459 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
 460 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
 461
 462 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp,
 463                 void *log, size_t size, u64 offset);
 464
 465 extern const struct attribute_group *nvme_ns_id_attr_groups[];
 466 extern const struct block_device_operations nvme_ns_head_ops;
 467
 468 #ifdef CONFIG_NVME_MULTIPATH
 469 bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl);
 470 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
 471                         struct nvme_ctrl *ctrl, int *flags);
 472 void nvme_failover_req(struct request *req);
 473 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
 474 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
 475 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
 476 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
 477 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
 478 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
 479 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
 480 void nvme_mpath_clear_current_path(struct nvme_ns *ns);
 481 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
 482
 483 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
 484 {
 485         struct nvme_ns_head *head = ns->head;
 486
 487         if (head->disk && list_empty(&head->list))
 488                 kblockd_schedule_work(&head->requeue_work);
 489 }
 490
 491 extern struct device_attribute dev_attr_ana_grpid;
 492 extern struct device_attribute dev_attr_ana_state;
 493 extern struct device_attribute subsys_attr_iopolicy;
 494
 495 #else
 496 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 497 {
 498         return false;
 499 }
 500 /*
 501  * Without the multipath code enabled, multiple controller per subsystems are
 502  * visible as devices and thus we cannot use the subsystem instance.
 503  */
 504 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
 505                                       struct nvme_ctrl *ctrl, int *flags)
 506 {
 507         sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
 508 }
 509
 510 static inline void nvme_failover_req(struct request *req)
 511 {
 512 }
 513 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
 514 {
 515 }
 516 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
 517                 struct nvme_ns_head *head)
 518 {
 519         return 0;
 520 }
 521 static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
 522                 struct nvme_id_ns *id)
 523 {
 524 }
 525 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
 526 {
 527 }
 528 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
 529 {
 530 }
 531 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
 532 {
 533 }
 534 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl,
 535                 struct nvme_id_ctrl *id)
 536 {
 537         if (ctrl->subsys->cmic & (1 << 3))
 538                 dev_warn(ctrl->device,
 539 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
 540         return 0;
 541 }
 542 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
 543 {
 544 }
 545 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
 546 {
 547 }
 548 #endif /* CONFIG_NVME_MULTIPATH */
 549
 550 #ifdef CONFIG_NVM
 551 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
 552 void nvme_nvm_unregister(struct nvme_ns *ns);
 553 extern const struct attribute_group nvme_nvm_attr_group;
 554 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
 555 #else
 556 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
 557                                     int node)
 558 {
 559         return 0;
 560 }
 561
 562 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
 563 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
 564                                                         unsigned long arg)
 565 {
 566         return -ENOTTY;
 567 }
 568 #endif /* CONFIG_NVM */
 569
 570 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
 571 {
 572         return dev_to_disk(dev)->private_data;
 573 }
 574
 575 int __init nvme_core_init(void);
 576 void __exit nvme_core_exit(void);
 577
 578 #endif /* _NVME_H */