drivers/nvme/host/nvme.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  */
   5
   6 #ifndef _NVME_H
   7 #define _NVME_H
   8
   9 #include <linux/nvme.h>
  10 #include <linux/cdev.h>
  11 #include <linux/pci.h>
  12 #include <linux/kref.h>
  13 #include <linux/blk-mq.h>
  14 #include <linux/lightnvm.h>
  15 #include <linux/sed-opal.h>
  16 #include <linux/fault-inject.h>
  17 #include <linux/rcupdate.h>
  18
  19 #include <trace/events/block.h>
  20
  21 extern unsigned int nvme_io_timeout;
  22 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  23
  24 extern unsigned int admin_timeout;
  25 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  26
  27 #define NVME_DEFAULT_KATO       5
  28 #define NVME_KATO_GRACE         10
  29
  30 extern struct workqueue_struct *nvme_wq;
  31 extern struct workqueue_struct *nvme_reset_wq;
  32 extern struct workqueue_struct *nvme_delete_wq;
  33
  34 enum {
  35         NVME_NS_LBA             = 0,
  36         NVME_NS_LIGHTNVM        = 1,
  37 };
  38
  39 /*
  40  * List of workarounds for devices that required behavior not specified in
  41  * the standard.
  42  */
  43 enum nvme_quirks {
  44         /*
  45          * Prefers I/O aligned to a stripe size specified in a vendor
  46          * specific Identify field.
  47          */
  48         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  49
  50         /*
  51          * The controller doesn't handle Identify value others than 0 or 1
  52          * correctly.
  53          */
  54         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  55
  56         /*
  57          * The controller deterministically returns O's on reads to
  58          * logical blocks that deallocate was called on.
  59          */
  60         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  61
  62         /*
  63          * The controller needs a delay before starts checking the device
  64          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  65          */
  66         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  67
  68         /*
  69          * APST should not be used.
  70          */
  71         NVME_QUIRK_NO_APST                      = (1 << 4),
  72
  73         /*
  74          * The deepest sleep state should not be used.
  75          */
  76         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  77
  78         /*
  79          * Supports the LighNVM command set if indicated in vs[1].
  80          */
  81         NVME_QUIRK_LIGHTNVM                     = (1 << 6),
  82
  83         /*
  84          * Set MEDIUM priority on SQ creation
  85          */
  86         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
  87
  88         /*
  89          * Ignore device provided subnqn.
  90          */
  91         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
  92
  93         /*
  94          * Broken Write Zeroes.
  95          */
  96         NVME_QUIRK_DISABLE_WRITE_ZEROES         = (1 << 9),
  97
  98         /*
  99          * Force simple suspend/resume path.
 100          */
 101         NVME_QUIRK_SIMPLE_SUSPEND               = (1 << 10),
 102
 103         /*
 104          * Use only one interrupt vector for all queues
 105          */
 106         NVME_QUIRK_SINGLE_VECTOR                = (1 << 11),
 107
 108         /*
 109          * Use non-standard 128 bytes SQEs.
 110          */
 111         NVME_QUIRK_128_BYTES_SQES               = (1 << 12),
 112
 113         /*
 114          * Prevent tag overlap between queues
 115          */
 116         NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
 117 };
 118
 119 /*
 120  * Common request structure for NVMe passthrough.  All drivers must have
 121  * this structure as the first member of their request-private data.
 122  */
 123 struct nvme_request {
 124         struct nvme_command     *cmd;
 125         union nvme_result       result;
 126         u8                      retries;
 127         u8                      flags;
 128         u16                     status;
 129         struct nvme_ctrl        *ctrl;
 130 };
 131
 132 /*
 133  * Mark a bio as coming in through the mpath node.
 134  */
 135 #define REQ_NVME_MPATH          REQ_DRV
 136
 137 enum {
 138         NVME_REQ_CANCELLED              = (1 << 0),
 139         NVME_REQ_USERCMD                = (1 << 1),
 140 };
 141
 142 static inline struct nvme_request *nvme_req(struct request *req)
 143 {
 144         return blk_mq_rq_to_pdu(req);
 145 }
 146
 147 static inline u16 nvme_req_qid(struct request *req)
 148 {
 149         if (!req->rq_disk)
 150                 return 0;
 151         return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1;
 152 }
 153
 154 /* The below value is the specific amount of delay needed before checking
 155  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 156  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 157  * found empirically.
 158  */
 159 #define NVME_QUIRK_DELAY_AMOUNT         2300
 160
 161 enum nvme_ctrl_state {
 162         NVME_CTRL_NEW,
 163         NVME_CTRL_LIVE,
 164         NVME_CTRL_ADMIN_ONLY,    /* Only admin queue live */
 165         NVME_CTRL_RESETTING,
 166         NVME_CTRL_CONNECTING,
 167         NVME_CTRL_DELETING,
 168         NVME_CTRL_DEAD,
 169 };
 170
 171 struct nvme_fault_inject {
 172 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 173         struct fault_attr attr;
 174         struct dentry *parent;
 175         bool dont_retry;        /* DNR, do not retry */
 176         u16 status;             /* status code */
 177 #endif
 178 };
 179
 180 struct nvme_ctrl {
 181         bool comp_seen;
 182         enum nvme_ctrl_state state;
 183         bool identified;
 184         spinlock_t lock;
 185         struct mutex scan_lock;
 186         const struct nvme_ctrl_ops *ops;
 187         struct request_queue *admin_q;
 188         struct request_queue *connect_q;
 189         struct request_queue *fabrics_q;
 190         struct device *dev;
 191         int instance;
 192         int numa_node;
 193         struct blk_mq_tag_set *tagset;
 194         struct blk_mq_tag_set *admin_tagset;
 195         struct list_head namespaces;
 196         struct rw_semaphore namespaces_rwsem;
 197         struct device ctrl_device;
 198         struct device *device;  /* char device */
 199         struct cdev cdev;
 200         struct work_struct reset_work;
 201         struct work_struct delete_work;
 202
 203         struct nvme_subsystem *subsys;
 204         struct list_head subsys_entry;
 205
 206         struct opal_dev *opal_dev;
 207
 208         char name[12];
 209         u16 cntlid;
 210
 211         u32 ctrl_config;
 212         u16 mtfa;
 213         u32 queue_count;
 214
 215         u64 cap;
 216         u32 page_size;
 217         u32 max_hw_sectors;
 218         u32 max_segments;
 219         u16 crdt[3];
 220         u16 oncs;
 221         u16 oacs;
 222         u16 nssa;
 223         u16 nr_streams;
 224         u16 sqsize;
 225         u32 max_namespaces;
 226         atomic_t abort_limit;
 227         u8 vwc;
 228         u32 vs;
 229         u32 sgls;
 230         u16 kas;
 231         u8 npss;
 232         u8 apsta;
 233         u32 oaes;
 234         u32 aen_result;
 235         u32 ctratt;
 236         unsigned int shutdown_timeout;
 237         unsigned int kato;
 238         bool subsystem;
 239         unsigned long quirks;
 240         struct nvme_id_power_state psd[32];
 241         struct nvme_effects_log *effects;
 242         struct work_struct scan_work;
 243         struct work_struct async_event_work;
 244         struct delayed_work ka_work;
 245         struct nvme_command ka_cmd;
 246         struct work_struct fw_act_work;
 247         unsigned long events;
 248
 249 #ifdef CONFIG_NVME_MULTIPATH
 250         /* asymmetric namespace access: */
 251         u8 anacap;
 252         u8 anatt;
 253         u32 anagrpmax;
 254         u32 nanagrpid;
 255         struct mutex ana_lock;
 256         struct nvme_ana_rsp_hdr *ana_log_buf;
 257         size_t ana_log_size;
 258         struct timer_list anatt_timer;
 259         struct work_struct ana_work;
 260 #endif
 261
 262         /* Power saving configuration */
 263         u64 ps_max_latency_us;
 264         bool apst_enabled;
 265
 266         /* PCIe only: */
 267         u32 hmpre;
 268         u32 hmmin;
 269         u32 hmminds;
 270         u16 hmmaxd;
 271
 272         /* Fabrics only */
 273         u32 ioccsz;
 274         u32 iorcsz;
 275         u16 icdoff;
 276         u16 maxcmd;
 277         int nr_reconnects;
 278         struct nvmf_ctrl_options *opts;
 279
 280         struct page *discard_page;
 281         unsigned long discard_page_busy;
 282
 283         struct nvme_fault_inject fault_inject;
 284 };
 285
 286 enum nvme_iopolicy {
 287         NVME_IOPOLICY_NUMA,
 288         NVME_IOPOLICY_RR,
 289 };
 290
 291 struct nvme_subsystem {
 292         int                     instance;
 293         struct device           dev;
 294         /*
 295          * Because we unregister the device on the last put we need
 296          * a separate refcount.
 297          */
 298         struct kref             ref;
 299         struct list_head        entry;
 300         struct mutex            lock;
 301         struct list_head        ctrls;
 302         struct list_head        nsheads;
 303         char                    subnqn[NVMF_NQN_SIZE];
 304         char                    serial[20];
 305         char                    model[40];
 306         char                    firmware_rev[8];
 307         u8                      cmic;
 308         u16                     vendor_id;
 309         u16                     awupf;  /* 0's based awupf value. */
 310         struct ida              ns_ida;
 311 #ifdef CONFIG_NVME_MULTIPATH
 312         enum nvme_iopolicy      iopolicy;
 313 #endif
 314 };
 315
 316 /*
 317  * Container structure for uniqueue namespace identifiers.
 318  */
 319 struct nvme_ns_ids {
 320         u8      eui64[8];
 321         u8      nguid[16];
 322         uuid_t  uuid;
 323 };
 324
 325 /*
 326  * Anchor structure for namespaces.  There is one for each namespace in a
 327  * NVMe subsystem that any of our controllers can see, and the namespace
 328  * structure for each controller is chained of it.  For private namespaces
 329  * there is a 1:1 relation to our namespace structures, that is ->list
 330  * only ever has a single entry for private namespaces.
 331  */
 332 struct nvme_ns_head {
 333         struct list_head        list;
 334         struct srcu_struct      srcu;
 335         struct nvme_subsystem   *subsys;
 336         unsigned                ns_id;
 337         struct nvme_ns_ids      ids;
 338         struct list_head        entry;
 339         struct kref             ref;
 340         int                     instance;
 341 #ifdef CONFIG_NVME_MULTIPATH
 342         struct gendisk          *disk;
 343         struct bio_list         requeue_list;
 344         spinlock_t              requeue_lock;
 345         struct work_struct      requeue_work;
 346         struct mutex            lock;
 347         struct nvme_ns __rcu    *current_path[];
 348 #endif
 349 };
 350
 351 struct nvme_ns {
 352         struct list_head list;
 353
 354         struct nvme_ctrl *ctrl;
 355         struct request_queue *queue;
 356         struct gendisk *disk;
 357 #ifdef CONFIG_NVME_MULTIPATH
 358         enum nvme_ana_state ana_state;
 359         u32 ana_grpid;
 360 #endif
 361         struct list_head siblings;
 362         struct nvm_dev *ndev;
 363         struct kref kref;
 364         struct nvme_ns_head *head;
 365
 366         int lba_shift;
 367         u16 ms;
 368         u16 sgs;
 369         u32 sws;
 370         bool ext;
 371         u8 pi_type;
 372         unsigned long flags;
 373 #define NVME_NS_REMOVING        0
 374 #define NVME_NS_DEAD            1
 375 #define NVME_NS_ANA_PENDING     2
 376         u16 noiob;
 377
 378         struct nvme_fault_inject fault_inject;
 379
 380 };
 381
 382 struct nvme_ctrl_ops {
 383         const char *name;
 384         struct module *module;
 385         unsigned int flags;
 386 #define NVME_F_FABRICS                  (1 << 0)
 387 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 388 #define NVME_F_PCI_P2PDMA               (1 << 2)
 389         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 390         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 391         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 392         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 393         void (*submit_async_event)(struct nvme_ctrl *ctrl);
 394         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
 395         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 396 };
 397
 398 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 399 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 400                             const char *dev_name);
 401 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
 402 void nvme_should_fail(struct request *req);
 403 #else
 404 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 405                                           const char *dev_name)
 406 {
 407 }
 408 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
 409 {
 410 }
 411 static inline void nvme_should_fail(struct request *req) {}
 412 #endif
 413
 414 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 415 {
 416         if (!ctrl->subsystem)
 417                 return -ENOTTY;
 418         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 419 }
 420
 421 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
 422 {
 423         return (sector >> (ns->lba_shift - 9));
 424 }
 425
 426 static inline void nvme_end_request(struct request *req, __le16 status,
 427                 union nvme_result result)
 428 {
 429         struct nvme_request *rq = nvme_req(req);
 430
 431         rq->status = le16_to_cpu(status) >> 1;
 432         rq->result = result;
 433         /* inject error when permitted by fault injection framework */
 434         nvme_should_fail(req);
 435         blk_mq_complete_request(req);
 436 }
 437
 438 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
 439 {
 440         get_device(ctrl->device);
 441 }
 442
 443 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
 444 {
 445         put_device(ctrl->device);
 446 }
 447
 448 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
 449 {
 450         return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH;
 451 }
 452
 453 void nvme_complete_rq(struct request *req);
 454 bool nvme_cancel_request(struct request *req, void *data, bool reserved);
 455 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 456                 enum nvme_ctrl_state new_state);
 457 int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
 458 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
 459 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 460 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 461                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 462 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 463 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
 464 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
 465 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
 466 int nvme_init_identify(struct nvme_ctrl *ctrl);
 467
 468 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 469
 470 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
 471                 bool send);
 472
 473 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 474                 volatile union nvme_result *res);
 475
 476 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 477 void nvme_start_queues(struct nvme_ctrl *ctrl);
 478 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 479 void nvme_sync_queues(struct nvme_ctrl *ctrl);
 480 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 481 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 482 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 483 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 484
 485 #define NVME_QID_ANY -1
 486 struct request *nvme_alloc_request(struct request_queue *q,
 487                 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
 488 void nvme_cleanup_cmd(struct request *req);
 489 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
 490                 struct nvme_command *cmd);
 491 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 492                 void *buf, unsigned bufflen);
 493 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 494                 union nvme_result *result, void *buffer, unsigned bufflen,
 495                 unsigned timeout, int qid, int at_head,
 496                 blk_mq_req_flags_t flags, bool poll);
 497 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
 498                       unsigned int dword11, void *buffer, size_t buflen,
 499                       u32 *result);
 500 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
 501                       unsigned int dword11, void *buffer, size_t buflen,
 502                       u32 *result);
 503 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 504 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 505 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 506 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
 507 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
 508
 509 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp,
 510                 void *log, size_t size, u64 offset);
 511
 512 extern const struct attribute_group *nvme_ns_id_attr_groups[];
 513 extern const struct block_device_operations nvme_ns_head_ops;
 514
 515 #ifdef CONFIG_NVME_MULTIPATH
 516 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 517 {
 518         return ctrl->ana_log_buf != NULL;
 519 }
 520
 521 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
 522 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
 523 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
 524 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
 525                         struct nvme_ctrl *ctrl, int *flags);
 526 void nvme_failover_req(struct request *req);
 527 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
 528 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
 529 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
 530 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
 531 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
 532 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
 533 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
 534 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
 535 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
 536 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
 537
 538 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
 539 {
 540         struct nvme_ns_head *head = ns->head;
 541
 542         if (head->disk && list_empty(&head->list))
 543                 kblockd_schedule_work(&head->requeue_work);
 544 }
 545
 546 static inline void nvme_trace_bio_complete(struct request *req,
 547         blk_status_t status)
 548 {
 549         struct nvme_ns *ns = req->q->queuedata;
 550
 551         if (req->cmd_flags & REQ_NVME_MPATH)
 552                 trace_block_bio_complete(ns->head->disk->queue,
 553                                          req->bio, status);
 554 }
 555
 556 extern struct device_attribute dev_attr_ana_grpid;
 557 extern struct device_attribute dev_attr_ana_state;
 558 extern struct device_attribute subsys_attr_iopolicy;
 559
 560 #else
 561 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 562 {
 563         return false;
 564 }
 565 /*
 566  * Without the multipath code enabled, multiple controller per subsystems are
 567  * visible as devices and thus we cannot use the subsystem instance.
 568  */
 569 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
 570                                       struct nvme_ctrl *ctrl, int *flags)
 571 {
 572         sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
 573 }
 574
 575 static inline void nvme_failover_req(struct request *req)
 576 {
 577 }
 578 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
 579 {
 580 }
 581 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
 582                 struct nvme_ns_head *head)
 583 {
 584         return 0;
 585 }
 586 static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
 587                 struct nvme_id_ns *id)
 588 {
 589 }
 590 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
 591 {
 592 }
 593 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
 594 {
 595         return false;
 596 }
 597 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
 598 {
 599 }
 600 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
 601 {
 602 }
 603 static inline void nvme_trace_bio_complete(struct request *req,
 604         blk_status_t status)
 605 {
 606 }
 607 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl,
 608                 struct nvme_id_ctrl *id)
 609 {
 610         if (ctrl->subsys->cmic & (1 << 3))
 611                 dev_warn(ctrl->device,
 612 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
 613         return 0;
 614 }
 615 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
 616 {
 617 }
 618 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
 619 {
 620 }
 621 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
 622 {
 623 }
 624 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
 625 {
 626 }
 627 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
 628 {
 629 }
 630 #endif /* CONFIG_NVME_MULTIPATH */
 631
 632 #ifdef CONFIG_NVM
 633 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
 634 void nvme_nvm_unregister(struct nvme_ns *ns);
 635 extern const struct attribute_group nvme_nvm_attr_group;
 636 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
 637 #else
 638 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
 639                                     int node)
 640 {
 641         return 0;
 642 }
 643
 644 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
 645 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
 646                                                         unsigned long arg)
 647 {
 648         return -ENOTTY;
 649 }
 650 #endif /* CONFIG_NVM */
 651
 652 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
 653 {
 654         return dev_to_disk(dev)->private_data;
 655 }
 656
 657 #endif /* _NVME_H */