drivers/net/wireless/realtek/rtlwifi/pci.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2009-2012  Realtek Corporation.*/
   3
   4 #include "wifi.h"
   5 #include "core.h"
   6 #include "pci.h"
   7 #include "base.h"
   8 #include "ps.h"
   9 #include "efuse.h"
  10 #include <linux/interrupt.h>
  11 #include <linux/export.h>
  12 #include <linux/module.h>
  13
  14 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  15 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  16 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  17 MODULE_LICENSE("GPL");
  18 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  19
  20 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  21         INTEL_VENDOR_ID,
  22         ATI_VENDOR_ID,
  23         AMD_VENDOR_ID,
  24         SIS_VENDOR_ID
  25 };
  26
  27 static const u8 ac_to_hwq[] = {
  28         VO_QUEUE,
  29         VI_QUEUE,
  30         BE_QUEUE,
  31         BK_QUEUE
  32 };
  33
  34 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw, struct sk_buff *skb)
  35 {
  36         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  37         __le16 fc = rtl_get_fc(skb);
  38         u8 queue_index = skb_get_queue_mapping(skb);
  39         struct ieee80211_hdr *hdr;
  40
  41         if (unlikely(ieee80211_is_beacon(fc)))
  42                 return BEACON_QUEUE;
  43         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  44                 return MGNT_QUEUE;
  45         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  46                 if (ieee80211_is_nullfunc(fc))
  47                         return HIGH_QUEUE;
  48         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
  49                 hdr = rtl_get_hdr(skb);
  50
  51                 if (is_multicast_ether_addr(hdr->addr1) ||
  52                     is_broadcast_ether_addr(hdr->addr1))
  53                         return HIGH_QUEUE;
  54         }
  55
  56         return ac_to_hwq[queue_index];
  57 }
  58
  59 /* Update PCI dependent default settings*/
  60 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  61 {
  62         struct rtl_priv *rtlpriv = rtl_priv(hw);
  63         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  64         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  65         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  66         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  67         u8 init_aspm;
  68
  69         ppsc->reg_rfps_level = 0;
  70         ppsc->support_aspm = false;
  71
  72         /*Update PCI ASPM setting */
  73         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  74         switch (rtlpci->const_pci_aspm) {
  75         case 0:
  76                 /*No ASPM */
  77                 break;
  78
  79         case 1:
  80                 /*ASPM dynamically enabled/disable. */
  81                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  82                 break;
  83
  84         case 2:
  85                 /*ASPM with Clock Req dynamically enabled/disable. */
  86                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  87                                          RT_RF_OFF_LEVL_CLK_REQ);
  88                 break;
  89
  90         case 3:
  91                 /* Always enable ASPM and Clock Req
  92                  * from initialization to halt.
  93                  */
  94                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
  95                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
  96                                          RT_RF_OFF_LEVL_CLK_REQ);
  97                 break;
  98
  99         case 4:
 100                 /* Always enable ASPM without Clock Req
 101                  * from initialization to halt.
 102                  */
 103                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 104                                           RT_RF_OFF_LEVL_CLK_REQ);
 105                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 106                 break;
 107         }
 108
 109         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 110
 111         /*Update Radio OFF setting */
 112         switch (rtlpci->const_hwsw_rfoff_d3) {
 113         case 1:
 114                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 115                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 116                 break;
 117
 118         case 2:
 119                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 120                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 121                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 122                 break;
 123
 124         case 3:
 125                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 126                 break;
 127         }
 128
 129         /*Set HW definition to determine if it supports ASPM. */
 130         switch (rtlpci->const_support_pciaspm) {
 131         case 0:
 132                 /*Not support ASPM. */
 133                 ppsc->support_aspm = false;
 134                 break;
 135         case 1:
 136                 /*Support ASPM. */
 137                 ppsc->support_aspm = true;
 138                 ppsc->support_backdoor = true;
 139                 break;
 140         case 2:
 141                 /*ASPM value set by chipset. */
 142                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 143                         ppsc->support_aspm = true;
 144                 break;
 145         default:
 146                 pr_err("switch case %#x not processed\n",
 147                        rtlpci->const_support_pciaspm);
 148                 break;
 149         }
 150
 151         /* toshiba aspm issue, toshiba will set aspm selfly
 152          * so we should not set aspm in driver
 153          */
 154         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 155         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 156             init_aspm == 0x43)
 157                 ppsc->support_aspm = false;
 158 }
 159
 160 static bool _rtl_pci_platform_switch_device_pci_aspm(
 161                         struct ieee80211_hw *hw,
 162                         u8 value)
 163 {
 164         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 165         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 166
 167         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 168                 value |= 0x40;
 169
 170         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 171
 172         return false;
 173 }
 174
 175 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 176 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 177 {
 178         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 179         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 180
 181         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 182
 183         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 184                 udelay(100);
 185 }
 186
 187 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 188 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 189 {
 190         struct rtl_priv *rtlpriv = rtl_priv(hw);
 191         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 192         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 193         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 194         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 195         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 196         /*Retrieve original configuration settings. */
 197         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 198         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 199                                 pcibridge_linkctrlreg;
 200         u16 aspmlevel = 0;
 201         u8 tmp_u1b = 0;
 202
 203         if (!ppsc->support_aspm)
 204                 return;
 205
 206         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 207                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 208                          "PCI(Bridge) UNKNOWN\n");
 209
 210                 return;
 211         }
 212
 213         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 214                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 215                 _rtl_pci_switch_clk_req(hw, 0x0);
 216         }
 217
 218         /*for promising device will in L0 state after an I/O. */
 219         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 220
 221         /*Set corresponding value. */
 222         aspmlevel |= BIT(0) | BIT(1);
 223         linkctrl_reg &= ~aspmlevel;
 224         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 225
 226         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 227         udelay(50);
 228
 229         /*4 Disable Pci Bridge ASPM */
 230         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 231                               pcibridge_linkctrlreg);
 232
 233         udelay(50);
 234 }
 235
 236 /*Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 237  *power saving We should follow the sequence to enable
 238  *RTL8192SE first then enable Pci Bridge ASPM
 239  *or the system will show bluescreen.
 240  */
 241 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 242 {
 243         struct rtl_priv *rtlpriv = rtl_priv(hw);
 244         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 245         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 246         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 247         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 248         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 249         u16 aspmlevel;
 250         u8 u_pcibridge_aspmsetting;
 251         u8 u_device_aspmsetting;
 252
 253         if (!ppsc->support_aspm)
 254                 return;
 255
 256         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 257                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 258                          "PCI(Bridge) UNKNOWN\n");
 259                 return;
 260         }
 261
 262         /*4 Enable Pci Bridge ASPM */
 263
 264         u_pcibridge_aspmsetting =
 265             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 266             rtlpci->const_hostpci_aspm_setting;
 267
 268         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 269                 u_pcibridge_aspmsetting &= ~BIT(0);
 270
 271         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 272                               u_pcibridge_aspmsetting);
 273
 274         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 275                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 276                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 277                  u_pcibridge_aspmsetting);
 278
 279         udelay(50);
 280
 281         /*Get ASPM level (with/without Clock Req) */
 282         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 283         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 284
 285         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 286         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 287
 288         u_device_aspmsetting |= aspmlevel;
 289
 290         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 291
 292         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 293                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 294                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 295                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 296         }
 297         udelay(100);
 298 }
 299
 300 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 301 {
 302         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 303
 304         bool status = false;
 305         u8 offset_e0;
 306         unsigned int offset_e4;
 307
 308         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 309
 310         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 311
 312         if (offset_e0 == 0xA0) {
 313                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 314                 if (offset_e4 & BIT(23))
 315                         status = true;
 316         }
 317
 318         return status;
 319 }
 320
 321 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 322                                      struct rtl_priv **buddy_priv)
 323 {
 324         struct rtl_priv *rtlpriv = rtl_priv(hw);
 325         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 326         bool find_buddy_priv = false;
 327         struct rtl_priv *tpriv;
 328         struct rtl_pci_priv *tpcipriv = NULL;
 329
 330         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 331                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 332                                     list) {
 333                         tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 334                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 335                                  "pcipriv->ndis_adapter.funcnumber %x\n",
 336                                 pcipriv->ndis_adapter.funcnumber);
 337                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 338                                  "tpcipriv->ndis_adapter.funcnumber %x\n",
 339                                 tpcipriv->ndis_adapter.funcnumber);
 340
 341                         if (pcipriv->ndis_adapter.busnumber ==
 342                             tpcipriv->ndis_adapter.busnumber &&
 343                             pcipriv->ndis_adapter.devnumber ==
 344                             tpcipriv->ndis_adapter.devnumber &&
 345                             pcipriv->ndis_adapter.funcnumber !=
 346                             tpcipriv->ndis_adapter.funcnumber) {
 347                                 find_buddy_priv = true;
 348                                 break;
 349                         }
 350                 }
 351         }
 352
 353         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 354                  "find_buddy_priv %d\n", find_buddy_priv);
 355
 356         if (find_buddy_priv)
 357                 *buddy_priv = tpriv;
 358
 359         return find_buddy_priv;
 360 }
 361
 362 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 363 {
 364         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 365         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 366         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 367         u8 linkctrl_reg;
 368         u8 num4bbytes;
 369
 370         num4bbytes = (capabilityoffset + 0x10) / 4;
 371
 372         /*Read  Link Control Register */
 373         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 374
 375         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 376 }
 377
 378 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 379                                         struct ieee80211_hw *hw)
 380 {
 381         struct rtl_priv *rtlpriv = rtl_priv(hw);
 382         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 383
 384         u8 tmp;
 385         u16 linkctrl_reg;
 386
 387         /*Link Control Register */
 388         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 389         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 390
 391         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 392                  pcipriv->ndis_adapter.linkctrl_reg);
 393
 394         pci_read_config_byte(pdev, 0x98, &tmp);
 395         tmp |= BIT(4);
 396         pci_write_config_byte(pdev, 0x98, tmp);
 397
 398         tmp = 0x17;
 399         pci_write_config_byte(pdev, 0x70f, tmp);
 400 }
 401
 402 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 403 {
 404         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 405
 406         _rtl_pci_update_default_setting(hw);
 407
 408         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 409                 /*Always enable ASPM & Clock Req. */
 410                 rtl_pci_enable_aspm(hw);
 411                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 412         }
 413 }
 414
 415 static void _rtl_pci_io_handler_init(struct device *dev,
 416                                      struct ieee80211_hw *hw)
 417 {
 418         struct rtl_priv *rtlpriv = rtl_priv(hw);
 419
 420         rtlpriv->io.dev = dev;
 421
 422         rtlpriv->io.write8_async = pci_write8_async;
 423         rtlpriv->io.write16_async = pci_write16_async;
 424         rtlpriv->io.write32_async = pci_write32_async;
 425
 426         rtlpriv->io.read8_sync = pci_read8_sync;
 427         rtlpriv->io.read16_sync = pci_read16_sync;
 428         rtlpriv->io.read32_sync = pci_read32_sync;
 429 }
 430
 431 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 432                                        struct sk_buff *skb,
 433                                        struct rtl_tcb_desc *tcb_desc, u8 tid)
 434 {
 435         struct rtl_priv *rtlpriv = rtl_priv(hw);
 436         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 437         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 438         struct sk_buff *next_skb;
 439         u8 additionlen = FCS_LEN;
 440
 441         /* here open is 4, wep/tkip is 8, aes is 12*/
 442         if (info->control.hw_key)
 443                 additionlen += info->control.hw_key->icv_len;
 444
 445         /* The most skb num is 6 */
 446         tcb_desc->empkt_num = 0;
 447         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 448         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 449                 struct ieee80211_tx_info *next_info;
 450
 451                 next_info = IEEE80211_SKB_CB(next_skb);
 452                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 453                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 454                                 next_skb->len + additionlen;
 455                         tcb_desc->empkt_num++;
 456                 } else {
 457                         break;
 458                 }
 459
 460                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 461                                       next_skb))
 462                         break;
 463
 464                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 465                         break;
 466         }
 467         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 468
 469         return true;
 470 }
 471
 472 /* just for early mode now */
 473 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 474 {
 475         struct rtl_priv *rtlpriv = rtl_priv(hw);
 476         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 477         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 478         struct sk_buff *skb = NULL;
 479         struct ieee80211_tx_info *info = NULL;
 480         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 481         int tid;
 482
 483         if (!rtlpriv->rtlhal.earlymode_enable)
 484                 return;
 485
 486         if (rtlpriv->dm.supp_phymode_switch &&
 487             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 488             (rtlpriv->buddy_priv &&
 489             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 490                 return;
 491         /* we just use em for BE/BK/VI/VO */
 492         for (tid = 7; tid >= 0; tid--) {
 493                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 494                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 495
 496                 while (!mac->act_scanning &&
 497                        rtlpriv->psc.rfpwr_state == ERFON) {
 498                         struct rtl_tcb_desc tcb_desc;
 499
 500                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 501
 502                         spin_lock(&rtlpriv->locks.waitq_lock);
 503                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 504                             (ring->entries - skb_queue_len(&ring->queue) >
 505                              rtlhal->max_earlymode_num)) {
 506                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 507                         } else {
 508                                 spin_unlock(&rtlpriv->locks.waitq_lock);
 509                                 break;
 510                         }
 511                         spin_unlock(&rtlpriv->locks.waitq_lock);
 512
 513                         /* Some macaddr can't do early mode. like
 514                          * multicast/broadcast/no_qos data
 515                          */
 516                         info = IEEE80211_SKB_CB(skb);
 517                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 518                                 _rtl_update_earlymode_info(hw, skb,
 519                                                            &tcb_desc, tid);
 520
 521                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 522                 }
 523         }
 524 }
 525
 526 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 527 {
 528         struct rtl_priv *rtlpriv = rtl_priv(hw);
 529         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 530
 531         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 532
 533         while (skb_queue_len(&ring->queue)) {
 534                 struct sk_buff *skb;
 535                 struct ieee80211_tx_info *info;
 536                 __le16 fc;
 537                 u8 tid;
 538                 u8 *entry;
 539
 540                 if (rtlpriv->use_new_trx_flow)
 541                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 542                 else
 543                         entry = (u8 *)(&ring->desc[ring->idx]);
 544
 545                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 546                         return;
 547                 ring->idx = (ring->idx + 1) % ring->entries;
 548
 549                 skb = __skb_dequeue(&ring->queue);
 550                 pci_unmap_single(rtlpci->pdev,
 551                                  rtlpriv->cfg->ops->
 552                                              get_desc(hw, (u8 *)entry, true,
 553                                                       HW_DESC_TXBUFF_ADDR),
 554                                  skb->len, PCI_DMA_TODEVICE);
 555
 556                 /* remove early mode header */
 557                 if (rtlpriv->rtlhal.earlymode_enable)
 558                         skb_pull(skb, EM_HDR_LEN);
 559
 560                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 561                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 562                          ring->idx,
 563                          skb_queue_len(&ring->queue),
 564                          *(u16 *)(skb->data + 22));
 565
 566                 if (prio == TXCMD_QUEUE) {
 567                         dev_kfree_skb(skb);
 568                         goto tx_status_ok;
 569                 }
 570
 571                 /* for sw LPS, just after NULL skb send out, we can
 572                  * sure AP knows we are sleeping, we should not let
 573                  * rf sleep
 574                  */
 575                 fc = rtl_get_fc(skb);
 576                 if (ieee80211_is_nullfunc(fc)) {
 577                         if (ieee80211_has_pm(fc)) {
 578                                 rtlpriv->mac80211.offchan_delay = true;
 579                                 rtlpriv->psc.state_inap = true;
 580                         } else {
 581                                 rtlpriv->psc.state_inap = false;
 582                         }
 583                 }
 584                 if (ieee80211_is_action(fc)) {
 585                         struct ieee80211_mgmt *action_frame =
 586                                 (struct ieee80211_mgmt *)skb->data;
 587                         if (action_frame->u.action.u.ht_smps.action ==
 588                             WLAN_HT_ACTION_SMPS) {
 589                                 dev_kfree_skb(skb);
 590                                 goto tx_status_ok;
 591                         }
 592                 }
 593
 594                 /* update tid tx pkt num */
 595                 tid = rtl_get_tid(skb);
 596                 if (tid <= 7)
 597                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 598
 599                 info = IEEE80211_SKB_CB(skb);
 600
 601                 if (likely(!ieee80211_is_nullfunc(fc))) {
 602                         ieee80211_tx_info_clear_status(info);
 603                         info->flags |= IEEE80211_TX_STAT_ACK;
 604                         /*info->status.rates[0].count = 1; */
 605                         ieee80211_tx_status_irqsafe(hw, skb);
 606                 } else {
 607                         rtl_tx_ackqueue(hw, skb);
 608                 }
 609
 610                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 611                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 612                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 613                                  prio, ring->idx,
 614                                  skb_queue_len(&ring->queue));
 615
 616                         ieee80211_wake_queue(hw, skb_get_queue_mapping(skb));
 617                 }
 618 tx_status_ok:
 619                 skb = NULL;
 620         }
 621
 622         if (((rtlpriv->link_info.num_rx_inperiod +
 623               rtlpriv->link_info.num_tx_inperiod) > 8) ||
 624               rtlpriv->link_info.num_rx_inperiod > 2)
 625                 rtl_lps_leave(hw);
 626 }
 627
 628 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 629                                     struct sk_buff *new_skb, u8 *entry,
 630                                     int rxring_idx, int desc_idx)
 631 {
 632         struct rtl_priv *rtlpriv = rtl_priv(hw);
 633         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 634         u32 bufferaddress;
 635         u8 tmp_one = 1;
 636         struct sk_buff *skb;
 637
 638         if (likely(new_skb)) {
 639                 skb = new_skb;
 640                 goto remap;
 641         }
 642         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 643         if (!skb)
 644                 return 0;
 645
 646 remap:
 647         /* just set skb->cb to mapping addr for pci_unmap_single use */
 648         *((dma_addr_t *)skb->cb) =
 649                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 650                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 651         bufferaddress = *((dma_addr_t *)skb->cb);
 652         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 653                 return 0;
 654         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 655         if (rtlpriv->use_new_trx_flow) {
 656                 /* skb->cb may be 64 bit address */
 657                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 658                                             HW_DESC_RX_PREPARE,
 659                                             (u8 *)(dma_addr_t *)skb->cb);
 660         } else {
 661                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 662                                             HW_DESC_RXBUFF_ADDR,
 663                                             (u8 *)&bufferaddress);
 664                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 665                                             HW_DESC_RXPKT_LEN,
 666                                             (u8 *)&rtlpci->rxbuffersize);
 667                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 668                                             HW_DESC_RXOWN,
 669                                             (u8 *)&tmp_one);
 670         }
 671         return 1;
 672 }
 673
 674 /* inorder to receive 8K AMSDU we have set skb to
 675  * 9100bytes in init rx ring, but if this packet is
 676  * not a AMSDU, this large packet will be sent to
 677  * TCP/IP directly, this cause big packet ping fail
 678  * like: "ping -s 65507", so here we will realloc skb
 679  * based on the true size of packet, Mac80211
 680  * Probably will do it better, but does not yet.
 681  *
 682  * Some platform will fail when alloc skb sometimes.
 683  * in this condition, we will send the old skb to
 684  * mac80211 directly, this will not cause any other
 685  * issues, but only this packet will be lost by TCP/IP
 686  */
 687 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 688                                     struct sk_buff *skb,
 689                                     struct ieee80211_rx_status rx_status)
 690 {
 691         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 692                 dev_kfree_skb_any(skb);
 693         } else {
 694                 struct sk_buff *uskb = NULL;
 695
 696                 uskb = dev_alloc_skb(skb->len + 128);
 697                 if (likely(uskb)) {
 698                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 699                                sizeof(rx_status));
 700                         skb_put_data(uskb, skb->data, skb->len);
 701                         dev_kfree_skb_any(skb);
 702                         ieee80211_rx_irqsafe(hw, uskb);
 703                 } else {
 704                         ieee80211_rx_irqsafe(hw, skb);
 705                 }
 706         }
 707 }
 708
 709 /*hsisr interrupt handler*/
 710 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 711 {
 712         struct rtl_priv *rtlpriv = rtl_priv(hw);
 713         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 714
 715         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 716                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 717                        rtlpci->sys_irq_mask);
 718 }
 719
 720 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 721 {
 722         struct rtl_priv *rtlpriv = rtl_priv(hw);
 723         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 724         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 725         struct ieee80211_rx_status rx_status = { 0 };
 726         unsigned int count = rtlpci->rxringcount;
 727         u8 own;
 728         u8 tmp_one;
 729         bool unicast = false;
 730         u8 hw_queue = 0;
 731         unsigned int rx_remained_cnt = 0;
 732         struct rtl_stats stats = {
 733                 .signal = 0,
 734                 .rate = 0,
 735         };
 736
 737         /*RX NORMAL PKT */
 738         while (count--) {
 739                 struct ieee80211_hdr *hdr;
 740                 __le16 fc;
 741                 u16 len;
 742                 /*rx buffer descriptor */
 743                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 744                 /*if use new trx flow, it means wifi info */
 745                 struct rtl_rx_desc *pdesc = NULL;
 746                 /*rx pkt */
 747                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 748                                       rtlpci->rx_ring[rxring_idx].idx];
 749                 struct sk_buff *new_skb;
 750
 751                 if (rtlpriv->use_new_trx_flow) {
 752                         if (rx_remained_cnt == 0)
 753                                 rx_remained_cnt =
 754                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 755                                                                       hw_queue);
 756                         if (rx_remained_cnt == 0)
 757                                 return;
 758                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 759                                 rtlpci->rx_ring[rxring_idx].idx];
 760                         pdesc = (struct rtl_rx_desc *)skb->data;
 761                 } else {        /* rx descriptor */
 762                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 763                                 rtlpci->rx_ring[rxring_idx].idx];
 764
 765                         own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
 766                                                               false,
 767                                                               HW_DESC_OWN);
 768                         if (own) /* wait data to be filled by hardware */
 769                                 return;
 770                 }
 771
 772                 /* Reaching this point means: data is filled already
 773                  * AAAAAAttention !!!
 774                  * We can NOT access 'skb' before 'pci_unmap_single'
 775                  */
 776                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 777                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 778
 779                 /* get a new skb - if fail, old one will be reused */
 780                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 781                 if (unlikely(!new_skb))
 782                         goto no_new;
 783                 memset(&rx_status, 0, sizeof(rx_status));
 784                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 785                                                  &rx_status, (u8 *)pdesc, skb);
 786
 787                 if (rtlpriv->use_new_trx_flow)
 788                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 789                                                            (u8 *)buffer_desc,
 790                                                            hw_queue);
 791
 792                 len = rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc, false,
 793                                                   HW_DESC_RXPKT_LEN);
 794
 795                 if (skb->end - skb->tail > len) {
 796                         skb_put(skb, len);
 797                         if (rtlpriv->use_new_trx_flow)
 798                                 skb_reserve(skb, stats.rx_drvinfo_size +
 799                                             stats.rx_bufshift + 24);
 800                         else
 801                                 skb_reserve(skb, stats.rx_drvinfo_size +
 802                                             stats.rx_bufshift);
 803                 } else {
 804                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 805                                  "skb->end - skb->tail = %d, len is %d\n",
 806                                  skb->end - skb->tail, len);
 807                         dev_kfree_skb_any(skb);
 808                         goto new_trx_end;
 809                 }
 810                 /* handle command packet here */
 811                 if (stats.packet_report_type == C2H_PACKET) {
 812                         rtl_c2hcmd_enqueue(hw, skb);
 813                         goto new_trx_end;
 814                 }
 815
 816                 /* NOTICE This can not be use for mac80211,
 817                  * this is done in mac80211 code,
 818                  * if done here sec DHCP will fail
 819                  * skb_trim(skb, skb->len - 4);
 820                  */
 821
 822                 hdr = rtl_get_hdr(skb);
 823                 fc = rtl_get_fc(skb);
 824
 825                 if (!stats.crc && !stats.hwerror) {
 826                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 827                                sizeof(rx_status));
 828
 829                         if (is_broadcast_ether_addr(hdr->addr1)) {
 830                                 ;/*TODO*/
 831                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 832                                 ;/*TODO*/
 833                         } else {
 834                                 unicast = true;
 835                                 rtlpriv->stats.rxbytesunicast += skb->len;
 836                         }
 837                         rtl_is_special_data(hw, skb, false, true);
 838
 839                         if (ieee80211_is_data(fc)) {
 840                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 841                                 if (unicast)
 842                                         rtlpriv->link_info.num_rx_inperiod++;
 843                         }
 844
 845                         rtl_collect_scan_list(hw, skb);
 846
 847                         /* static bcn for roaming */
 848                         rtl_beacon_statistic(hw, skb);
 849                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 850                         /* for sw lps */
 851                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 852                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 853                         if (rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP &&
 854                             rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G &&
 855                             (ieee80211_is_beacon(fc) ||
 856                              ieee80211_is_probe_resp(fc))) {
 857                                 dev_kfree_skb_any(skb);
 858                         } else {
 859                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 860                         }
 861                 } else {
 862                         dev_kfree_skb_any(skb);
 863                 }
 864 new_trx_end:
 865                 if (rtlpriv->use_new_trx_flow) {
 866                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 867                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 868                                         RTL_PCI_MAX_RX_COUNT;
 869
 870                         rx_remained_cnt--;
 871                         rtl_write_word(rtlpriv, 0x3B4,
 872                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 873                 }
 874                 if (((rtlpriv->link_info.num_rx_inperiod +
 875                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 876                       rtlpriv->link_info.num_rx_inperiod > 2)
 877                         rtl_lps_leave(hw);
 878                 skb = new_skb;
 879 no_new:
 880                 if (rtlpriv->use_new_trx_flow) {
 881                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 882                                                  rxring_idx,
 883                                                  rtlpci->rx_ring[rxring_idx].idx);
 884                 } else {
 885                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 886                                                  rxring_idx,
 887                                                  rtlpci->rx_ring[rxring_idx].idx);
 888                         if (rtlpci->rx_ring[rxring_idx].idx ==
 889                             rtlpci->rxringcount - 1)
 890                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 891                                                             false,
 892                                                             HW_DESC_RXERO,
 893                                                             (u8 *)&tmp_one);
 894                 }
 895                 rtlpci->rx_ring[rxring_idx].idx =
 896                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 897                                 rtlpci->rxringcount;
 898         }
 899 }
 900
 901 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 902 {
 903         struct ieee80211_hw *hw = dev_id;
 904         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 905         struct rtl_priv *rtlpriv = rtl_priv(hw);
 906         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 907         unsigned long flags;
 908         struct rtl_int intvec = {0};
 909
 910         irqreturn_t ret = IRQ_HANDLED;
 911
 912         if (rtlpci->irq_enabled == 0)
 913                 return ret;
 914
 915         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 916         rtlpriv->cfg->ops->disable_interrupt(hw);
 917
 918         /*read ISR: 4/8bytes */
 919         rtlpriv->cfg->ops->interrupt_recognized(hw, &intvec);
 920
 921         /*Shared IRQ or HW disappeared */
 922         if (!intvec.inta || intvec.inta == 0xffff)
 923                 goto done;
 924
 925         /*<1> beacon related */
 926         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK])
 927                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 928                          "beacon ok interrupt!\n");
 929
 930         if (unlikely(intvec.inta & rtlpriv->cfg->maps[RTL_IMR_TBDER]))
 931                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 932                          "beacon err interrupt!\n");
 933
 934         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BDOK])
 935                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 936
 937         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 938                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 939                          "prepare beacon for interrupt!\n");
 940                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 941         }
 942
 943         /*<2> Tx related */
 944         if (unlikely(intvec.intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 945                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 946
 947         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 948                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 949                          "Manage ok interrupt!\n");
 950                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 951         }
 952
 953         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 954                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 955                          "HIGH_QUEUE ok interrupt!\n");
 956                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 957         }
 958
 959         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 960                 rtlpriv->link_info.num_tx_inperiod++;
 961
 962                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 963                          "BK Tx OK interrupt!\n");
 964                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 965         }
 966
 967         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 968                 rtlpriv->link_info.num_tx_inperiod++;
 969
 970                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 971                          "BE TX OK interrupt!\n");
 972                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 973         }
 974
 975         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 976                 rtlpriv->link_info.num_tx_inperiod++;
 977
 978                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 979                          "VI TX OK interrupt!\n");
 980                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 981         }
 982
 983         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 984                 rtlpriv->link_info.num_tx_inperiod++;
 985
 986                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 987                          "Vo TX OK interrupt!\n");
 988                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 989         }
 990
 991         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
 992                 if (intvec.intd & rtlpriv->cfg->maps[RTL_IMR_H2CDOK]) {
 993                         rtlpriv->link_info.num_tx_inperiod++;
 994
 995                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 996                                  "H2C TX OK interrupt!\n");
 997                         _rtl_pci_tx_isr(hw, H2C_QUEUE);
 998                 }
 999         }
1000
1001         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1002                 if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1003                         rtlpriv->link_info.num_tx_inperiod++;
1004
1005                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1006                                  "CMD TX OK interrupt!\n");
1007                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1008                 }
1009         }
1010
1011         /*<3> Rx related */
1012         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1013                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1014                 _rtl_pci_rx_interrupt(hw);
1015         }
1016
1017         if (unlikely(intvec.inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1018                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1019                          "rx descriptor unavailable!\n");
1020                 _rtl_pci_rx_interrupt(hw);
1021         }
1022
1023         if (unlikely(intvec.intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1024                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1025                 _rtl_pci_rx_interrupt(hw);
1026         }
1027
1028         /*<4> fw related*/
1029         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1030                 if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1031                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1032                                  "firmware interrupt!\n");
1033                         queue_delayed_work(rtlpriv->works.rtl_wq,
1034                                            &rtlpriv->works.fwevt_wq, 0);
1035                 }
1036         }
1037
1038         /*<5> hsisr related*/
1039         /* Only 8188EE & 8723BE Supported.
1040          * If Other ICs Come in, System will corrupt,
1041          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1042          * are not initialized
1043          */
1044         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1045             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1046                 if (unlikely(intvec.inta &
1047                     rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1048                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1049                                  "hsisr interrupt!\n");
1050                         _rtl_pci_hs_interrupt(hw);
1051                 }
1052         }
1053
1054         if (rtlpriv->rtlhal.earlymode_enable)
1055                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1056
1057 done:
1058         rtlpriv->cfg->ops->enable_interrupt(hw);
1059         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1060         return ret;
1061 }
1062
1063 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1064 {
1065         _rtl_pci_tx_chk_waitq(hw);
1066 }
1067
1068 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1069 {
1070         struct rtl_priv *rtlpriv = rtl_priv(hw);
1071         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1072         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1073         struct rtl8192_tx_ring *ring = NULL;
1074         struct ieee80211_hdr *hdr = NULL;
1075         struct ieee80211_tx_info *info = NULL;
1076         struct sk_buff *pskb = NULL;
1077         struct rtl_tx_desc *pdesc = NULL;
1078         struct rtl_tcb_desc tcb_desc;
1079         /*This is for new trx flow*/
1080         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1081         u8 temp_one = 1;
1082         u8 *entry;
1083
1084         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1085         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1086         pskb = __skb_dequeue(&ring->queue);
1087         if (rtlpriv->use_new_trx_flow)
1088                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1089         else
1090                 entry = (u8 *)(&ring->desc[ring->idx]);
1091         if (pskb) {
1092                 pci_unmap_single(rtlpci->pdev,
1093                                  rtlpriv->cfg->ops->get_desc(
1094                                  hw, (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1095                                  pskb->len, PCI_DMA_TODEVICE);
1096                 kfree_skb(pskb);
1097         }
1098
1099         /*NB: the beacon data buffer must be 32-bit aligned. */
1100         pskb = ieee80211_beacon_get(hw, mac->vif);
1101         if (!pskb)
1102                 return;
1103         hdr = rtl_get_hdr(pskb);
1104         info = IEEE80211_SKB_CB(pskb);
1105         pdesc = &ring->desc[0];
1106         if (rtlpriv->use_new_trx_flow)
1107                 pbuffer_desc = &ring->buffer_desc[0];
1108
1109         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1110                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1111                                         BEACON_QUEUE, &tcb_desc);
1112
1113         __skb_queue_tail(&ring->queue, pskb);
1114
1115         if (rtlpriv->use_new_trx_flow) {
1116                 temp_one = 4;
1117                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1118                                             HW_DESC_OWN, (u8 *)&temp_one);
1119         } else {
1120                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1121                                             &temp_one);
1122         }
1123 }
1124
1125 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1126 {
1127         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1128         struct rtl_priv *rtlpriv = rtl_priv(hw);
1129         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1130         u8 i;
1131         u16 desc_num;
1132
1133         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1134                 desc_num = TX_DESC_NUM_92E;
1135         else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE)
1136                 desc_num = TX_DESC_NUM_8822B;
1137         else
1138                 desc_num = RT_TXDESC_NUM;
1139
1140         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1141                 rtlpci->txringcount[i] = desc_num;
1142
1143         /*we just alloc 2 desc for beacon queue,
1144          *because we just need first desc in hw beacon.
1145          */
1146         rtlpci->txringcount[BEACON_QUEUE] = 2;
1147
1148         /*BE queue need more descriptor for performance
1149          *consideration or, No more tx desc will happen,
1150          *and may cause mac80211 mem leakage.
1151          */
1152         if (!rtl_priv(hw)->use_new_trx_flow)
1153                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1154
1155         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1156         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1157 }
1158
1159 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1160                                  struct pci_dev *pdev)
1161 {
1162         struct rtl_priv *rtlpriv = rtl_priv(hw);
1163         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1164         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1165         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1166
1167         rtlpci->up_first_time = true;
1168         rtlpci->being_init_adapter = false;
1169
1170         rtlhal->hw = hw;
1171         rtlpci->pdev = pdev;
1172
1173         /*Tx/Rx related var */
1174         _rtl_pci_init_trx_var(hw);
1175
1176         /*IBSS*/
1177         mac->beacon_interval = 100;
1178
1179         /*AMPDU*/
1180         mac->min_space_cfg = 0;
1181         mac->max_mss_density = 0;
1182         /*set sane AMPDU defaults */
1183         mac->current_ampdu_density = 7;
1184         mac->current_ampdu_factor = 3;
1185
1186         /*Retry Limit*/
1187         mac->retry_short = 7;
1188         mac->retry_long = 7;
1189
1190         /*QOS*/
1191         rtlpci->acm_method = EACMWAY2_SW;
1192
1193         /*task */
1194         tasklet_init(&rtlpriv->works.irq_tasklet,
1195                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1196                      (unsigned long)hw);
1197         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1198                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1199                      (unsigned long)hw);
1200         INIT_WORK(&rtlpriv->works.lps_change_work,
1201                   rtl_lps_change_work_callback);
1202 }
1203
1204 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1205                                  unsigned int prio, unsigned int entries)
1206 {
1207         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1208         struct rtl_priv *rtlpriv = rtl_priv(hw);
1209         struct rtl_tx_buffer_desc *buffer_desc;
1210         struct rtl_tx_desc *desc;
1211         dma_addr_t buffer_desc_dma, desc_dma;
1212         u32 nextdescaddress;
1213         int i;
1214
1215         /* alloc tx buffer desc for new trx flow*/
1216         if (rtlpriv->use_new_trx_flow) {
1217                 buffer_desc =
1218                    pci_zalloc_consistent(rtlpci->pdev,
1219                                          sizeof(*buffer_desc) * entries,
1220                                          &buffer_desc_dma);
1221
1222                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1223                         pr_err("Cannot allocate TX ring (prio = %d)\n",
1224                                prio);
1225                         return -ENOMEM;
1226                 }
1227
1228                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1229                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1230
1231                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1232                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1233         }
1234
1235         /* alloc dma for this ring */
1236         desc = pci_zalloc_consistent(rtlpci->pdev,
1237                                      sizeof(*desc) * entries, &desc_dma);
1238
1239         if (!desc || (unsigned long)desc & 0xFF) {
1240                 pr_err("Cannot allocate TX ring (prio = %d)\n", prio);
1241                 return -ENOMEM;
1242         }
1243
1244         rtlpci->tx_ring[prio].desc = desc;
1245         rtlpci->tx_ring[prio].dma = desc_dma;
1246
1247         rtlpci->tx_ring[prio].idx = 0;
1248         rtlpci->tx_ring[prio].entries = entries;
1249         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1250
1251         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1252                  prio, desc);
1253
1254         /* init every desc in this ring */
1255         if (!rtlpriv->use_new_trx_flow) {
1256                 for (i = 0; i < entries; i++) {
1257                         nextdescaddress = (u32)desc_dma +
1258                                           ((i + 1) % entries) *
1259                                           sizeof(*desc);
1260
1261                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1262                                                     true,
1263                                                     HW_DESC_TX_NEXTDESC_ADDR,
1264                                                     (u8 *)&nextdescaddress);
1265                 }
1266         }
1267         return 0;
1268 }
1269
1270 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1271 {
1272         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1273         struct rtl_priv *rtlpriv = rtl_priv(hw);
1274         int i;
1275
1276         if (rtlpriv->use_new_trx_flow) {
1277                 struct rtl_rx_buffer_desc *entry = NULL;
1278                 /* alloc dma for this ring */
1279                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1280                     pci_zalloc_consistent(rtlpci->pdev,
1281                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1282                                                  buffer_desc) *
1283                                                  rtlpci->rxringcount,
1284                                           &rtlpci->rx_ring[rxring_idx].dma);
1285                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1286                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1287                         pr_err("Cannot allocate RX ring\n");
1288                         return -ENOMEM;
1289                 }
1290
1291                 /* init every desc in this ring */
1292                 rtlpci->rx_ring[rxring_idx].idx = 0;
1293                 for (i = 0; i < rtlpci->rxringcount; i++) {
1294                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1295                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1296                                                       rxring_idx, i))
1297                                 return -ENOMEM;
1298                 }
1299         } else {
1300                 struct rtl_rx_desc *entry = NULL;
1301                 u8 tmp_one = 1;
1302                 /* alloc dma for this ring */
1303                 rtlpci->rx_ring[rxring_idx].desc =
1304                     pci_zalloc_consistent(rtlpci->pdev,
1305                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1306                                           desc) * rtlpci->rxringcount,
1307                                           &rtlpci->rx_ring[rxring_idx].dma);
1308                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1309                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1310                         pr_err("Cannot allocate RX ring\n");
1311                         return -ENOMEM;
1312                 }
1313
1314                 /* init every desc in this ring */
1315                 rtlpci->rx_ring[rxring_idx].idx = 0;
1316
1317                 for (i = 0; i < rtlpci->rxringcount; i++) {
1318                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1319                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1320                                                       rxring_idx, i))
1321                                 return -ENOMEM;
1322                 }
1323
1324                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1325                                             HW_DESC_RXERO, &tmp_one);
1326         }
1327         return 0;
1328 }
1329
1330 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1331                                   unsigned int prio)
1332 {
1333         struct rtl_priv *rtlpriv = rtl_priv(hw);
1334         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1335         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1336
1337         /* free every desc in this ring */
1338         while (skb_queue_len(&ring->queue)) {
1339                 u8 *entry;
1340                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1341
1342                 if (rtlpriv->use_new_trx_flow)
1343                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1344                 else
1345                         entry = (u8 *)(&ring->desc[ring->idx]);
1346
1347                 pci_unmap_single(rtlpci->pdev,
1348                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1349                                                    true,
1350                                                    HW_DESC_TXBUFF_ADDR),
1351                                  skb->len, PCI_DMA_TODEVICE);
1352                 kfree_skb(skb);
1353                 ring->idx = (ring->idx + 1) % ring->entries;
1354         }
1355
1356         /* free dma of this ring */
1357         pci_free_consistent(rtlpci->pdev,
1358                             sizeof(*ring->desc) * ring->entries,
1359                             ring->desc, ring->dma);
1360         ring->desc = NULL;
1361         if (rtlpriv->use_new_trx_flow) {
1362                 pci_free_consistent(rtlpci->pdev,
1363                                     sizeof(*ring->buffer_desc) * ring->entries,
1364                                     ring->buffer_desc, ring->buffer_desc_dma);
1365                 ring->buffer_desc = NULL;
1366         }
1367 }
1368
1369 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1370 {
1371         struct rtl_priv *rtlpriv = rtl_priv(hw);
1372         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1373         int i;
1374
1375         /* free every desc in this ring */
1376         for (i = 0; i < rtlpci->rxringcount; i++) {
1377                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1378
1379                 if (!skb)
1380                         continue;
1381                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1382                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1383                 kfree_skb(skb);
1384         }
1385
1386         /* free dma of this ring */
1387         if (rtlpriv->use_new_trx_flow) {
1388                 pci_free_consistent(rtlpci->pdev,
1389                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1390                                     buffer_desc) * rtlpci->rxringcount,
1391                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1392                                     rtlpci->rx_ring[rxring_idx].dma);
1393                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1394         } else {
1395                 pci_free_consistent(rtlpci->pdev,
1396                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1397                                     rtlpci->rxringcount,
1398                                     rtlpci->rx_ring[rxring_idx].desc,
1399                                     rtlpci->rx_ring[rxring_idx].dma);
1400                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1401         }
1402 }
1403
1404 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1405 {
1406         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1407         int ret;
1408         int i, rxring_idx;
1409
1410         /* rxring_idx 0:RX_MPDU_QUEUE
1411          * rxring_idx 1:RX_CMD_QUEUE
1412          */
1413         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1414                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1415                 if (ret)
1416                         return ret;
1417         }
1418
1419         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1420                 ret = _rtl_pci_init_tx_ring(hw, i, rtlpci->txringcount[i]);
1421                 if (ret)
1422                         goto err_free_rings;
1423         }
1424
1425         return 0;
1426
1427 err_free_rings:
1428         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1429                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1430
1431         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1432                 if (rtlpci->tx_ring[i].desc ||
1433                     rtlpci->tx_ring[i].buffer_desc)
1434                         _rtl_pci_free_tx_ring(hw, i);
1435
1436         return 1;
1437 }
1438
1439 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1440 {
1441         u32 i, rxring_idx;
1442
1443         /*free rx rings */
1444         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1445                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1446
1447         /*free tx rings */
1448         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1449                 _rtl_pci_free_tx_ring(hw, i);
1450
1451         return 0;
1452 }
1453
1454 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1455 {
1456         struct rtl_priv *rtlpriv = rtl_priv(hw);
1457         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1458         int i, rxring_idx;
1459         unsigned long flags;
1460         u8 tmp_one = 1;
1461         u32 bufferaddress;
1462         /* rxring_idx 0:RX_MPDU_QUEUE */
1463         /* rxring_idx 1:RX_CMD_QUEUE */
1464         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1465                 /* force the rx_ring[RX_MPDU_QUEUE/
1466                  * RX_CMD_QUEUE].idx to the first one
1467                  *new trx flow, do nothing
1468                  */
1469                 if (!rtlpriv->use_new_trx_flow &&
1470                     rtlpci->rx_ring[rxring_idx].desc) {
1471                         struct rtl_rx_desc *entry = NULL;
1472
1473                         rtlpci->rx_ring[rxring_idx].idx = 0;
1474                         for (i = 0; i < rtlpci->rxringcount; i++) {
1475                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1476                                 bufferaddress =
1477                                   rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1478                                   false, HW_DESC_RXBUFF_ADDR);
1479                                 memset((u8 *)entry, 0,
1480                                        sizeof(*rtlpci->rx_ring
1481                                        [rxring_idx].desc));/*clear one entry*/
1482                                 if (rtlpriv->use_new_trx_flow) {
1483                                         rtlpriv->cfg->ops->set_desc(hw,
1484                                             (u8 *)entry, false,
1485                                             HW_DESC_RX_PREPARE,
1486                                             (u8 *)&bufferaddress);
1487                                 } else {
1488                                         rtlpriv->cfg->ops->set_desc(hw,
1489                                             (u8 *)entry, false,
1490                                             HW_DESC_RXBUFF_ADDR,
1491                                             (u8 *)&bufferaddress);
1492                                         rtlpriv->cfg->ops->set_desc(hw,
1493                                             (u8 *)entry, false,
1494                                             HW_DESC_RXPKT_LEN,
1495                                             (u8 *)&rtlpci->rxbuffersize);
1496                                         rtlpriv->cfg->ops->set_desc(hw,
1497                                             (u8 *)entry, false,
1498                                             HW_DESC_RXOWN,
1499                                             (u8 *)&tmp_one);
1500                                 }
1501                         }
1502                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1503                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1504                 }
1505                 rtlpci->rx_ring[rxring_idx].idx = 0;
1506         }
1507
1508         /*after reset, release previous pending packet,
1509          *and force the  tx idx to the first one
1510          */
1511         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1512         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1513                 if (rtlpci->tx_ring[i].desc ||
1514                     rtlpci->tx_ring[i].buffer_desc) {
1515                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1516
1517                         while (skb_queue_len(&ring->queue)) {
1518                                 u8 *entry;
1519                                 struct sk_buff *skb =
1520                                         __skb_dequeue(&ring->queue);
1521                                 if (rtlpriv->use_new_trx_flow)
1522                                         entry = (u8 *)(&ring->buffer_desc
1523                                                                 [ring->idx]);
1524                                 else
1525                                         entry = (u8 *)(&ring->desc[ring->idx]);
1526
1527                                 pci_unmap_single(rtlpci->pdev,
1528                                                  rtlpriv->cfg->ops->
1529                                                          get_desc(hw, (u8 *)
1530                                                          entry,
1531                                                          true,
1532                                                          HW_DESC_TXBUFF_ADDR),
1533                                                  skb->len, PCI_DMA_TODEVICE);
1534                                 dev_kfree_skb_irq(skb);
1535                                 ring->idx = (ring->idx + 1) % ring->entries;
1536                         }
1537
1538                         if (rtlpriv->use_new_trx_flow) {
1539                                 rtlpci->tx_ring[i].cur_tx_rp = 0;
1540                                 rtlpci->tx_ring[i].cur_tx_wp = 0;
1541                         }
1542
1543                         ring->idx = 0;
1544                         ring->entries = rtlpci->txringcount[i];
1545                 }
1546         }
1547         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1548
1549         return 0;
1550 }
1551
1552 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1553                                         struct ieee80211_sta *sta,
1554                                         struct sk_buff *skb)
1555 {
1556         struct rtl_priv *rtlpriv = rtl_priv(hw);
1557         struct rtl_sta_info *sta_entry = NULL;
1558         u8 tid = rtl_get_tid(skb);
1559         __le16 fc = rtl_get_fc(skb);
1560
1561         if (!sta)
1562                 return false;
1563         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1564
1565         if (!rtlpriv->rtlhal.earlymode_enable)
1566                 return false;
1567         if (ieee80211_is_nullfunc(fc))
1568                 return false;
1569         if (ieee80211_is_qos_nullfunc(fc))
1570                 return false;
1571         if (ieee80211_is_pspoll(fc))
1572                 return false;
1573         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1574                 return false;
1575         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1576                 return false;
1577         if (tid > 7)
1578                 return false;
1579
1580         /* maybe every tid should be checked */
1581         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1582                 return false;
1583
1584         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1585         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1586         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1587
1588         return true;
1589 }
1590
1591 static int rtl_pci_tx(struct ieee80211_hw *hw,
1592                       struct ieee80211_sta *sta,
1593                       struct sk_buff *skb,
1594                       struct rtl_tcb_desc *ptcb_desc)
1595 {
1596         struct rtl_priv *rtlpriv = rtl_priv(hw);
1597         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1598         struct rtl8192_tx_ring *ring;
1599         struct rtl_tx_desc *pdesc;
1600         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1601         u16 idx;
1602         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1603         unsigned long flags;
1604         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1605         __le16 fc = rtl_get_fc(skb);
1606         u8 *pda_addr = hdr->addr1;
1607         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1608         u8 own;
1609         u8 temp_one = 1;
1610
1611         if (ieee80211_is_mgmt(fc))
1612                 rtl_tx_mgmt_proc(hw, skb);
1613
1614         if (rtlpriv->psc.sw_ps_enabled) {
1615                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1616                     !ieee80211_has_pm(fc))
1617                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1618         }
1619
1620         rtl_action_proc(hw, skb, true);
1621
1622         if (is_multicast_ether_addr(pda_addr))
1623                 rtlpriv->stats.txbytesmulticast += skb->len;
1624         else if (is_broadcast_ether_addr(pda_addr))
1625                 rtlpriv->stats.txbytesbroadcast += skb->len;
1626         else
1627                 rtlpriv->stats.txbytesunicast += skb->len;
1628
1629         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1630         ring = &rtlpci->tx_ring[hw_queue];
1631         if (hw_queue != BEACON_QUEUE) {
1632                 if (rtlpriv->use_new_trx_flow)
1633                         idx = ring->cur_tx_wp;
1634                 else
1635                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1636                               ring->entries;
1637         } else {
1638                 idx = 0;
1639         }
1640
1641         pdesc = &ring->desc[idx];
1642         if (rtlpriv->use_new_trx_flow) {
1643                 ptx_bd_desc = &ring->buffer_desc[idx];
1644         } else {
1645                 own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
1646                                 true, HW_DESC_OWN);
1647
1648                 if (own == 1 && hw_queue != BEACON_QUEUE) {
1649                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1650                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1651                                  hw_queue, ring->idx, idx,
1652                                  skb_queue_len(&ring->queue));
1653
1654                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1655                                                flags);
1656                         return skb->len;
1657                 }
1658         }
1659
1660         if (rtlpriv->cfg->ops->get_available_desc &&
1661             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1662                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1663                          "get_available_desc fail\n");
1664                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1665                 return skb->len;
1666         }
1667
1668         if (ieee80211_is_data(fc))
1669                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1670
1671         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1672                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1673
1674         __skb_queue_tail(&ring->queue, skb);
1675
1676         if (rtlpriv->use_new_trx_flow) {
1677                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1678                                             HW_DESC_OWN, &hw_queue);
1679         } else {
1680                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1681                                             HW_DESC_OWN, &temp_one);
1682         }
1683
1684         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1685             hw_queue != BEACON_QUEUE) {
1686                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1687                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1688                          hw_queue, ring->idx, idx,
1689                          skb_queue_len(&ring->queue));
1690
1691                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1692         }
1693
1694         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1695
1696         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1697
1698         return 0;
1699 }
1700
1701 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1702 {
1703         struct rtl_priv *rtlpriv = rtl_priv(hw);
1704         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1705         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1706         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1707         u16 i = 0;
1708         int queue_id;
1709         struct rtl8192_tx_ring *ring;
1710
1711         if (mac->skip_scan)
1712                 return;
1713
1714         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1715                 u32 queue_len;
1716
1717                 if (((queues >> queue_id) & 0x1) == 0) {
1718                         queue_id--;
1719                         continue;
1720                 }
1721                 ring = &pcipriv->dev.tx_ring[queue_id];
1722                 queue_len = skb_queue_len(&ring->queue);
1723                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1724                     queue_id == TXCMD_QUEUE) {
1725                         queue_id--;
1726                         continue;
1727                 } else {
1728                         msleep(20);
1729                         i++;
1730                 }
1731
1732                 /* we just wait 1s for all queues */
1733                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1734                     is_hal_stop(rtlhal) || i >= 200)
1735                         return;
1736         }
1737 }
1738
1739 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1740 {
1741         struct rtl_priv *rtlpriv = rtl_priv(hw);
1742         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1743
1744         _rtl_pci_deinit_trx_ring(hw);
1745
1746         synchronize_irq(rtlpci->pdev->irq);
1747         tasklet_kill(&rtlpriv->works.irq_tasklet);
1748         cancel_work_sync(&rtlpriv->works.lps_change_work);
1749
1750         flush_workqueue(rtlpriv->works.rtl_wq);
1751         destroy_workqueue(rtlpriv->works.rtl_wq);
1752 }
1753
1754 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1755 {
1756         int err;
1757
1758         _rtl_pci_init_struct(hw, pdev);
1759
1760         err = _rtl_pci_init_trx_ring(hw);
1761         if (err) {
1762                 pr_err("tx ring initialization failed\n");
1763                 return err;
1764         }
1765
1766         return 0;
1767 }
1768
1769 static int rtl_pci_start(struct ieee80211_hw *hw)
1770 {
1771         struct rtl_priv *rtlpriv = rtl_priv(hw);
1772         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1773         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1774         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1775         struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
1776         struct rtl_btc_ops *btc_ops = rtlpriv->btcoexist.btc_ops;
1777
1778         int err;
1779
1780         rtl_pci_reset_trx_ring(hw);
1781
1782         rtlpci->driver_is_goingto_unload = false;
1783         if (rtlpriv->cfg->ops->get_btc_status &&
1784             rtlpriv->cfg->ops->get_btc_status()) {
1785                 rtlpriv->btcoexist.btc_info.ap_num = 36;
1786                 btc_ops->btc_init_variables(rtlpriv);
1787                 btc_ops->btc_init_hal_vars(rtlpriv);
1788         } else if (btc_ops) {
1789                 btc_ops->btc_init_variables_wifi_only(rtlpriv);
1790         }
1791
1792         err = rtlpriv->cfg->ops->hw_init(hw);
1793         if (err) {
1794                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1795                          "Failed to config hardware!\n");
1796                 kfree(rtlpriv->btcoexist.btc_context);
1797                 kfree(rtlpriv->btcoexist.wifi_only_context);
1798                 return err;
1799         }
1800         rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT,
1801                         &rtlmac->retry_long);
1802
1803         rtlpriv->cfg->ops->enable_interrupt(hw);
1804         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1805
1806         rtl_init_rx_config(hw);
1807
1808         /*should be after adapter start and interrupt enable. */
1809         set_hal_start(rtlhal);
1810
1811         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1812
1813         rtlpci->up_first_time = false;
1814
1815         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%s OK\n", __func__);
1816         return 0;
1817 }
1818
1819 static void rtl_pci_stop(struct ieee80211_hw *hw)
1820 {
1821         struct rtl_priv *rtlpriv = rtl_priv(hw);
1822         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1823         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1824         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1825         unsigned long flags;
1826         u8 rf_timeout = 0;
1827
1828         if (rtlpriv->cfg->ops->get_btc_status())
1829                 rtlpriv->btcoexist.btc_ops->btc_halt_notify(rtlpriv);
1830
1831         if (rtlpriv->btcoexist.btc_ops)
1832                 rtlpriv->btcoexist.btc_ops->btc_deinit_variables(rtlpriv);
1833
1834         /*should be before disable interrupt&adapter
1835          *and will do it immediately.
1836          */
1837         set_hal_stop(rtlhal);
1838
1839         rtlpci->driver_is_goingto_unload = true;
1840         rtlpriv->cfg->ops->disable_interrupt(hw);
1841         cancel_work_sync(&rtlpriv->works.lps_change_work);
1842
1843         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1844         while (ppsc->rfchange_inprogress) {
1845                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1846                 if (rf_timeout > 100) {
1847                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1848                         break;
1849                 }
1850                 mdelay(1);
1851                 rf_timeout++;
1852                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1853         }
1854         ppsc->rfchange_inprogress = true;
1855         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1856
1857         rtlpriv->cfg->ops->hw_disable(hw);
1858         /* some things are not needed if firmware not available */
1859         if (!rtlpriv->max_fw_size)
1860                 return;
1861         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1862
1863         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1864         ppsc->rfchange_inprogress = false;
1865         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1866
1867         rtl_pci_enable_aspm(hw);
1868 }
1869
1870 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1871                                   struct ieee80211_hw *hw)
1872 {
1873         struct rtl_priv *rtlpriv = rtl_priv(hw);
1874         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1875         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1876         struct pci_dev *bridge_pdev = pdev->bus->self;
1877         u16 venderid;
1878         u16 deviceid;
1879         u8 revisionid;
1880         u16 irqline;
1881         u8 tmp;
1882
1883         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1884         venderid = pdev->vendor;
1885         deviceid = pdev->device;
1886         pci_read_config_byte(pdev, 0x8, &revisionid);
1887         pci_read_config_word(pdev, 0x3C, &irqline);
1888
1889         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1890          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1891          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1892          * the correct driver is r8192e_pci, thus this routine should
1893          * return false.
1894          */
1895         if (deviceid == RTL_PCI_8192SE_DID &&
1896             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1897                 return false;
1898
1899         if (deviceid == RTL_PCI_8192_DID ||
1900             deviceid == RTL_PCI_0044_DID ||
1901             deviceid == RTL_PCI_0047_DID ||
1902             deviceid == RTL_PCI_8192SE_DID ||
1903             deviceid == RTL_PCI_8174_DID ||
1904             deviceid == RTL_PCI_8173_DID ||
1905             deviceid == RTL_PCI_8172_DID ||
1906             deviceid == RTL_PCI_8171_DID) {
1907                 switch (revisionid) {
1908                 case RTL_PCI_REVISION_ID_8192PCIE:
1909                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1910                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1911                                  venderid, deviceid);
1912                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1913                         return false;
1914                 case RTL_PCI_REVISION_ID_8192SE:
1915                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1916                                  "8192SE is found - vid/did=%x/%x\n",
1917                                  venderid, deviceid);
1918                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1919                         break;
1920                 default:
1921                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1922                                  "Err: Unknown device - vid/did=%x/%x\n",
1923                                  venderid, deviceid);
1924                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1925                         break;
1926                 }
1927         } else if (deviceid == RTL_PCI_8723AE_DID) {
1928                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1929                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1930                          "8723AE PCI-E is found - vid/did=%x/%x\n",
1931                          venderid, deviceid);
1932         } else if (deviceid == RTL_PCI_8192CET_DID ||
1933                    deviceid == RTL_PCI_8192CE_DID ||
1934                    deviceid == RTL_PCI_8191CE_DID ||
1935                    deviceid == RTL_PCI_8188CE_DID) {
1936                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1937                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1938                          "8192C PCI-E is found - vid/did=%x/%x\n",
1939                          venderid, deviceid);
1940         } else if (deviceid == RTL_PCI_8192DE_DID ||
1941                    deviceid == RTL_PCI_8192DE_DID2) {
1942                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1943                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1944                          "8192D PCI-E is found - vid/did=%x/%x\n",
1945                          venderid, deviceid);
1946         } else if (deviceid == RTL_PCI_8188EE_DID) {
1947                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1948                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1949                          "Find adapter, Hardware type is 8188EE\n");
1950         } else if (deviceid == RTL_PCI_8723BE_DID) {
1951                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1952                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1953                          "Find adapter, Hardware type is 8723BE\n");
1954         } else if (deviceid == RTL_PCI_8192EE_DID) {
1955                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1956                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1957                          "Find adapter, Hardware type is 8192EE\n");
1958         } else if (deviceid == RTL_PCI_8821AE_DID) {
1959                 rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
1960                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1961                          "Find adapter, Hardware type is 8821AE\n");
1962         } else if (deviceid == RTL_PCI_8812AE_DID) {
1963                 rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
1964                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1965                          "Find adapter, Hardware type is 8812AE\n");
1966         } else if (deviceid == RTL_PCI_8822BE_DID) {
1967                 rtlhal->hw_type = HARDWARE_TYPE_RTL8822BE;
1968                 rtlhal->bandset = BAND_ON_BOTH;
1969                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1970                          "Find adapter, Hardware type is 8822BE\n");
1971         } else {
1972                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1973                          "Err: Unknown device - vid/did=%x/%x\n",
1974                          venderid, deviceid);
1975
1976                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1977         }
1978
1979         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1980                 if (revisionid == 0 || revisionid == 1) {
1981                         if (revisionid == 0) {
1982                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1983                                          "Find 92DE MAC0\n");
1984                                 rtlhal->interfaceindex = 0;
1985                         } else if (revisionid == 1) {
1986                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1987                                          "Find 92DE MAC1\n");
1988                                 rtlhal->interfaceindex = 1;
1989                         }
1990                 } else {
1991                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1992                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
1993                                  venderid, deviceid, revisionid);
1994                         rtlhal->interfaceindex = 0;
1995                 }
1996         }
1997
1998         switch (rtlhal->hw_type) {
1999         case HARDWARE_TYPE_RTL8192EE:
2000         case HARDWARE_TYPE_RTL8822BE:
2001                 /* use new trx flow */
2002                 rtlpriv->use_new_trx_flow = true;
2003                 break;
2004
2005         default:
2006                 rtlpriv->use_new_trx_flow = false;
2007                 break;
2008         }
2009
2010         /*find bus info */
2011         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2012         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2013         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2014
2015         /*find bridge info */
2016         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2017         /* some ARM have no bridge_pdev and will crash here
2018          * so we should check if bridge_pdev is NULL
2019          */
2020         if (bridge_pdev) {
2021                 /*find bridge info if available */
2022                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2023                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2024                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2025                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2026                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2027                                          "Pci Bridge Vendor is found index: %d\n",
2028                                          tmp);
2029                                 break;
2030                         }
2031                 }
2032         }
2033
2034         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2035                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2036                 pcipriv->ndis_adapter.pcibridge_busnum =
2037                     bridge_pdev->bus->number;
2038                 pcipriv->ndis_adapter.pcibridge_devnum =
2039                     PCI_SLOT(bridge_pdev->devfn);
2040                 pcipriv->ndis_adapter.pcibridge_funcnum =
2041                     PCI_FUNC(bridge_pdev->devfn);
2042                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2043                     pci_pcie_cap(bridge_pdev);
2044                 pcipriv->ndis_adapter.num4bytes =
2045                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2046
2047                 rtl_pci_get_linkcontrol_field(hw);
2048
2049                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2050                     PCI_BRIDGE_VENDOR_AMD) {
2051                         pcipriv->ndis_adapter.amd_l1_patch =
2052                             rtl_pci_get_amd_l1_patch(hw);
2053                 }
2054         }
2055
2056         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2057                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2058                  pcipriv->ndis_adapter.busnumber,
2059                  pcipriv->ndis_adapter.devnumber,
2060                  pcipriv->ndis_adapter.funcnumber,
2061                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2062
2063         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2064                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2065                  pcipriv->ndis_adapter.pcibridge_busnum,
2066                  pcipriv->ndis_adapter.pcibridge_devnum,
2067                  pcipriv->ndis_adapter.pcibridge_funcnum,
2068                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2069                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2070                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2071                  pcipriv->ndis_adapter.amd_l1_patch);
2072
2073         rtl_pci_parse_configuration(pdev, hw);
2074         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2075
2076         return true;
2077 }
2078
2079 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2080 {
2081         struct rtl_priv *rtlpriv = rtl_priv(hw);
2082         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2083         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2084         int ret;
2085
2086         ret = pci_enable_msi(rtlpci->pdev);
2087         if (ret < 0)
2088                 return ret;
2089
2090         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2091                           IRQF_SHARED, KBUILD_MODNAME, hw);
2092         if (ret < 0) {
2093                 pci_disable_msi(rtlpci->pdev);
2094                 return ret;
2095         }
2096
2097         rtlpci->using_msi = true;
2098
2099         RT_TRACE(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2100                  "MSI Interrupt Mode!\n");
2101         return 0;
2102 }
2103
2104 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2105 {
2106         struct rtl_priv *rtlpriv = rtl_priv(hw);
2107         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2108         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2109         int ret;
2110
2111         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2112                           IRQF_SHARED, KBUILD_MODNAME, hw);
2113         if (ret < 0)
2114                 return ret;
2115
2116         rtlpci->using_msi = false;
2117         RT_TRACE(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2118                  "Pin-based Interrupt Mode!\n");
2119         return 0;
2120 }
2121
2122 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2123 {
2124         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2125         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2126         int ret;
2127
2128         if (rtlpci->msi_support) {
2129                 ret = rtl_pci_intr_mode_msi(hw);
2130                 if (ret < 0)
2131                         ret = rtl_pci_intr_mode_legacy(hw);
2132         } else {
2133                 ret = rtl_pci_intr_mode_legacy(hw);
2134         }
2135         return ret;
2136 }
2137
2138 static void platform_enable_dma64(struct pci_dev *pdev, bool dma64)
2139 {
2140         u8      value;
2141
2142         pci_read_config_byte(pdev, 0x719, &value);
2143
2144         /* 0x719 Bit5 is DMA64 bit fetch. */
2145         if (dma64)
2146                 value |= BIT(5);
2147         else
2148                 value &= ~BIT(5);
2149
2150         pci_write_config_byte(pdev, 0x719, value);
2151 }
2152
2153 int rtl_pci_probe(struct pci_dev *pdev,
2154                   const struct pci_device_id *id)
2155 {
2156         struct ieee80211_hw *hw = NULL;
2157
2158         struct rtl_priv *rtlpriv = NULL;
2159         struct rtl_pci_priv *pcipriv = NULL;
2160         struct rtl_pci *rtlpci;
2161         unsigned long pmem_start, pmem_len, pmem_flags;
2162         int err;
2163
2164         err = pci_enable_device(pdev);
2165         if (err) {
2166                 WARN_ONCE(true, "%s : Cannot enable new PCI device\n",
2167                           pci_name(pdev));
2168                 return err;
2169         }
2170
2171         if (((struct rtl_hal_cfg *)id->driver_data)->mod_params->dma64 &&
2172             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
2173                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
2174                         WARN_ONCE(true,
2175                                   "Unable to obtain 64bit DMA for consistent allocations\n");
2176                         err = -ENOMEM;
2177                         goto fail1;
2178                 }
2179
2180                 platform_enable_dma64(pdev, true);
2181         } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2182                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2183                         WARN_ONCE(true,
2184                                   "rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n");
2185                         err = -ENOMEM;
2186                         goto fail1;
2187                 }
2188
2189                 platform_enable_dma64(pdev, false);
2190         }
2191
2192         pci_set_master(pdev);
2193
2194         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2195                                 sizeof(struct rtl_priv), &rtl_ops);
2196         if (!hw) {
2197                 WARN_ONCE(true,
2198                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2199                 err = -ENOMEM;
2200                 goto fail1;
2201         }
2202
2203         SET_IEEE80211_DEV(hw, &pdev->dev);
2204         pci_set_drvdata(pdev, hw);
2205
2206         rtlpriv = hw->priv;
2207         rtlpriv->hw = hw;
2208         pcipriv = (void *)rtlpriv->priv;
2209         pcipriv->dev.pdev = pdev;
2210         init_completion(&rtlpriv->firmware_loading_complete);
2211         /*proximity init here*/
2212         rtlpriv->proximity.proxim_on = false;
2213
2214         pcipriv = (void *)rtlpriv->priv;
2215         pcipriv->dev.pdev = pdev;
2216
2217         /* init cfg & intf_ops */
2218         rtlpriv->rtlhal.interface = INTF_PCI;
2219         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2220         rtlpriv->intf_ops = &rtl_pci_ops;
2221         rtlpriv->glb_var = &rtl_global_var;
2222         rtl_efuse_ops_init(hw);
2223
2224         /* MEM map */
2225         err = pci_request_regions(pdev, KBUILD_MODNAME);
2226         if (err) {
2227                 WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n");
2228                 goto fail1;
2229         }
2230
2231         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2232         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2233         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2234
2235         /*shared mem start */
2236         rtlpriv->io.pci_mem_start =
2237                         (unsigned long)pci_iomap(pdev,
2238                         rtlpriv->cfg->bar_id, pmem_len);
2239         if (rtlpriv->io.pci_mem_start == 0) {
2240                 WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n");
2241                 err = -ENOMEM;
2242                 goto fail2;
2243         }
2244
2245         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2246                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2247                  pmem_start, pmem_len, pmem_flags,
2248                  rtlpriv->io.pci_mem_start);
2249
2250         /* Disable Clk Request */
2251         pci_write_config_byte(pdev, 0x81, 0);
2252         /* leave D3 mode */
2253         pci_write_config_byte(pdev, 0x44, 0);
2254         pci_write_config_byte(pdev, 0x04, 0x06);
2255         pci_write_config_byte(pdev, 0x04, 0x07);
2256
2257         /* find adapter */
2258         if (!_rtl_pci_find_adapter(pdev, hw)) {
2259                 err = -ENODEV;
2260                 goto fail2;
2261         }
2262
2263         /* Init IO handler */
2264         _rtl_pci_io_handler_init(&pdev->dev, hw);
2265
2266         /*like read eeprom and so on */
2267         rtlpriv->cfg->ops->read_eeprom_info(hw);
2268
2269         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2270                 pr_err("Can't init_sw_vars\n");
2271                 err = -ENODEV;
2272                 goto fail3;
2273         }
2274         rtlpriv->cfg->ops->init_sw_leds(hw);
2275
2276         /*aspm */
2277         rtl_pci_init_aspm(hw);
2278
2279         /* Init mac80211 sw */
2280         err = rtl_init_core(hw);
2281         if (err) {
2282                 pr_err("Can't allocate sw for mac80211\n");
2283                 goto fail3;
2284         }
2285
2286         /* Init PCI sw */
2287         err = rtl_pci_init(hw, pdev);
2288         if (err) {
2289                 pr_err("Failed to init PCI\n");
2290                 goto fail3;
2291         }
2292
2293         err = ieee80211_register_hw(hw);
2294         if (err) {
2295                 pr_err("Can't register mac80211 hw.\n");
2296                 err = -ENODEV;
2297                 goto fail3;
2298         }
2299         rtlpriv->mac80211.mac80211_registered = 1;
2300
2301         /* add for debug */
2302         rtl_debug_add_one(hw);
2303
2304         /*init rfkill */
2305         rtl_init_rfkill(hw);    /* Init PCI sw */
2306
2307         rtlpci = rtl_pcidev(pcipriv);
2308         err = rtl_pci_intr_mode_decide(hw);
2309         if (err) {
2310                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2311                          "%s: failed to register IRQ handler\n",
2312                          wiphy_name(hw->wiphy));
2313                 goto fail3;
2314         }
2315         rtlpci->irq_alloc = 1;
2316
2317         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2318         return 0;
2319
2320 fail3:
2321         pci_set_drvdata(pdev, NULL);
2322         rtl_deinit_core(hw);
2323
2324 fail2:
2325         if (rtlpriv->io.pci_mem_start != 0)
2326                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2327
2328         pci_release_regions(pdev);
2329         complete(&rtlpriv->firmware_loading_complete);
2330
2331 fail1:
2332         if (hw)
2333                 ieee80211_free_hw(hw);
2334         pci_disable_device(pdev);
2335
2336         return err;
2337 }
2338 EXPORT_SYMBOL(rtl_pci_probe);
2339
2340 void rtl_pci_disconnect(struct pci_dev *pdev)
2341 {
2342         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2343         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2344         struct rtl_priv *rtlpriv = rtl_priv(hw);
2345         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2346         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2347
2348         /* just in case driver is removed before firmware callback */
2349         wait_for_completion(&rtlpriv->firmware_loading_complete);
2350         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2351
2352         /* remove form debug */
2353         rtl_debug_remove_one(hw);
2354
2355         /*ieee80211_unregister_hw will call ops_stop */
2356         if (rtlmac->mac80211_registered == 1) {
2357                 ieee80211_unregister_hw(hw);
2358                 rtlmac->mac80211_registered = 0;
2359         } else {
2360                 rtl_deinit_deferred_work(hw, false);
2361                 rtlpriv->intf_ops->adapter_stop(hw);
2362         }
2363         rtlpriv->cfg->ops->disable_interrupt(hw);
2364
2365         /*deinit rfkill */
2366         rtl_deinit_rfkill(hw);
2367
2368         rtl_pci_deinit(hw);
2369         rtl_deinit_core(hw);
2370         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2371
2372         if (rtlpci->irq_alloc) {
2373                 free_irq(rtlpci->pdev->irq, hw);
2374                 rtlpci->irq_alloc = 0;
2375         }
2376
2377         if (rtlpci->using_msi)
2378                 pci_disable_msi(rtlpci->pdev);
2379
2380         list_del(&rtlpriv->list);
2381         if (rtlpriv->io.pci_mem_start != 0) {
2382                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2383                 pci_release_regions(pdev);
2384         }
2385
2386         pci_disable_device(pdev);
2387
2388         rtl_pci_disable_aspm(hw);
2389
2390         pci_set_drvdata(pdev, NULL);
2391
2392         ieee80211_free_hw(hw);
2393 }
2394 EXPORT_SYMBOL(rtl_pci_disconnect);
2395
2396 #ifdef CONFIG_PM_SLEEP
2397 /***************************************
2398  * kernel pci power state define:
2399  * PCI_D0         ((pci_power_t __force) 0)
2400  * PCI_D1         ((pci_power_t __force) 1)
2401  * PCI_D2         ((pci_power_t __force) 2)
2402  * PCI_D3hot      ((pci_power_t __force) 3)
2403  * PCI_D3cold     ((pci_power_t __force) 4)
2404  * PCI_UNKNOWN    ((pci_power_t __force) 5)
2405
2406  * This function is called when system
2407  * goes into suspend state mac80211 will
2408  * call rtl_mac_stop() from the mac80211
2409  * suspend function first, So there is
2410  * no need to call hw_disable here.
2411  ****************************************/
2412 int rtl_pci_suspend(struct device *dev)
2413 {
2414         struct ieee80211_hw *hw = dev_get_drvdata(dev);
2415         struct rtl_priv *rtlpriv = rtl_priv(hw);
2416
2417         rtlpriv->cfg->ops->hw_suspend(hw);
2418         rtl_deinit_rfkill(hw);
2419
2420         return 0;
2421 }
2422 EXPORT_SYMBOL(rtl_pci_suspend);
2423
2424 int rtl_pci_resume(struct device *dev)
2425 {
2426         struct ieee80211_hw *hw = dev_get_drvdata(dev);
2427         struct rtl_priv *rtlpriv = rtl_priv(hw);
2428
2429         rtlpriv->cfg->ops->hw_resume(hw);
2430         rtl_init_rfkill(hw);
2431         return 0;
2432 }
2433 EXPORT_SYMBOL(rtl_pci_resume);
2434 #endif /* CONFIG_PM_SLEEP */
2435
2436 const struct rtl_intf_ops rtl_pci_ops = {
2437         .read_efuse_byte = read_efuse_byte,
2438         .adapter_start = rtl_pci_start,
2439         .adapter_stop = rtl_pci_stop,
2440         .check_buddy_priv = rtl_pci_check_buddy_priv,
2441         .adapter_tx = rtl_pci_tx,
2442         .flush = rtl_pci_flush,
2443         .reset_trx_ring = rtl_pci_reset_trx_ring,
2444         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2445
2446         .disable_aspm = rtl_pci_disable_aspm,
2447         .enable_aspm = rtl_pci_enable_aspm,
2448 };