1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
7 #include "../mt76_connac_mcu.h"
9 struct mt7921_mcu_txd {
17 u8 set_query; /* FW don't care */
26 } __packed __aligned(4);
29 * struct mt7921_uni_txd - mcu command descriptor for firmware v3
30 * @txd: hardware descriptor
31 * @len: total length not including txd
32 * @cid: command identifier
33 * @pkt_type: must be 0xa0 (cmd packet by long format)
34 * @frag_n: fragment number
35 * @seq: sequence number
36 * @checksum: 0 mean there is no checksum
37 * @s2d_index: index for command source and destination
38 * Definition | value | note
39 * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM
40 * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM
41 * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA
42 * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM
44 * @option: command option
45 * BIT[0]: UNI_CMD_OPT_BIT_ACK
46 * set to 1 to request a fw reply
47 * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
48 * is set, mcu firmware will send response event EID = 0x01
49 * (UNI_EVENT_ID_CMD_RESULT) to the host.
50 * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
53 * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
57 struct mt7921_uni_txd {
77 } __packed __aligned(4);
81 MCU_EVENT_REG_ACCESS = 0x05,
82 MCU_EVENT_LP_INFO = 0x07,
83 MCU_EVENT_SCAN_DONE = 0x0d,
84 MCU_EVENT_TX_DONE = 0x0f,
85 MCU_EVENT_BSS_ABSENCE = 0x11,
86 MCU_EVENT_BSS_BEACON_LOSS = 0x13,
87 MCU_EVENT_CH_PRIVILEGE = 0x18,
88 MCU_EVENT_SCHED_SCAN_DONE = 0x23,
89 MCU_EVENT_DBG_MSG = 0x27,
90 MCU_EVENT_TXPWR = 0xd0,
91 MCU_EVENT_COREDUMP = 0xf0,
96 MCU_EXT_EVENT_RATE_REPORT = 0x87,
99 struct mt7921_mcu_rxd {
114 struct mt7921_mcu_eeprom_info {
120 #define MT_RA_RATE_NSS GENMASK(8, 6)
121 #define MT_RA_RATE_MCS GENMASK(3, 0)
122 #define MT_RA_RATE_TX_MODE GENMASK(12, 9)
123 #define MT_RA_RATE_DCM_EN BIT(4)
124 #define MT_RA_RATE_BW GENMASK(14, 13)
126 #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
127 #define MCU_PKT_ID 0xa0
143 struct mt7921_mcu_uni_event {
146 __le32 status; /* 0: success, others: fail */
150 PATCH_NOT_DL_SEM_FAIL,
152 PATCH_NOT_DL_SEM_SUCCESS,
153 PATCH_REL_SEM_SUCCESS
158 FW_STATE_FW_DOWNLOAD,
159 FW_STATE_NORMAL_OPERATION,
161 FW_STATE_WACPU_RDY = 7
176 MCU_PHY_STATE_TX_RATE,
177 MCU_PHY_STATE_RX_RATE,
179 MCU_PHY_STATE_CONTENTION_RX_RATE,
180 MCU_PHY_STATE_OFDMLQ_CNINFO,
198 struct sec_key key[2];
201 enum mcu_cipher_type {
202 MCU_CIPHER_WEP40 = 1,
211 MCU_CIPHER_BIP_CMAC_128,
215 CH_SWITCH_NORMAL = 0,
219 CH_SWITCH_BACKGROUND_SCAN_START = 6,
220 CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7,
221 CH_SWITCH_BACKGROUND_SCAN_STOP = 8,
222 CH_SWITCH_SCAN_BYPASS_DPD = 9
226 THERMAL_SENSOR_TEMP_QUERY,
227 THERMAL_SENSOR_MANUAL_CTRL,
228 THERMAL_SENSOR_INFO_QUERY,
229 THERMAL_SENSOR_TASK_CTRL,
233 MT_EBF = BIT(0), /* explicit beamforming */
234 MT_IBF = BIT(1) /* implicit beamforming */
237 #define STA_CAP_WMM BIT(0)
238 #define STA_CAP_SGI_20 BIT(4)
239 #define STA_CAP_SGI_40 BIT(5)
240 #define STA_CAP_TX_STBC BIT(6)
241 #define STA_CAP_RX_STBC BIT(7)
242 #define STA_CAP_VHT_SGI_80 BIT(16)
243 #define STA_CAP_VHT_SGI_160 BIT(17)
244 #define STA_CAP_VHT_TX_STBC BIT(18)
245 #define STA_CAP_VHT_RX_STBC BIT(19)
246 #define STA_CAP_VHT_LDPC BIT(23)
247 #define STA_CAP_LDPC BIT(24)
248 #define STA_CAP_HT BIT(26)
249 #define STA_CAP_VHT BIT(27)
250 #define STA_CAP_HE BIT(28)
252 struct mt7921_mcu_reg_event {
257 struct mt7921_mcu_ant_id_config {
261 struct mt7921_mcu_peer_cap {
262 struct mt7921_mcu_ant_id_config ant_id_config;
280 struct mt7921_txpwr_req {
288 struct mt7921_txpwr_event {
292 struct mt7921_txpwr txpwr;
295 struct mt7921_mcu_tx_done_event {