1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2019 MediaTek Inc.
4 * Author: Roy Luo <royluo@google.com>
5 * Ryder Lee <ryder.lee@mediatek.com>
6 * Felix Fietkau <nbd@nbd.name>
7 * Lorenzo Bianconi <lorenzo@kernel.org>
10 #include <linux/etherdevice.h>
16 mt7615_phy_init(struct mt7615_dev *dev)
18 /* disable rf low power beacon mode */
19 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
20 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
24 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
29 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
31 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
33 /* enable band 0/1 clk */
34 mt76_set(dev, MT_CFG_CCR, val);
36 mt76_rmw(dev, MT_TMAC_TRCR(chain),
37 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
38 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
39 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
41 mt76_wr(dev, MT_AGG_ACR(chain),
42 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
43 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
44 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
46 mt76_wr(dev, MT_AGG_ARUCR(chain),
47 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
48 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
49 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
50 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
51 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
52 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
53 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
54 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
56 mt76_wr(dev, MT_AGG_ARDCR(chain),
57 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
58 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
59 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
60 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
61 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
62 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
63 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
64 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
66 mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS);
67 if (!mt7615_firmware_offload(dev)) {
70 mask = MT_DMA_RCFR0_MCU_RX_MGMT |
71 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
72 MT_DMA_RCFR0_MCU_RX_CTL_BAR |
73 MT_DMA_RCFR0_MCU_RX_BYPASS |
74 MT_DMA_RCFR0_RX_DROPPED_UCAST |
75 MT_DMA_RCFR0_RX_DROPPED_MCAST;
76 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
77 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
78 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
83 mt7615_mac_init(struct mt7615_dev *dev)
87 mt7615_init_mac_chain(dev, 0);
89 mt76_rmw_field(dev, MT_TMAC_CTCR0,
90 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
91 mt76_rmw_field(dev, MT_TMAC_CTCR0,
92 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
93 mt76_rmw(dev, MT_TMAC_CTCR0,
94 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
95 MT_TMAC_CTCR0_INS_DDLMT_EN,
96 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
97 MT_TMAC_CTCR0_INS_DDLMT_EN);
99 mt7615_mcu_set_rts_thresh(&dev->phy, 0x92b);
100 mt7615_mac_set_scs(&dev->phy, true);
102 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
103 MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
105 mt76_wr(dev, MT_AGG_ARCR,
106 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
107 MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
108 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
109 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
111 for (i = 0; i < MT7615_WTBL_SIZE; i++)
112 mt7615_mac_wtbl_update(dev, i,
113 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
115 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
116 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
118 /* disable hdr translation and hw AMSDU */
119 mt76_wr(dev, MT_DMA_DCR0,
120 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
121 MT_DMA_DCR0_RX_VEC_DROP);
122 /* disable TDLS filtering */
123 mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN);
124 mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
125 if (is_mt7663(&dev->mt76)) {
126 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
127 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
129 mt7615_init_mac_chain(dev, 1);
134 mt7615_check_offload_capability(struct mt7615_dev *dev)
136 struct ieee80211_hw *hw = mt76_hw(dev);
137 struct wiphy *wiphy = hw->wiphy;
139 if (mt7615_firmware_offload(dev)) {
140 ieee80211_hw_set(hw, SUPPORTS_PS);
141 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
143 wiphy->max_remain_on_channel_duration = 5000;
144 wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
145 NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR |
146 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
147 NL80211_FEATURE_P2P_GO_CTWIN |
148 NL80211_FEATURE_P2P_GO_OPPPS;
150 dev->ops->hw_scan = NULL;
151 dev->ops->cancel_hw_scan = NULL;
152 dev->ops->sched_scan_start = NULL;
153 dev->ops->sched_scan_stop = NULL;
154 dev->ops->set_rekey_data = NULL;
155 dev->ops->remain_on_channel = NULL;
156 dev->ops->cancel_remain_on_channel = NULL;
158 wiphy->max_sched_scan_plan_interval = 0;
159 wiphy->max_sched_scan_ie_len = 0;
160 wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
161 wiphy->max_sched_scan_ssids = 0;
162 wiphy->max_match_sets = 0;
163 wiphy->max_sched_scan_reqs = 0;
167 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
169 flush_work(&dev->mcu_work);
171 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
173 EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init);
175 #define CCK_RATE(_idx, _rate) { \
177 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \
178 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
179 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)), \
182 #define OFDM_RATE(_idx, _rate) { \
184 .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
185 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
188 struct ieee80211_rate mt7615_rates[] = {
202 EXPORT_SYMBOL_GPL(mt7615_rates);
204 static const struct ieee80211_iface_limit if_limits[] = {
207 .types = BIT(NL80211_IFTYPE_ADHOC)
209 .max = MT7615_MAX_INTERFACES,
210 .types = BIT(NL80211_IFTYPE_AP) |
211 #ifdef CONFIG_MAC80211_MESH
212 BIT(NL80211_IFTYPE_MESH_POINT) |
214 BIT(NL80211_IFTYPE_P2P_CLIENT) |
215 BIT(NL80211_IFTYPE_P2P_GO) |
216 BIT(NL80211_IFTYPE_STATION)
220 static const struct ieee80211_iface_combination if_comb_radar[] = {
223 .n_limits = ARRAY_SIZE(if_limits),
224 .max_interfaces = MT7615_MAX_INTERFACES,
225 .num_different_channels = 1,
226 .beacon_int_infra_match = true,
227 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
228 BIT(NL80211_CHAN_WIDTH_20) |
229 BIT(NL80211_CHAN_WIDTH_40) |
230 BIT(NL80211_CHAN_WIDTH_80) |
231 BIT(NL80211_CHAN_WIDTH_160) |
232 BIT(NL80211_CHAN_WIDTH_80P80),
236 static const struct ieee80211_iface_combination if_comb[] = {
239 .n_limits = ARRAY_SIZE(if_limits),
240 .max_interfaces = MT7615_MAX_INTERFACES,
241 .num_different_channels = 1,
242 .beacon_int_infra_match = true,
246 void mt7615_init_txpower(struct mt7615_dev *dev,
247 struct ieee80211_supported_band *sband)
249 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
250 int delta_idx, delta = mt76_tx_power_nss_delta(n_chains);
251 u8 *eep = (u8 *)dev->mt76.eeprom.data;
252 enum nl80211_band band = sband->band;
255 delta_idx = mt7615_eeprom_get_power_delta_index(dev, band);
256 rate_val = eep[delta_idx];
257 if ((rate_val & ~MT_EE_RATE_POWER_MASK) ==
258 (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN))
259 delta += rate_val & MT_EE_RATE_POWER_MASK;
261 if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band))
264 target_chains = n_chains;
266 for (i = 0; i < sband->n_channels; i++) {
267 struct ieee80211_channel *chan = &sband->channels[i];
271 for (j = 0; j < target_chains; j++) {
274 index = mt7615_eeprom_get_target_power_index(dev, chan, j);
278 target_power = max(target_power, eep[index]);
281 target_power = DIV_ROUND_UP(target_power + delta, 2);
282 chan->max_power = min_t(int, chan->max_reg_power,
284 chan->orig_mpwr = target_power;
287 EXPORT_SYMBOL_GPL(mt7615_init_txpower);
289 void mt7615_init_work(struct mt7615_dev *dev)
291 mt7615_mcu_set_eeprom(dev);
292 mt7615_mac_init(dev);
293 mt7615_phy_init(dev);
294 mt7615_mcu_del_wtbl_all(dev);
295 mt7615_check_offload_capability(dev);
297 EXPORT_SYMBOL_GPL(mt7615_init_work);
300 mt7615_regd_notifier(struct wiphy *wiphy,
301 struct regulatory_request *request)
303 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
304 struct mt7615_dev *dev = mt7615_hw_dev(hw);
305 struct mt76_phy *mphy = hw->priv;
306 struct mt7615_phy *phy = mphy->priv;
307 struct cfg80211_chan_def *chandef = &mphy->chandef;
309 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
310 dev->mt76.region = request->dfs_region;
312 mt7615_mutex_acquire(dev);
314 if (chandef->chan->flags & IEEE80211_CHAN_RADAR)
315 mt7615_dfs_init_radar_detector(phy);
316 mt7615_mcu_set_channel_domain(phy);
318 mt7615_mutex_release(dev);
322 mt7615_init_wiphy(struct ieee80211_hw *hw)
324 struct mt7615_phy *phy = mt7615_hw_phy(hw);
325 struct wiphy *wiphy = hw->wiphy;
329 hw->max_report_rates = 7;
330 hw->max_rate_tries = 11;
334 hw->sta_data_size = sizeof(struct mt7615_sta);
335 hw->vif_data_size = sizeof(struct mt7615_vif);
337 if (is_mt7663(&phy->dev->mt76)) {
338 wiphy->iface_combinations = if_comb;
339 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
341 wiphy->iface_combinations = if_comb_radar;
342 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar);
344 wiphy->reg_notifier = mt7615_regd_notifier;
346 wiphy->max_sched_scan_plan_interval = MT7615_MAX_SCHED_SCAN_INTERVAL;
347 wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
348 wiphy->max_scan_ie_len = MT7615_SCAN_IE_LEN;
349 wiphy->max_sched_scan_ssids = MT7615_MAX_SCHED_SCAN_SSID;
350 wiphy->max_match_sets = MT7615_MAX_SCAN_MATCH;
351 wiphy->max_sched_scan_reqs = 1;
352 wiphy->max_scan_ssids = 4;
354 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
355 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
357 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
358 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
359 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
361 if (is_mt7615(&phy->dev->mt76))
362 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
364 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
368 mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
370 dev->mphy.sband_5g.sband.vht_cap.cap &=
371 ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
372 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
373 if (dev->chainmask == 0xf)
374 dev->mphy.antenna_mask = dev->chainmask >> 2;
376 dev->mphy.antenna_mask = dev->chainmask >> 1;
377 dev->mphy.chainmask = dev->mphy.antenna_mask;
378 dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask;
379 dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask;
380 mt76_set_stream_caps(&dev->mphy, true);
384 mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
386 dev->mphy.sband_5g.sband.vht_cap.cap |=
387 IEEE80211_VHT_CAP_SHORT_GI_160 |
388 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
389 dev->mphy.antenna_mask = dev->chainmask;
390 dev->mphy.chainmask = dev->chainmask;
391 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
392 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
393 mt76_set_stream_caps(&dev->mphy, true);
396 int mt7615_register_ext_phy(struct mt7615_dev *dev)
398 struct mt7615_phy *phy = mt7615_ext_phy(dev);
399 struct mt76_phy *mphy;
402 if (!is_mt7615(&dev->mt76))
405 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
411 mt7615_cap_dbdc_enable(dev);
412 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops);
419 mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask;
420 mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1;
421 mt7615_init_wiphy(mphy->hw);
423 INIT_DELAYED_WORK(&mphy->mac_work, mt7615_mac_work);
424 INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
425 skb_queue_head_init(&phy->scan_event_list);
427 INIT_WORK(&phy->roc_work, mt7615_roc_work);
428 timer_setup(&phy->roc_timer, mt7615_roc_timer, 0);
429 init_waitqueue_head(&phy->roc_wait);
431 mt7615_mac_set_scs(phy, true);
434 * Make the secondary PHY MAC address local without overlapping with
435 * the usual MAC address allocation scheme on multiple virtual interfaces
437 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
439 mphy->macaddr[0] |= 2;
440 mphy->macaddr[0] ^= BIT(7);
441 mt76_eeprom_override(mphy);
443 /* second phy can only handle 5 GHz */
444 mphy->cap.has_5ghz = true;
446 /* mt7615 second phy shares the same hw queues with the primary one */
447 for (i = 0; i <= MT_TXQ_PSD ; i++)
448 mphy->q_tx[i] = dev->mphy.q_tx[i];
450 ret = mt76_register_phy(mphy, true, mt7615_rates,
451 ARRAY_SIZE(mt7615_rates));
453 ieee80211_free_hw(mphy->hw);
457 EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
459 void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
461 struct mt7615_phy *phy = mt7615_ext_phy(dev);
462 struct mt76_phy *mphy = dev->mt76.phy2;
467 mt7615_cap_dbdc_disable(dev);
468 mt76_unregister_phy(mphy);
469 ieee80211_free_hw(mphy->hw);
471 EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy);
473 void mt7615_init_device(struct mt7615_dev *dev)
475 struct ieee80211_hw *hw = mt76_hw(dev);
478 dev->phy.mt76 = &dev->mt76.phy;
479 dev->mt76.phy.priv = &dev->phy;
481 INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work);
482 INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work);
483 init_completion(&dev->pm.wake_cmpl);
484 spin_lock_init(&dev->pm.txq_lock);
485 set_bit(MT76_STATE_PM, &dev->mphy.state);
486 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7615_mac_work);
487 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
488 skb_queue_head_init(&dev->phy.scan_event_list);
489 INIT_LIST_HEAD(&dev->sta_poll_list);
490 spin_lock_init(&dev->sta_poll_lock);
491 init_waitqueue_head(&dev->reset_wait);
492 init_waitqueue_head(&dev->phy.roc_wait);
494 INIT_WORK(&dev->reset_work, mt7615_mac_reset_work);
495 INIT_WORK(&dev->phy.roc_work, mt7615_roc_work);
496 timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0);
498 mt7615_init_wiphy(hw);
499 dev->pm.idle_timeout = MT7615_PM_TIMEOUT;
500 dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
501 dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
502 dev->mphy.sband_5g.sband.vht_cap.cap |=
503 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
504 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
505 mt7615_cap_dbdc_disable(dev);
506 dev->phy.dfs_state = -1;
508 #ifdef CONFIG_NL80211_TESTMODE
509 dev->mt76.test_ops = &mt7615_testmode_ops;
512 EXPORT_SYMBOL_GPL(mt7615_init_device);