1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2019 MediaTek Inc.
4 * Author: Roy Luo <royluo@google.com>
5 * Ryder Lee <ryder.lee@mediatek.com>
6 * Felix Fietkau <nbd@nbd.name>
7 * Lorenzo Bianconi <lorenzo@kernel.org>
10 #include <linux/etherdevice.h>
15 static void mt7615_phy_init(struct mt7615_dev *dev)
17 /* disable rf low power beacon mode */
18 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
19 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
23 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
28 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
30 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
32 /* enable band 0/1 clk */
33 mt76_set(dev, MT_CFG_CCR, val);
35 mt76_rmw(dev, MT_TMAC_TRCR(chain),
36 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
37 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
38 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
40 mt76_wr(dev, MT_AGG_ACR(chain),
41 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
42 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
43 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
45 mt76_wr(dev, MT_AGG_ARUCR(chain),
46 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
47 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
48 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
49 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
50 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
51 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
52 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
53 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
55 mt76_wr(dev, MT_AGG_ARDCR(chain),
56 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
57 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
58 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
59 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
60 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
61 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
62 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
63 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
65 if (!mt7615_firmware_offload(dev)) {
68 mask = MT_DMA_RCFR0_MCU_RX_MGMT |
69 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
70 MT_DMA_RCFR0_MCU_RX_CTL_BAR |
71 MT_DMA_RCFR0_MCU_RX_BYPASS |
72 MT_DMA_RCFR0_RX_DROPPED_UCAST |
73 MT_DMA_RCFR0_RX_DROPPED_MCAST;
74 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
75 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
76 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
80 static void mt7615_mac_init(struct mt7615_dev *dev)
84 mt7615_init_mac_chain(dev, 0);
86 mt76_rmw_field(dev, MT_TMAC_CTCR0,
87 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
88 mt76_rmw_field(dev, MT_TMAC_CTCR0,
89 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
90 mt76_rmw(dev, MT_TMAC_CTCR0,
91 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
92 MT_TMAC_CTCR0_INS_DDLMT_EN,
93 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
94 MT_TMAC_CTCR0_INS_DDLMT_EN);
96 mt7615_mcu_set_rts_thresh(&dev->phy, 0x92b);
97 mt7615_mac_set_scs(&dev->phy, true);
99 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
100 MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
102 mt76_wr(dev, MT_AGG_ARCR,
103 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
104 MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
105 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
106 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
108 for (i = 0; i < MT7615_WTBL_SIZE; i++)
109 mt7615_mac_wtbl_update(dev, i,
110 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
112 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
113 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
115 /* disable hdr translation and hw AMSDU */
116 mt76_wr(dev, MT_DMA_DCR0,
117 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
118 MT_DMA_DCR0_RX_VEC_DROP);
119 mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
120 if (is_mt7663(&dev->mt76)) {
121 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
122 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
124 mt7615_init_mac_chain(dev, 1);
128 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
130 flush_work(&dev->mcu_work);
132 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
135 static void mt7615_init_work(struct work_struct *work)
137 struct mt7615_dev *dev = container_of(work, struct mt7615_dev, mcu_work);
139 if (mt7615_mcu_init(dev))
142 mt7615_mcu_set_eeprom(dev);
143 mt7615_mac_init(dev);
144 mt7615_phy_init(dev);
145 mt7615_mcu_del_wtbl_all(dev);
148 static int mt7615_init_hardware(struct mt7615_dev *dev)
150 u32 addr = mt7615_reg_map(dev, MT_EFUSE_BASE);
153 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
155 INIT_WORK(&dev->mcu_work, mt7615_init_work);
156 spin_lock_init(&dev->token_lock);
157 idr_init(&dev->token);
159 ret = mt7615_eeprom_init(dev, addr);
163 ret = mt7615_dma_init(dev);
167 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
169 /* Beacon and mgmt frames should occupy wcid 0 */
170 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7615_WTBL_STA - 1);
174 dev->mt76.global_wcid.idx = idx;
175 dev->mt76.global_wcid.hw_key_idx = -1;
176 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
181 #define CCK_RATE(_idx, _rate) { \
183 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \
184 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
185 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)), \
188 #define OFDM_RATE(_idx, _rate) { \
190 .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
191 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
194 static struct ieee80211_rate mt7615_rates[] = {
209 static const struct ieee80211_iface_limit if_limits[] = {
212 .types = BIT(NL80211_IFTYPE_ADHOC)
214 .max = MT7615_MAX_INTERFACES,
215 .types = BIT(NL80211_IFTYPE_AP) |
216 #ifdef CONFIG_MAC80211_MESH
217 BIT(NL80211_IFTYPE_MESH_POINT) |
219 BIT(NL80211_IFTYPE_STATION)
223 static const struct ieee80211_iface_combination if_comb[] = {
226 .n_limits = ARRAY_SIZE(if_limits),
228 .num_different_channels = 1,
229 .beacon_int_infra_match = true,
234 mt7615_led_set_config(struct led_classdev *led_cdev,
235 u8 delay_on, u8 delay_off)
237 struct mt7615_dev *dev;
238 struct mt76_dev *mt76;
241 mt76 = container_of(led_cdev, struct mt76_dev, led_cdev);
242 dev = container_of(mt76, struct mt7615_dev, mt76);
243 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |
244 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
245 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
247 addr = mt7615_reg_map(dev, MT_LED_STATUS_0(mt76->led_pin));
248 mt76_wr(dev, addr, val);
249 addr = mt7615_reg_map(dev, MT_LED_STATUS_1(mt76->led_pin));
250 mt76_wr(dev, addr, val);
252 val = MT_LED_CTRL_REPLAY(mt76->led_pin) |
253 MT_LED_CTRL_KICK(mt76->led_pin);
255 val |= MT_LED_CTRL_POLARITY(mt76->led_pin);
256 addr = mt7615_reg_map(dev, MT_LED_CTRL);
257 mt76_wr(dev, addr, val);
261 mt7615_led_set_blink(struct led_classdev *led_cdev,
262 unsigned long *delay_on,
263 unsigned long *delay_off)
265 u8 delta_on, delta_off;
267 delta_off = max_t(u8, *delay_off / 10, 1);
268 delta_on = max_t(u8, *delay_on / 10, 1);
270 mt7615_led_set_config(led_cdev, delta_on, delta_off);
276 mt7615_led_set_brightness(struct led_classdev *led_cdev,
277 enum led_brightness brightness)
280 mt7615_led_set_config(led_cdev, 0, 0xff);
282 mt7615_led_set_config(led_cdev, 0xff, 0);
286 mt7615_init_txpower(struct mt7615_dev *dev,
287 struct ieee80211_supported_band *sband)
289 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
290 u8 *eep = (u8 *)dev->mt76.eeprom.data;
291 enum nl80211_band band = sband->band;
292 int delta = mt76_tx_power_nss_delta(n_chains);
294 target_chains = mt7615_ext_pa_enabled(dev, band) ? 1 : n_chains;
295 for (i = 0; i < sband->n_channels; i++) {
296 struct ieee80211_channel *chan = &sband->channels[i];
300 for (j = 0; j < target_chains; j++) {
303 index = mt7615_eeprom_get_power_index(dev, chan, j);
304 target_power = max(target_power, eep[index]);
307 target_power = DIV_ROUND_UP(target_power + delta, 2);
308 chan->max_power = min_t(int, chan->max_reg_power,
310 chan->orig_mpwr = target_power;
315 mt7615_regd_notifier(struct wiphy *wiphy,
316 struct regulatory_request *request)
318 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
319 struct mt7615_dev *dev = mt7615_hw_dev(hw);
320 struct mt76_phy *mphy = hw->priv;
321 struct mt7615_phy *phy = mphy->priv;
322 struct cfg80211_chan_def *chandef = &mphy->chandef;
324 dev->mt76.region = request->dfs_region;
326 if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR))
329 mt7615_dfs_init_radar_detector(phy);
333 mt7615_init_wiphy(struct ieee80211_hw *hw)
335 struct mt7615_phy *phy = mt7615_hw_phy(hw);
336 struct wiphy *wiphy = hw->wiphy;
340 hw->max_report_rates = 7;
341 hw->max_rate_tries = 11;
345 hw->sta_data_size = sizeof(struct mt7615_sta);
346 hw->vif_data_size = sizeof(struct mt7615_vif);
348 wiphy->iface_combinations = if_comb;
349 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
350 wiphy->reg_notifier = mt7615_regd_notifier;
352 wiphy->max_sched_scan_plan_interval = MT7615_MAX_SCHED_SCAN_INTERVAL;
353 wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
354 wiphy->max_scan_ie_len = MT7615_SCAN_IE_LEN;
355 wiphy->max_sched_scan_ssids = MT7615_MAX_SCHED_SCAN_SSID;
356 wiphy->max_match_sets = MT7615_MAX_SCAN_MATCH;
357 wiphy->max_sched_scan_reqs = 1;
358 wiphy->max_scan_ssids = 4;
360 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
361 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
363 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
364 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
366 if (is_mt7615(&phy->dev->mt76))
367 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
369 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
373 mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
375 dev->mphy.sband_5g.sband.vht_cap.cap &=
376 ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
377 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
378 if (dev->chainmask == 0xf)
379 dev->mphy.antenna_mask = dev->chainmask >> 2;
381 dev->mphy.antenna_mask = dev->chainmask >> 1;
382 dev->phy.chainmask = dev->mphy.antenna_mask;
383 dev->mphy.hw->wiphy->available_antennas_rx = dev->phy.chainmask;
384 dev->mphy.hw->wiphy->available_antennas_tx = dev->phy.chainmask;
385 mt76_set_stream_caps(&dev->mt76, true);
389 mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
391 dev->mphy.sband_5g.sband.vht_cap.cap |=
392 IEEE80211_VHT_CAP_SHORT_GI_160 |
393 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
394 dev->mphy.antenna_mask = dev->chainmask;
395 dev->phy.chainmask = dev->chainmask;
396 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
397 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
398 mt76_set_stream_caps(&dev->mt76, true);
401 int mt7615_register_ext_phy(struct mt7615_dev *dev)
403 struct mt7615_phy *phy = mt7615_ext_phy(dev);
404 struct mt76_phy *mphy;
407 if (!is_mt7615(&dev->mt76))
410 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
416 INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
417 skb_queue_head_init(&phy->scan_event_list);
419 mt7615_cap_dbdc_enable(dev);
420 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops);
427 phy->chainmask = dev->chainmask & ~dev->phy.chainmask;
428 mphy->antenna_mask = BIT(hweight8(phy->chainmask)) - 1;
429 mt7615_init_wiphy(mphy->hw);
431 mt7615_mac_set_scs(phy, true);
434 * Make the secondary PHY MAC address local without overlapping with
435 * the usual MAC address allocation scheme on multiple virtual interfaces
437 mphy->hw->wiphy->perm_addr[0] |= 2;
438 mphy->hw->wiphy->perm_addr[0] ^= BIT(7);
440 /* second phy can only handle 5 GHz */
441 mphy->sband_2g.sband.n_channels = 0;
442 mphy->hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
444 /* The second interface does not get any packets unless it has a vif */
445 ieee80211_hw_set(mphy->hw, WANT_MONITOR_VIF);
447 ret = mt76_register_phy(mphy);
449 ieee80211_free_hw(mphy->hw);
454 void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
456 struct mt7615_phy *phy = mt7615_ext_phy(dev);
457 struct mt76_phy *mphy = dev->mt76.phy2;
462 mt7615_cap_dbdc_disable(dev);
463 mt76_unregister_phy(mphy);
464 ieee80211_free_hw(mphy->hw);
467 void mt7615_init_device(struct mt7615_dev *dev)
469 struct ieee80211_hw *hw = mt76_hw(dev);
472 dev->phy.mt76 = &dev->mt76.phy;
473 dev->mt76.phy.priv = &dev->phy;
474 INIT_DELAYED_WORK(&dev->mt76.mac_work, mt7615_mac_work);
475 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
476 skb_queue_head_init(&dev->phy.scan_event_list);
477 INIT_LIST_HEAD(&dev->sta_poll_list);
478 spin_lock_init(&dev->sta_poll_lock);
479 init_waitqueue_head(&dev->reset_wait);
480 INIT_WORK(&dev->reset_work, mt7615_mac_reset_work);
482 mt7615_init_wiphy(hw);
483 dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
484 dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
485 dev->mphy.sband_5g.sband.vht_cap.cap |=
486 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
487 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
488 mt7615_cap_dbdc_disable(dev);
489 dev->phy.dfs_state = -1;
492 int mt7615_register_device(struct mt7615_dev *dev)
496 mt7615_init_device(dev);
498 /* init led callbacks */
499 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
500 dev->mt76.led_cdev.brightness_set = mt7615_led_set_brightness;
501 dev->mt76.led_cdev.blink_set = mt7615_led_set_blink;
504 ret = mt7622_wmac_init(dev);
508 ret = mt7615_init_hardware(dev);
512 ret = mt76_register_device(&dev->mt76, true, mt7615_rates,
513 ARRAY_SIZE(mt7615_rates));
517 ieee80211_queue_work(mt76_hw(dev), &dev->mcu_work);
518 mt7615_init_txpower(dev, &dev->mphy.sband_2g.sband);
519 mt7615_init_txpower(dev, &dev->mphy.sband_5g.sband);
521 return mt7615_init_debugfs(dev);
524 void mt7615_unregister_device(struct mt7615_dev *dev)
526 struct mt76_txwi_cache *txwi;
530 mcu_running = mt7615_wait_for_mcu_init(dev);
532 mt7615_unregister_ext_phy(dev);
533 mt76_unregister_device(&dev->mt76);
535 mt7615_mcu_exit(dev);
536 mt7615_dma_cleanup(dev);
538 spin_lock_bh(&dev->token_lock);
539 idr_for_each_entry(&dev->token, txwi, id) {
540 mt7615_txp_skb_unmap(&dev->mt76, txwi);
542 dev_kfree_skb_any(txwi->skb);
543 mt76_put_txwi(&dev->mt76, txwi);
545 spin_unlock_bh(&dev->token_lock);
546 idr_destroy(&dev->token);
548 mt76_free_device(&dev->mt76);