1 /* SPDX-License-Identifier: ISC */
3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
9 #include <linux/kernel.h>
11 #include <linux/spinlock.h>
12 #include <linux/skbuff.h>
13 #include <linux/leds.h>
14 #include <linux/usb.h>
15 #include <linux/average.h>
16 #include <net/mac80211.h>
19 #define MT_TX_RING_SIZE 256
20 #define MT_MCU_RING_SIZE 32
21 #define MT_RX_BUF_SIZE 2048
22 #define MT_SKB_HEAD_LEN 128
27 struct mt76_reg_pair {
38 u32 (*rr)(struct mt76_dev *dev, u32 offset);
39 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
40 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
41 void (*write_copy)(struct mt76_dev *dev, u32 offset, const void *data,
43 void (*read_copy)(struct mt76_dev *dev, u32 offset, void *data,
45 int (*wr_rp)(struct mt76_dev *dev, u32 base,
46 const struct mt76_reg_pair *rp, int len);
47 int (*rd_rp)(struct mt76_dev *dev, u32 base,
48 struct mt76_reg_pair *rp, int len);
49 enum mt76_bus_type type;
52 #define mt76_is_usb(dev) ((dev)->mt76.bus->type == MT76_BUS_USB)
53 #define mt76_is_mmio(dev) ((dev)->mt76.bus->type == MT76_BUS_MMIO)
56 MT_TXQ_VO = IEEE80211_AC_VO,
57 MT_TXQ_VI = IEEE80211_AC_VI,
58 MT_TXQ_BE = IEEE80211_AC_BE,
59 MT_TXQ_BK = IEEE80211_AC_BK,
74 struct mt76_queue_buf {
80 struct mt76_queue_buf buf[32];
86 struct mt76_queue_entry {
92 struct mt76_txwi_cache *txwi;
100 struct mt76_queue_regs {
105 } __packed __aligned(4);
108 struct mt76_queue_regs __iomem *regs;
111 struct mt76_queue_entry *entry;
112 struct mt76_desc *desc;
126 struct sk_buff *rx_head;
127 struct page_frag_cache rx_page;
130 struct mt76_sw_queue {
131 struct mt76_queue *q;
133 struct list_head swq;
137 struct mt76_mcu_ops {
138 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data,
139 int len, bool wait_resp);
140 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base,
141 const struct mt76_reg_pair *rp, int len);
142 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base,
143 struct mt76_reg_pair *rp, int len);
144 int (*mcu_restart)(struct mt76_dev *dev);
147 struct mt76_queue_ops {
148 int (*init)(struct mt76_dev *dev);
150 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q,
151 int idx, int n_desc, int bufsize,
154 int (*add_buf)(struct mt76_dev *dev, struct mt76_queue *q,
155 struct mt76_queue_buf *buf, int nbufs, u32 info,
156 struct sk_buff *skb, void *txwi);
158 int (*tx_queue_skb)(struct mt76_dev *dev, enum mt76_txq_id qid,
159 struct sk_buff *skb, struct mt76_wcid *wcid,
160 struct ieee80211_sta *sta);
162 int (*tx_queue_skb_raw)(struct mt76_dev *dev, enum mt76_txq_id qid,
163 struct sk_buff *skb, u32 tx_info);
165 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush,
166 int *len, u32 *info, bool *more);
168 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
170 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid,
173 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
176 enum mt76_wcid_flags {
177 MT_WCID_FLAG_CHECK_PS,
181 #define MT76_N_WCIDS 128
183 DECLARE_EWMA(signal, 10, 8);
185 #define MT_WCID_TX_INFO_RATE GENMASK(15, 0)
186 #define MT_WCID_TX_INFO_NSS GENMASK(17, 16)
187 #define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18)
188 #define MT_WCID_TX_INFO_SET BIT(31)
191 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
193 struct work_struct aggr_work;
197 struct ewma_signal rssi;
206 u8 rx_key_pn[IEEE80211_NUM_TIDS][6];
216 struct mt76_sw_queue *swq;
217 struct mt76_wcid *wcid;
219 struct sk_buff_head retry_q;
226 struct mt76_txwi_cache {
227 struct list_head list;
234 struct rcu_head rcu_head;
236 struct mt76_dev *dev;
239 struct delayed_work reorder_work;
245 u8 started:1, stopped:1, timer_pending:1;
247 struct sk_buff *reorder_buf[];
250 #define MT_TX_CB_DMA_DONE BIT(0)
251 #define MT_TX_CB_TXS_DONE BIT(1)
252 #define MT_TX_CB_TXS_FAILED BIT(2)
254 #define MT_PACKET_ID_MASK GENMASK(6, 0)
255 #define MT_PACKET_ID_NO_ACK 0
256 #define MT_PACKET_ID_NO_SKB 1
257 #define MT_PACKET_ID_FIRST 2
258 #define MT_PACKET_ID_HAS_RATE BIT(7)
260 #define MT_TX_STATUS_SKB_TIMEOUT HZ
263 unsigned long jiffies;
270 MT76_STATE_INITIALIZED,
272 MT76_STATE_MCU_RUNNING,
284 #define MT_TXWI_NO_FREE BIT(0)
286 struct mt76_driver_ops {
287 bool tx_aligned4_skbs;
291 void (*update_survey)(struct mt76_dev *dev);
293 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr,
294 enum mt76_txq_id qid, struct mt76_wcid *wcid,
295 struct ieee80211_sta *sta,
296 struct mt76_tx_info *tx_info);
298 void (*tx_complete_skb)(struct mt76_dev *dev, enum mt76_txq_id qid,
299 struct mt76_queue_entry *e);
301 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update);
303 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q,
304 struct sk_buff *skb);
306 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q);
308 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,
311 int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif,
312 struct ieee80211_sta *sta);
314 void (*sta_assoc)(struct mt76_dev *dev, struct ieee80211_vif *vif,
315 struct ieee80211_sta *sta);
317 void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif,
318 struct ieee80211_sta *sta);
321 struct mt76_channel_state {
327 struct ieee80211_supported_band sband;
328 struct mt76_channel_state *chan;
331 struct mt76_rate_power {
345 #define MT_VEND_TYPE_EEPROM BIT(31)
346 #define MT_VEND_TYPE_CFG BIT(30)
347 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG)
349 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n))
351 MT_VEND_DEV_MODE = 0x1,
353 MT_VEND_MULTI_WRITE = 0x6,
354 MT_VEND_MULTI_READ = 0x7,
355 MT_VEND_READ_EEPROM = 0x9,
356 MT_VEND_WRITE_FCE = 0x42,
357 MT_VEND_WRITE_CFG = 0x46,
358 MT_VEND_READ_CFG = 0x47,
368 MT_EP_OUT_INBAND_CMD,
377 #define MT_TX_SG_MAX_SIZE 8
378 #define MT_RX_SG_MAX_SIZE 1
379 #define MT_NUM_TX_ENTRIES 256
380 #define MT_NUM_RX_ENTRIES 128
381 #define MCU_RESP_URB_SIZE 1024
383 struct mutex usb_ctrl_mtx;
389 struct tasklet_struct rx_tasklet;
390 struct delayed_work stat_work;
392 u8 out_ep[__MT_EP_OUT_MAX];
393 u8 in_ep[__MT_EP_IN_MAX];
402 struct mt76_reg_pair *rp;
413 wait_queue_head_t wait;
414 struct sk_buff_head res_q;
424 struct ieee80211_hw *hw;
425 struct cfg80211_chan_def chandef;
426 struct ieee80211_channel *main_chan;
433 const struct mt76_bus_ops *bus;
434 const struct mt76_driver_ops *drv;
435 const struct mt76_mcu_ops *mcu_ops;
438 struct net_device napi_dev;
440 struct napi_struct napi[__MT_RXQ_MAX];
441 struct sk_buff_head rx_skb[__MT_RXQ_MAX];
443 struct list_head txwi_cache;
444 struct mt76_sw_queue q_tx[__MT_TXQ_MAX];
445 struct mt76_queue q_rx[__MT_RXQ_MAX];
446 const struct mt76_queue_ops *queue_ops;
449 struct tasklet_struct tx_tasklet;
450 struct napi_struct tx_napi;
451 struct delayed_work mac_work;
453 wait_queue_head_t tx_wait;
454 struct sk_buff_head status_list;
456 unsigned long wcid_mask[MT76_N_WCIDS / BITS_PER_LONG];
458 struct mt76_wcid global_wcid;
459 struct mt76_wcid __rcu *wcid[MT76_N_WCIDS];
461 u8 macaddr[ETH_ALEN];
468 struct tasklet_struct pre_tbtt_tasklet;
472 struct mt76_sband sband_2g;
473 struct mt76_sband sband_5g;
474 struct debugfs_blob_wrapper eeprom;
475 struct debugfs_blob_wrapper otp;
476 struct mt76_hw_cap cap;
478 struct mt76_rate_power rate_power;
482 enum nl80211_dfs_regions region;
486 struct led_classdev led_cdev;
498 struct mt76_mmio mmio;
511 struct mt76_rx_status {
512 struct mt76_wcid *wcid;
514 unsigned long reorder_time;
531 s8 chain_signal[IEEE80211_MAX_CHAINS];
534 #define __mt76_rr(dev, ...) (dev)->bus->rr((dev), __VA_ARGS__)
535 #define __mt76_wr(dev, ...) (dev)->bus->wr((dev), __VA_ARGS__)
536 #define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__)
537 #define __mt76_wr_copy(dev, ...) (dev)->bus->write_copy((dev), __VA_ARGS__)
538 #define __mt76_rr_copy(dev, ...) (dev)->bus->read_copy((dev), __VA_ARGS__)
540 #define __mt76_set(dev, offset, val) __mt76_rmw(dev, offset, 0, val)
541 #define __mt76_clear(dev, offset, val) __mt76_rmw(dev, offset, val, 0)
543 #define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__)
544 #define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__)
545 #define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__)
546 #define mt76_wr_copy(dev, ...) (dev)->mt76.bus->write_copy(&((dev)->mt76), __VA_ARGS__)
547 #define mt76_rr_copy(dev, ...) (dev)->mt76.bus->read_copy(&((dev)->mt76), __VA_ARGS__)
548 #define mt76_wr_rp(dev, ...) (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__)
549 #define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__)
551 #define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__)
552 #define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__)
553 #define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76))
554 #define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev))
556 #define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val)
557 #define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0)
559 #define mt76_get_field(_dev, _reg, _field) \
560 FIELD_GET(_field, mt76_rr(dev, _reg))
562 #define mt76_rmw_field(_dev, _reg, _field, _val) \
563 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
565 #define __mt76_rmw_field(_dev, _reg, _field, _val) \
566 __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
568 #define mt76_hw(dev) (dev)->mt76.hw
570 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
573 #define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__)
575 bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
578 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__)
580 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs);
582 static inline u16 mt76_chip(struct mt76_dev *dev)
584 return dev->rev >> 16;
587 static inline u16 mt76_rev(struct mt76_dev *dev)
589 return dev->rev & 0xffff;
592 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76))
593 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76))
595 #define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76))
596 #define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
597 #define mt76_tx_queue_skb_raw(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb_raw(&((dev)->mt76), __VA_ARGS__)
598 #define mt76_tx_queue_skb(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb(&((dev)->mt76), __VA_ARGS__)
599 #define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
600 #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
601 #define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
603 static inline struct mt76_channel_state *
604 mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c)
606 struct mt76_sband *msband;
609 if (c->band == NL80211_BAND_2GHZ)
610 msband = &dev->sband_2g;
612 msband = &dev->sband_5g;
614 idx = c - &msband->sband.channels[0];
615 return &msband->chan[idx];
618 struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size,
619 const struct ieee80211_ops *ops,
620 const struct mt76_driver_ops *drv_ops);
621 int mt76_register_device(struct mt76_dev *dev, bool vht,
622 struct ieee80211_rate *rates, int n_rates);
623 void mt76_unregister_device(struct mt76_dev *dev);
624 void mt76_free_device(struct mt76_dev *dev);
626 struct dentry *mt76_register_debugfs(struct mt76_dev *dev);
627 void mt76_seq_puts_array(struct seq_file *file, const char *str,
630 int mt76_eeprom_init(struct mt76_dev *dev, int len);
631 void mt76_eeprom_override(struct mt76_dev *dev);
634 mt76_get_txwi_ptr(struct mt76_dev *dev, struct mt76_txwi_cache *t)
636 return (u8 *)t - dev->drv->txwi_size;
639 /* increment with wrap-around */
640 static inline int mt76_incr(int val, int size)
642 return (val + 1) & (size - 1);
645 /* decrement with wrap-around */
646 static inline int mt76_decr(int val, int size)
648 return (val - 1) & (size - 1);
651 u8 mt76_ac_to_hwq(u8 ac);
653 static inline struct ieee80211_txq *
654 mtxq_to_txq(struct mt76_txq *mtxq)
658 return container_of(ptr, struct ieee80211_txq, drv_priv);
661 static inline struct ieee80211_sta *
662 wcid_to_sta(struct mt76_wcid *wcid)
666 if (!wcid || !wcid->sta)
669 return container_of(ptr, struct ieee80211_sta, drv_priv);
672 static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb)
674 BUILD_BUG_ON(sizeof(struct mt76_tx_cb) >
675 sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data));
676 return ((void *)IEEE80211_SKB_CB(skb)->status.status_driver_data);
679 static inline void mt76_insert_hdr_pad(struct sk_buff *skb)
681 int len = ieee80211_get_hdrlen_from_skb(skb);
687 memmove(skb->data, skb->data + 2, len);
690 skb->data[len + 1] = 0;
693 static inline bool mt76_is_skb_pktid(u8 pktid)
695 if (pktid & MT_PACKET_ID_HAS_RATE)
698 return pktid >= MT_PACKET_ID_FIRST;
701 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb);
702 void mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
703 struct mt76_wcid *wcid, struct sk_buff *skb);
704 void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq);
705 void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq);
706 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq);
707 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
709 void mt76_txq_schedule(struct mt76_dev *dev, enum mt76_txq_id qid);
710 void mt76_txq_schedule_all(struct mt76_dev *dev);
711 void mt76_tx_tasklet(unsigned long data);
712 void mt76_release_buffered_frames(struct ieee80211_hw *hw,
713 struct ieee80211_sta *sta,
714 u16 tids, int nframes,
715 enum ieee80211_frame_release_type reason,
717 bool mt76_has_tx_pending(struct mt76_dev *dev);
718 void mt76_set_channel(struct mt76_dev *dev);
719 int mt76_get_survey(struct ieee80211_hw *hw, int idx,
720 struct survey_info *survey);
721 void mt76_set_stream_caps(struct mt76_dev *dev, bool vht);
723 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid,
725 void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid);
727 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid,
728 struct ieee80211_key_conf *key);
730 void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
731 __acquires(&dev->status_list.lock);
732 void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
733 __releases(&dev->status_list.lock);
735 int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
736 struct sk_buff *skb);
737 struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev,
738 struct mt76_wcid *wcid, int pktid,
739 struct sk_buff_head *list);
740 void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
741 struct sk_buff_head *list);
742 void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb);
743 void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid,
745 int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
746 struct ieee80211_sta *sta,
747 enum ieee80211_sta_state old_state,
748 enum ieee80211_sta_state new_state);
749 void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif,
750 struct ieee80211_sta *sta);
752 int mt76_get_min_avg_rssi(struct mt76_dev *dev);
754 int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
757 void mt76_csa_check(struct mt76_dev *dev);
758 void mt76_csa_finish(struct mt76_dev *dev);
760 int mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set);
761 void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id);
762 int mt76_get_rate(struct mt76_dev *dev,
763 struct ieee80211_supported_band *sband,
765 void mt76_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
767 void mt76_sw_scan_complete(struct ieee80211_hw *hw,
768 struct ieee80211_vif *vif);
771 void mt76_tx_free(struct mt76_dev *dev);
772 struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev);
773 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
774 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
775 struct napi_struct *napi);
776 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
777 struct napi_struct *napi);
778 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames);
781 static inline bool mt76u_urb_error(struct urb *urb)
783 return urb->status &&
784 urb->status != -ECONNRESET &&
785 urb->status != -ESHUTDOWN &&
786 urb->status != -ENOENT;
789 /* Map hardware queues to usb endpoints */
790 static inline u8 q2ep(u8 qid)
792 /* TODO: take management packets to queue 5 */
797 mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len,
800 struct usb_device *udev = to_usb_device(dev->dev);
801 struct mt76_usb *usb = &dev->usb;
805 pipe = usb_rcvbulkpipe(udev, usb->in_ep[MT_EP_IN_CMD_RESP]);
807 pipe = usb_sndbulkpipe(udev, usb->out_ep[MT_EP_OUT_INBAND_CMD]);
809 return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout);
812 int mt76u_vendor_request(struct mt76_dev *dev, u8 req,
813 u8 req_type, u16 val, u16 offset,
814 void *buf, size_t len);
815 void mt76u_single_wr(struct mt76_dev *dev, const u8 req,
816 const u16 offset, const u32 val);
817 int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf);
818 int mt76u_alloc_queues(struct mt76_dev *dev);
819 void mt76u_stop_tx(struct mt76_dev *dev);
820 void mt76u_stop_rx(struct mt76_dev *dev);
821 int mt76u_resume_rx(struct mt76_dev *dev);
822 void mt76u_queues_deinit(struct mt76_dev *dev);
825 mt76_mcu_msg_alloc(const void *data, int head_len,
826 int data_len, int tail_len);
827 void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb);
828 struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev,
829 unsigned long expires);
831 void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set);