drivers/net/wireless/marvell/mwifiex/pcie.c

   1 /*
   2  * NXP Wireless LAN device driver: PCIE specific handling
   3  *
   4  * Copyright 2011-2020 NXP
   5  *
   6  * This software file (the "File") is distributed by NXP
   7  * under the terms of the GNU General Public License Version 2, June 1991
   8  * (the "License").  You may use, redistribute and/or modify this File in
   9  * accordance with the terms and conditions of the License, a copy of which
  10  * is available by writing to the Free Software Foundation, Inc.,
  11  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13  *
  14  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
  17  * this warranty disclaimer.
  18  */
  19
  20 #include <linux/firmware.h>
  21
  22 #include "decl.h"
  23 #include "ioctl.h"
  24 #include "util.h"
  25 #include "fw.h"
  26 #include "main.h"
  27 #include "wmm.h"
  28 #include "11n.h"
  29 #include "pcie.h"
  30
  31 #define PCIE_VERSION    "1.0"
  32 #define DRV_NAME        "Marvell mwifiex PCIe"
  33
  34 static struct mwifiex_if_ops pcie_ops;
  35
  36 static const struct mwifiex_pcie_card_reg mwifiex_reg_8766 = {
  37         .cmd_addr_lo = PCIE_SCRATCH_0_REG,
  38         .cmd_addr_hi = PCIE_SCRATCH_1_REG,
  39         .cmd_size = PCIE_SCRATCH_2_REG,
  40         .fw_status = PCIE_SCRATCH_3_REG,
  41         .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
  42         .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
  43         .tx_rdptr = PCIE_SCRATCH_6_REG,
  44         .tx_wrptr = PCIE_SCRATCH_7_REG,
  45         .rx_rdptr = PCIE_SCRATCH_8_REG,
  46         .rx_wrptr = PCIE_SCRATCH_9_REG,
  47         .evt_rdptr = PCIE_SCRATCH_10_REG,
  48         .evt_wrptr = PCIE_SCRATCH_11_REG,
  49         .drv_rdy = PCIE_SCRATCH_12_REG,
  50         .tx_start_ptr = 0,
  51         .tx_mask = MWIFIEX_TXBD_MASK,
  52         .tx_wrap_mask = 0,
  53         .rx_mask = MWIFIEX_RXBD_MASK,
  54         .rx_wrap_mask = 0,
  55         .tx_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
  56         .rx_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
  57         .evt_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
  58         .ring_flag_sop = 0,
  59         .ring_flag_eop = 0,
  60         .ring_flag_xs_sop = 0,
  61         .ring_flag_xs_eop = 0,
  62         .ring_tx_start_ptr = 0,
  63         .pfu_enabled = 0,
  64         .sleep_cookie = 1,
  65         .msix_support = 0,
  66 };
  67
  68 static const struct mwifiex_pcie_card_reg mwifiex_reg_8897 = {
  69         .cmd_addr_lo = PCIE_SCRATCH_0_REG,
  70         .cmd_addr_hi = PCIE_SCRATCH_1_REG,
  71         .cmd_size = PCIE_SCRATCH_2_REG,
  72         .fw_status = PCIE_SCRATCH_3_REG,
  73         .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
  74         .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
  75         .tx_rdptr = PCIE_RD_DATA_PTR_Q0_Q1,
  76         .tx_wrptr = PCIE_WR_DATA_PTR_Q0_Q1,
  77         .rx_rdptr = PCIE_WR_DATA_PTR_Q0_Q1,
  78         .rx_wrptr = PCIE_RD_DATA_PTR_Q0_Q1,
  79         .evt_rdptr = PCIE_SCRATCH_10_REG,
  80         .evt_wrptr = PCIE_SCRATCH_11_REG,
  81         .drv_rdy = PCIE_SCRATCH_12_REG,
  82         .tx_start_ptr = 16,
  83         .tx_mask = 0x03FF0000,
  84         .tx_wrap_mask = 0x07FF0000,
  85         .rx_mask = 0x000003FF,
  86         .rx_wrap_mask = 0x000007FF,
  87         .tx_rollover_ind = MWIFIEX_BD_FLAG_TX_ROLLOVER_IND,
  88         .rx_rollover_ind = MWIFIEX_BD_FLAG_RX_ROLLOVER_IND,
  89         .evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND,
  90         .ring_flag_sop = MWIFIEX_BD_FLAG_SOP,
  91         .ring_flag_eop = MWIFIEX_BD_FLAG_EOP,
  92         .ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP,
  93         .ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP,
  94         .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
  95         .pfu_enabled = 1,
  96         .sleep_cookie = 0,
  97         .fw_dump_ctrl = PCIE_SCRATCH_13_REG,
  98         .fw_dump_start = PCIE_SCRATCH_14_REG,
  99         .fw_dump_end = 0xcff,
 100         .fw_dump_host_ready = 0xee,
 101         .fw_dump_read_done = 0xfe,
 102         .msix_support = 0,
 103 };
 104
 105 static const struct mwifiex_pcie_card_reg mwifiex_reg_8997 = {
 106         .cmd_addr_lo = PCIE_SCRATCH_0_REG,
 107         .cmd_addr_hi = PCIE_SCRATCH_1_REG,
 108         .cmd_size = PCIE_SCRATCH_2_REG,
 109         .fw_status = PCIE_SCRATCH_3_REG,
 110         .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
 111         .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
 112         .tx_rdptr = 0xC1A4,
 113         .tx_wrptr = 0xC174,
 114         .rx_rdptr = 0xC174,
 115         .rx_wrptr = 0xC1A4,
 116         .evt_rdptr = PCIE_SCRATCH_10_REG,
 117         .evt_wrptr = PCIE_SCRATCH_11_REG,
 118         .drv_rdy = PCIE_SCRATCH_12_REG,
 119         .tx_start_ptr = 16,
 120         .tx_mask = 0x0FFF0000,
 121         .tx_wrap_mask = 0x1FFF0000,
 122         .rx_mask = 0x00000FFF,
 123         .rx_wrap_mask = 0x00001FFF,
 124         .tx_rollover_ind = BIT(28),
 125         .rx_rollover_ind = BIT(12),
 126         .evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND,
 127         .ring_flag_sop = MWIFIEX_BD_FLAG_SOP,
 128         .ring_flag_eop = MWIFIEX_BD_FLAG_EOP,
 129         .ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP,
 130         .ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP,
 131         .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
 132         .pfu_enabled = 1,
 133         .sleep_cookie = 0,
 134         .fw_dump_ctrl = PCIE_SCRATCH_13_REG,
 135         .fw_dump_start = PCIE_SCRATCH_14_REG,
 136         .fw_dump_end = 0xcff,
 137         .fw_dump_host_ready = 0xcc,
 138         .fw_dump_read_done = 0xdd,
 139         .msix_support = 0,
 140 };
 141
 142 static struct memory_type_mapping mem_type_mapping_tbl_w8897[] = {
 143         {"ITCM", NULL, 0, 0xF0},
 144         {"DTCM", NULL, 0, 0xF1},
 145         {"SQRAM", NULL, 0, 0xF2},
 146         {"IRAM", NULL, 0, 0xF3},
 147         {"APU", NULL, 0, 0xF4},
 148         {"CIU", NULL, 0, 0xF5},
 149         {"ICU", NULL, 0, 0xF6},
 150         {"MAC", NULL, 0, 0xF7},
 151 };
 152
 153 static struct memory_type_mapping mem_type_mapping_tbl_w8997[] = {
 154         {"DUMP", NULL, 0, 0xDD},
 155 };
 156
 157 static const struct mwifiex_pcie_device mwifiex_pcie8766 = {
 158         .reg            = &mwifiex_reg_8766,
 159         .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
 160         .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
 161         .can_dump_fw = false,
 162         .can_ext_scan = true,
 163 };
 164
 165 static const struct mwifiex_pcie_device mwifiex_pcie8897 = {
 166         .reg            = &mwifiex_reg_8897,
 167         .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
 168         .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
 169         .can_dump_fw = true,
 170         .mem_type_mapping_tbl = mem_type_mapping_tbl_w8897,
 171         .num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl_w8897),
 172         .can_ext_scan = true,
 173 };
 174
 175 static const struct mwifiex_pcie_device mwifiex_pcie8997 = {
 176         .reg            = &mwifiex_reg_8997,
 177         .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
 178         .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
 179         .can_dump_fw = true,
 180         .mem_type_mapping_tbl = mem_type_mapping_tbl_w8997,
 181         .num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl_w8997),
 182         .can_ext_scan = true,
 183 };
 184
 185 static const struct of_device_id mwifiex_pcie_of_match_table[] = {
 186         { .compatible = "pci11ab,2b42" },
 187         { .compatible = "pci1b4b,2b42" },
 188         { }
 189 };
 190
 191 static int mwifiex_pcie_probe_of(struct device *dev)
 192 {
 193         if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) {
 194                 dev_err(dev, "required compatible string missing\n");
 195                 return -EINVAL;
 196         }
 197
 198         return 0;
 199 }
 200
 201 static void mwifiex_pcie_work(struct work_struct *work);
 202
 203 static int
 204 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
 205                        size_t size, int flags)
 206 {
 207         struct pcie_service_card *card = adapter->card;
 208         struct mwifiex_dma_mapping mapping;
 209
 210         mapping.addr = dma_map_single(&card->dev->dev, skb->data, size, flags);
 211         if (dma_mapping_error(&card->dev->dev, mapping.addr)) {
 212                 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
 213                 return -1;
 214         }
 215         mapping.len = size;
 216         mwifiex_store_mapping(skb, &mapping);
 217         return 0;
 218 }
 219
 220 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
 221                                      struct sk_buff *skb, int flags)
 222 {
 223         struct pcie_service_card *card = adapter->card;
 224         struct mwifiex_dma_mapping mapping;
 225
 226         mwifiex_get_mapping(skb, &mapping);
 227         dma_unmap_single(&card->dev->dev, mapping.addr, mapping.len, flags);
 228 }
 229
 230 /*
 231  * This function writes data into PCIE card register.
 232  */
 233 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
 234 {
 235         struct pcie_service_card *card = adapter->card;
 236
 237         iowrite32(data, card->pci_mmap1 + reg);
 238
 239         return 0;
 240 }
 241
 242 /* This function reads data from PCIE card register.
 243  */
 244 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
 245 {
 246         struct pcie_service_card *card = adapter->card;
 247
 248         *data = ioread32(card->pci_mmap1 + reg);
 249         if (*data == 0xffffffff)
 250                 return 0xffffffff;
 251
 252         return 0;
 253 }
 254
 255 /* This function reads u8 data from PCIE card register. */
 256 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
 257                                  int reg, u8 *data)
 258 {
 259         struct pcie_service_card *card = adapter->card;
 260
 261         *data = ioread8(card->pci_mmap1 + reg);
 262
 263         return 0;
 264 }
 265
 266 /*
 267  * This function reads sleep cookie and checks if FW is ready
 268  */
 269 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
 270 {
 271         u32 cookie_value;
 272         struct pcie_service_card *card = adapter->card;
 273         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
 274
 275         if (!reg->sleep_cookie)
 276                 return true;
 277
 278         if (card->sleep_cookie_vbase) {
 279                 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase);
 280                 mwifiex_dbg(adapter, INFO,
 281                             "info: ACCESS_HW: sleep cookie=0x%x\n",
 282                             cookie_value);
 283                 if (cookie_value == FW_AWAKE_COOKIE)
 284                         return true;
 285         }
 286
 287         return false;
 288 }
 289
 290 #ifdef CONFIG_PM_SLEEP
 291 /*
 292  * Kernel needs to suspend all functions separately. Therefore all
 293  * registered functions must have drivers with suspend and resume
 294  * methods. Failing that the kernel simply removes the whole card.
 295  *
 296  * If already not suspended, this function allocates and sends a host
 297  * sleep activate request to the firmware and turns off the traffic.
 298  */
 299 static int mwifiex_pcie_suspend(struct device *dev)
 300 {
 301         struct mwifiex_adapter *adapter;
 302         struct pcie_service_card *card = dev_get_drvdata(dev);
 303
 304
 305         /* Might still be loading firmware */
 306         wait_for_completion(&card->fw_done);
 307
 308         adapter = card->adapter;
 309         if (!adapter) {
 310                 dev_err(dev, "adapter is not valid\n");
 311                 return 0;
 312         }
 313
 314         mwifiex_enable_wake(adapter);
 315
 316         /* Enable the Host Sleep */
 317         if (!mwifiex_enable_hs(adapter)) {
 318                 mwifiex_dbg(adapter, ERROR,
 319                             "cmd: failed to suspend\n");
 320                 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
 321                 mwifiex_disable_wake(adapter);
 322                 return -EFAULT;
 323         }
 324
 325         flush_workqueue(adapter->workqueue);
 326
 327         /* Indicate device suspended */
 328         set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
 329         clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
 330
 331         return 0;
 332 }
 333
 334 /*
 335  * Kernel needs to suspend all functions separately. Therefore all
 336  * registered functions must have drivers with suspend and resume
 337  * methods. Failing that the kernel simply removes the whole card.
 338  *
 339  * If already not resumed, this function turns on the traffic and
 340  * sends a host sleep cancel request to the firmware.
 341  */
 342 static int mwifiex_pcie_resume(struct device *dev)
 343 {
 344         struct mwifiex_adapter *adapter;
 345         struct pcie_service_card *card = dev_get_drvdata(dev);
 346
 347
 348         if (!card->adapter) {
 349                 dev_err(dev, "adapter structure is not valid\n");
 350                 return 0;
 351         }
 352
 353         adapter = card->adapter;
 354
 355         if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
 356                 mwifiex_dbg(adapter, WARN,
 357                             "Device already resumed\n");
 358                 return 0;
 359         }
 360
 361         clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
 362
 363         mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
 364                           MWIFIEX_ASYNC_CMD);
 365         mwifiex_disable_wake(adapter);
 366
 367         return 0;
 368 }
 369 #endif
 370
 371 /*
 372  * This function probes an mwifiex device and registers it. It allocates
 373  * the card structure, enables PCIE function number and initiates the
 374  * device registration and initialization procedure by adding a logical
 375  * interface.
 376  */
 377 static int mwifiex_pcie_probe(struct pci_dev *pdev,
 378                                         const struct pci_device_id *ent)
 379 {
 380         struct pcie_service_card *card;
 381         int ret;
 382
 383         pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
 384                  pdev->vendor, pdev->device, pdev->revision);
 385
 386         card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL);
 387         if (!card)
 388                 return -ENOMEM;
 389
 390         init_completion(&card->fw_done);
 391
 392         card->dev = pdev;
 393
 394         if (ent->driver_data) {
 395                 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
 396                 card->pcie.reg = data->reg;
 397                 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
 398                 card->pcie.tx_buf_size = data->tx_buf_size;
 399                 card->pcie.can_dump_fw = data->can_dump_fw;
 400                 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
 401                 card->pcie.num_mem_types = data->num_mem_types;
 402                 card->pcie.can_ext_scan = data->can_ext_scan;
 403                 INIT_WORK(&card->work, mwifiex_pcie_work);
 404         }
 405
 406         /* device tree node parsing and platform specific configuration*/
 407         if (pdev->dev.of_node) {
 408                 ret = mwifiex_pcie_probe_of(&pdev->dev);
 409                 if (ret)
 410                         return ret;
 411         }
 412
 413         if (mwifiex_add_card(card, &card->fw_done, &pcie_ops,
 414                              MWIFIEX_PCIE, &pdev->dev)) {
 415                 pr_err("%s failed\n", __func__);
 416                 return -1;
 417         }
 418
 419         return 0;
 420 }
 421
 422 /*
 423  * This function removes the interface and frees up the card structure.
 424  */
 425 static void mwifiex_pcie_remove(struct pci_dev *pdev)
 426 {
 427         struct pcie_service_card *card;
 428         struct mwifiex_adapter *adapter;
 429         struct mwifiex_private *priv;
 430         const struct mwifiex_pcie_card_reg *reg;
 431         u32 fw_status;
 432
 433         card = pci_get_drvdata(pdev);
 434
 435         wait_for_completion(&card->fw_done);
 436
 437         adapter = card->adapter;
 438         if (!adapter || !adapter->priv_num)
 439                 return;
 440
 441         reg = card->pcie.reg;
 442         if (reg)
 443                 mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
 444         else
 445                 fw_status = -1;
 446
 447         if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) {
 448                 mwifiex_deauthenticate_all(adapter);
 449
 450                 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
 451
 452                 mwifiex_disable_auto_ds(priv);
 453
 454                 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
 455         }
 456
 457         mwifiex_remove_card(adapter);
 458 }
 459
 460 static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
 461 {
 462         mwifiex_pcie_remove(pdev);
 463
 464         return;
 465 }
 466
 467 static void mwifiex_pcie_coredump(struct device *dev)
 468 {
 469         struct pci_dev *pdev;
 470         struct pcie_service_card *card;
 471
 472         pdev = container_of(dev, struct pci_dev, dev);
 473         card = pci_get_drvdata(pdev);
 474
 475         if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
 476                               &card->work_flags))
 477                 schedule_work(&card->work);
 478 }
 479
 480 static const struct pci_device_id mwifiex_ids[] = {
 481         {
 482                 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
 483                 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
 484                 .driver_data = (unsigned long)&mwifiex_pcie8766,
 485         },
 486         {
 487                 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
 488                 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
 489                 .driver_data = (unsigned long)&mwifiex_pcie8897,
 490         },
 491         {
 492                 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
 493                 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
 494                 .driver_data = (unsigned long)&mwifiex_pcie8997,
 495         },
 496         {
 497                 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
 498                 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
 499                 .driver_data = (unsigned long)&mwifiex_pcie8997,
 500         },
 501         {},
 502 };
 503
 504 MODULE_DEVICE_TABLE(pci, mwifiex_ids);
 505
 506 /*
 507  * Cleanup all software without cleaning anything related to PCIe and HW.
 508  */
 509 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev)
 510 {
 511         struct pcie_service_card *card = pci_get_drvdata(pdev);
 512         struct mwifiex_adapter *adapter = card->adapter;
 513
 514         if (!adapter) {
 515                 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
 516                         __func__);
 517                 return;
 518         }
 519
 520         mwifiex_dbg(adapter, INFO,
 521                     "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n",
 522                     __func__, pdev->vendor, pdev->device, pdev->revision);
 523
 524         mwifiex_shutdown_sw(adapter);
 525         clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
 526         clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
 527         mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
 528
 529         card->pci_reset_ongoing = true;
 530 }
 531
 532 /*
 533  * Kernel stores and restores PCIe function context before and after performing
 534  * FLR respectively. Reconfigure the software and firmware including firmware
 535  * redownload.
 536  */
 537 static void mwifiex_pcie_reset_done(struct pci_dev *pdev)
 538 {
 539         struct pcie_service_card *card = pci_get_drvdata(pdev);
 540         struct mwifiex_adapter *adapter = card->adapter;
 541         int ret;
 542
 543         if (!adapter) {
 544                 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
 545                         __func__);
 546                 return;
 547         }
 548
 549         mwifiex_dbg(adapter, INFO,
 550                     "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n",
 551                     __func__, pdev->vendor, pdev->device, pdev->revision);
 552
 553         ret = mwifiex_reinit_sw(adapter);
 554         if (ret)
 555                 dev_err(&pdev->dev, "reinit failed: %d\n", ret);
 556         else
 557                 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
 558
 559         card->pci_reset_ongoing = false;
 560 }
 561
 562 static const struct pci_error_handlers mwifiex_pcie_err_handler = {
 563         .reset_prepare          = mwifiex_pcie_reset_prepare,
 564         .reset_done             = mwifiex_pcie_reset_done,
 565 };
 566
 567 #ifdef CONFIG_PM_SLEEP
 568 /* Power Management Hooks */
 569 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
 570                                 mwifiex_pcie_resume);
 571 #endif
 572
 573 /* PCI Device Driver */
 574 static struct pci_driver mwifiex_pcie = {
 575         .name     = "mwifiex_pcie",
 576         .id_table = mwifiex_ids,
 577         .probe    = mwifiex_pcie_probe,
 578         .remove   = mwifiex_pcie_remove,
 579         .driver   = {
 580                 .coredump = mwifiex_pcie_coredump,
 581 #ifdef CONFIG_PM_SLEEP
 582                 .pm = &mwifiex_pcie_pm_ops,
 583 #endif
 584         },
 585         .shutdown = mwifiex_pcie_shutdown,
 586         .err_handler = &mwifiex_pcie_err_handler,
 587 };
 588
 589 /*
 590  * This function adds delay loop to ensure FW is awake before proceeding.
 591  */
 592 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
 593 {
 594         int i = 0;
 595
 596         while (mwifiex_pcie_ok_to_access_hw(adapter)) {
 597                 i++;
 598                 usleep_range(10, 20);
 599                 /* 50ms max wait */
 600                 if (i == 5000)
 601                         break;
 602         }
 603
 604         return;
 605 }
 606
 607 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
 608                                            u32 max_delay_loop_cnt)
 609 {
 610         struct pcie_service_card *card = adapter->card;
 611         u8 *buffer;
 612         u32 sleep_cookie, count;
 613         struct sk_buff *cmdrsp = card->cmdrsp_buf;
 614
 615         for (count = 0; count < max_delay_loop_cnt; count++) {
 616                 dma_sync_single_for_cpu(&card->dev->dev,
 617                                         MWIFIEX_SKB_DMA_ADDR(cmdrsp),
 618                                         sizeof(sleep_cookie), DMA_FROM_DEVICE);
 619                 buffer = cmdrsp->data;
 620                 sleep_cookie = get_unaligned_le32(buffer);
 621
 622                 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
 623                         mwifiex_dbg(adapter, INFO,
 624                                     "sleep cookie found at count %d\n", count);
 625                         break;
 626                 }
 627                 dma_sync_single_for_device(&card->dev->dev,
 628                                            MWIFIEX_SKB_DMA_ADDR(cmdrsp),
 629                                            sizeof(sleep_cookie),
 630                                            DMA_FROM_DEVICE);
 631                 usleep_range(20, 30);
 632         }
 633
 634         if (count >= max_delay_loop_cnt)
 635                 mwifiex_dbg(adapter, INFO,
 636                             "max count reached while accessing sleep cookie\n");
 637 }
 638
 639 /* This function wakes up the card by reading fw_status register. */
 640 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
 641 {
 642         struct pcie_service_card *card = adapter->card;
 643         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
 644
 645         mwifiex_dbg(adapter, EVENT,
 646                     "event: Wakeup device...\n");
 647
 648         if (reg->sleep_cookie)
 649                 mwifiex_pcie_dev_wakeup_delay(adapter);
 650
 651         /* Accessing fw_status register will wakeup device */
 652         if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
 653                 mwifiex_dbg(adapter, ERROR,
 654                             "Writing fw_status register failed\n");
 655                 return -1;
 656         }
 657
 658         if (reg->sleep_cookie) {
 659                 mwifiex_pcie_dev_wakeup_delay(adapter);
 660                 mwifiex_dbg(adapter, INFO,
 661                             "PCIE wakeup: Setting PS_STATE_AWAKE\n");
 662                 adapter->ps_state = PS_STATE_AWAKE;
 663         }
 664
 665         return 0;
 666 }
 667
 668 /*
 669  * This function is called after the card has woken up.
 670  *
 671  * The card configuration register is reset.
 672  */
 673 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
 674 {
 675         mwifiex_dbg(adapter, CMD,
 676                     "cmd: Wakeup device completed\n");
 677
 678         return 0;
 679 }
 680
 681 /*
 682  * This function disables the host interrupt.
 683  *
 684  * The host interrupt mask is read, the disable bit is reset and
 685  * written back to the card host interrupt mask register.
 686  */
 687 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
 688 {
 689         if (mwifiex_pcie_ok_to_access_hw(adapter)) {
 690                 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
 691                                       0x00000000)) {
 692                         mwifiex_dbg(adapter, ERROR,
 693                                     "Disable host interrupt failed\n");
 694                         return -1;
 695                 }
 696         }
 697
 698         atomic_set(&adapter->tx_hw_pending, 0);
 699         return 0;
 700 }
 701
 702 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
 703 {
 704         WARN_ON(mwifiex_pcie_disable_host_int(adapter));
 705 }
 706
 707 /*
 708  * This function enables the host interrupt.
 709  *
 710  * The host interrupt enable mask is written to the card
 711  * host interrupt mask register.
 712  */
 713 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
 714 {
 715         if (mwifiex_pcie_ok_to_access_hw(adapter)) {
 716                 /* Simply write the mask to the register */
 717                 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
 718                                       HOST_INTR_MASK)) {
 719                         mwifiex_dbg(adapter, ERROR,
 720                                     "Enable host interrupt failed\n");
 721                         return -1;
 722                 }
 723         }
 724
 725         return 0;
 726 }
 727
 728 /*
 729  * This function initializes TX buffer ring descriptors
 730  */
 731 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
 732 {
 733         struct pcie_service_card *card = adapter->card;
 734         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
 735         struct mwifiex_pcie_buf_desc *desc;
 736         struct mwifiex_pfu_buf_desc *desc2;
 737         int i;
 738
 739         for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
 740                 card->tx_buf_list[i] = NULL;
 741                 if (reg->pfu_enabled) {
 742                         card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
 743                                              (sizeof(*desc2) * i);
 744                         desc2 = card->txbd_ring[i];
 745                         memset(desc2, 0, sizeof(*desc2));
 746                 } else {
 747                         card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
 748                                              (sizeof(*desc) * i);
 749                         desc = card->txbd_ring[i];
 750                         memset(desc, 0, sizeof(*desc));
 751                 }
 752         }
 753
 754         return 0;
 755 }
 756
 757 /* This function initializes RX buffer ring descriptors. Each SKB is allocated
 758  * here and after mapping PCI memory, its physical address is assigned to
 759  * PCIE Rx buffer descriptor's physical address.
 760  */
 761 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
 762 {
 763         struct pcie_service_card *card = adapter->card;
 764         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
 765         struct sk_buff *skb;
 766         struct mwifiex_pcie_buf_desc *desc;
 767         struct mwifiex_pfu_buf_desc *desc2;
 768         dma_addr_t buf_pa;
 769         int i;
 770
 771         for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
 772                 /* Allocate skb here so that firmware can DMA data from it */
 773                 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
 774                                                   GFP_KERNEL);
 775                 if (!skb) {
 776                         mwifiex_dbg(adapter, ERROR,
 777                                     "Unable to allocate skb for RX ring.\n");
 778                         kfree(card->rxbd_ring_vbase);
 779                         return -ENOMEM;
 780                 }
 781
 782                 if (mwifiex_map_pci_memory(adapter, skb,
 783                                            MWIFIEX_RX_DATA_BUF_SIZE,
 784                                            DMA_FROM_DEVICE))
 785                         return -1;
 786
 787                 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
 788
 789                 mwifiex_dbg(adapter, INFO,
 790                             "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
 791                             skb, skb->len, skb->data, (u32)buf_pa,
 792                             (u32)((u64)buf_pa >> 32));
 793
 794                 card->rx_buf_list[i] = skb;
 795                 if (reg->pfu_enabled) {
 796                         card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
 797                                              (sizeof(*desc2) * i);
 798                         desc2 = card->rxbd_ring[i];
 799                         desc2->paddr = buf_pa;
 800                         desc2->len = (u16)skb->len;
 801                         desc2->frag_len = (u16)skb->len;
 802                         desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
 803                         desc2->offset = 0;
 804                 } else {
 805                         card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
 806                                              (sizeof(*desc) * i));
 807                         desc = card->rxbd_ring[i];
 808                         desc->paddr = buf_pa;
 809                         desc->len = (u16)skb->len;
 810                         desc->flags = 0;
 811                 }
 812         }
 813
 814         return 0;
 815 }
 816
 817 /* This function initializes event buffer ring descriptors. Each SKB is
 818  * allocated here and after mapping PCI memory, its physical address is assigned
 819  * to PCIE Rx buffer descriptor's physical address
 820  */
 821 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
 822 {
 823         struct pcie_service_card *card = adapter->card;
 824         struct mwifiex_evt_buf_desc *desc;
 825         struct sk_buff *skb;
 826         dma_addr_t buf_pa;
 827         int i;
 828
 829         for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
 830                 /* Allocate skb here so that firmware can DMA data from it */
 831                 skb = dev_alloc_skb(MAX_EVENT_SIZE);
 832                 if (!skb) {
 833                         mwifiex_dbg(adapter, ERROR,
 834                                     "Unable to allocate skb for EVENT buf.\n");
 835                         kfree(card->evtbd_ring_vbase);
 836                         return -ENOMEM;
 837                 }
 838                 skb_put(skb, MAX_EVENT_SIZE);
 839
 840                 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
 841                                            DMA_FROM_DEVICE)) {
 842                         kfree_skb(skb);
 843                         kfree(card->evtbd_ring_vbase);
 844                         return -1;
 845                 }
 846
 847                 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
 848
 849                 mwifiex_dbg(adapter, EVENT,
 850                             "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
 851                             skb, skb->len, skb->data, (u32)buf_pa,
 852                             (u32)((u64)buf_pa >> 32));
 853
 854                 card->evt_buf_list[i] = skb;
 855                 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
 856                                       (sizeof(*desc) * i));
 857                 desc = card->evtbd_ring[i];
 858                 desc->paddr = buf_pa;
 859                 desc->len = (u16)skb->len;
 860                 desc->flags = 0;
 861         }
 862
 863         return 0;
 864 }
 865
 866 /* This function cleans up TX buffer rings. If any of the buffer list has valid
 867  * SKB address, associated SKB is freed.
 868  */
 869 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
 870 {
 871         struct pcie_service_card *card = adapter->card;
 872         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
 873         struct sk_buff *skb;
 874         struct mwifiex_pcie_buf_desc *desc;
 875         struct mwifiex_pfu_buf_desc *desc2;
 876         int i;
 877
 878         for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
 879                 if (reg->pfu_enabled) {
 880                         desc2 = card->txbd_ring[i];
 881                         if (card->tx_buf_list[i]) {
 882                                 skb = card->tx_buf_list[i];
 883                                 mwifiex_unmap_pci_memory(adapter, skb,
 884                                                          DMA_TO_DEVICE);
 885                                 dev_kfree_skb_any(skb);
 886                         }
 887                         memset(desc2, 0, sizeof(*desc2));
 888                 } else {
 889                         desc = card->txbd_ring[i];
 890                         if (card->tx_buf_list[i]) {
 891                                 skb = card->tx_buf_list[i];
 892                                 mwifiex_unmap_pci_memory(adapter, skb,
 893                                                          DMA_TO_DEVICE);
 894                                 dev_kfree_skb_any(skb);
 895                         }
 896                         memset(desc, 0, sizeof(*desc));
 897                 }
 898                 card->tx_buf_list[i] = NULL;
 899         }
 900
 901         atomic_set(&adapter->tx_hw_pending, 0);
 902         return;
 903 }
 904
 905 /* This function cleans up RX buffer rings. If any of the buffer list has valid
 906  * SKB address, associated SKB is freed.
 907  */
 908 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
 909 {
 910         struct pcie_service_card *card = adapter->card;
 911         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
 912         struct mwifiex_pcie_buf_desc *desc;
 913         struct mwifiex_pfu_buf_desc *desc2;
 914         struct sk_buff *skb;
 915         int i;
 916
 917         for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
 918                 if (reg->pfu_enabled) {
 919                         desc2 = card->rxbd_ring[i];
 920                         if (card->rx_buf_list[i]) {
 921                                 skb = card->rx_buf_list[i];
 922                                 mwifiex_unmap_pci_memory(adapter, skb,
 923                                                          DMA_FROM_DEVICE);
 924                                 dev_kfree_skb_any(skb);
 925                         }
 926                         memset(desc2, 0, sizeof(*desc2));
 927                 } else {
 928                         desc = card->rxbd_ring[i];
 929                         if (card->rx_buf_list[i]) {
 930                                 skb = card->rx_buf_list[i];
 931                                 mwifiex_unmap_pci_memory(adapter, skb,
 932                                                          DMA_FROM_DEVICE);
 933                                 dev_kfree_skb_any(skb);
 934                         }
 935                         memset(desc, 0, sizeof(*desc));
 936                 }
 937                 card->rx_buf_list[i] = NULL;
 938         }
 939
 940         return;
 941 }
 942
 943 /* This function cleans up event buffer rings. If any of the buffer list has
 944  * valid SKB address, associated SKB is freed.
 945  */
 946 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
 947 {
 948         struct pcie_service_card *card = adapter->card;
 949         struct mwifiex_evt_buf_desc *desc;
 950         struct sk_buff *skb;
 951         int i;
 952
 953         for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
 954                 desc = card->evtbd_ring[i];
 955                 if (card->evt_buf_list[i]) {
 956                         skb = card->evt_buf_list[i];
 957                         mwifiex_unmap_pci_memory(adapter, skb,
 958                                                  DMA_FROM_DEVICE);
 959                         dev_kfree_skb_any(skb);
 960                 }
 961                 card->evt_buf_list[i] = NULL;
 962                 memset(desc, 0, sizeof(*desc));
 963         }
 964
 965         return;
 966 }
 967
 968 /* This function creates buffer descriptor ring for TX
 969  */
 970 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
 971 {
 972         struct pcie_service_card *card = adapter->card;
 973         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
 974
 975         /*
 976          * driver maintaines the write pointer and firmware maintaines the read
 977          * pointer. The write pointer starts at 0 (zero) while the read pointer
 978          * starts at zero with rollover bit set
 979          */
 980         card->txbd_wrptr = 0;
 981
 982         if (reg->pfu_enabled)
 983                 card->txbd_rdptr = 0;
 984         else
 985                 card->txbd_rdptr |= reg->tx_rollover_ind;
 986
 987         /* allocate shared memory for the BD ring and divide the same in to
 988            several descriptors */
 989         if (reg->pfu_enabled)
 990                 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
 991                                        MWIFIEX_MAX_TXRX_BD;
 992         else
 993                 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
 994                                        MWIFIEX_MAX_TXRX_BD;
 995
 996         mwifiex_dbg(adapter, INFO,
 997                     "info: txbd_ring: Allocating %d bytes\n",
 998                     card->txbd_ring_size);
 999         card->txbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1000                                                    card->txbd_ring_size,
1001                                                    &card->txbd_ring_pbase,
1002                                                    GFP_KERNEL);
1003         if (!card->txbd_ring_vbase) {
1004                 mwifiex_dbg(adapter, ERROR,
1005                             "allocate coherent memory (%d bytes) failed!\n",
1006                             card->txbd_ring_size);
1007                 return -ENOMEM;
1008         }
1009
1010         mwifiex_dbg(adapter, DATA,
1011                     "info: txbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
1012                     card->txbd_ring_vbase, (u32)card->txbd_ring_pbase,
1013                     (u32)((u64)card->txbd_ring_pbase >> 32),
1014                     card->txbd_ring_size);
1015
1016         return mwifiex_init_txq_ring(adapter);
1017 }
1018
1019 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
1020 {
1021         struct pcie_service_card *card = adapter->card;
1022         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1023
1024         mwifiex_cleanup_txq_ring(adapter);
1025
1026         if (card->txbd_ring_vbase)
1027                 dma_free_coherent(&card->dev->dev, card->txbd_ring_size,
1028                                   card->txbd_ring_vbase,
1029                                   card->txbd_ring_pbase);
1030         card->txbd_ring_size = 0;
1031         card->txbd_wrptr = 0;
1032         card->txbd_rdptr = 0 | reg->tx_rollover_ind;
1033         card->txbd_ring_vbase = NULL;
1034         card->txbd_ring_pbase = 0;
1035
1036         return 0;
1037 }
1038
1039 /*
1040  * This function creates buffer descriptor ring for RX
1041  */
1042 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
1043 {
1044         struct pcie_service_card *card = adapter->card;
1045         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1046
1047         /*
1048          * driver maintaines the read pointer and firmware maintaines the write
1049          * pointer. The write pointer starts at 0 (zero) while the read pointer
1050          * starts at zero with rollover bit set
1051          */
1052         card->rxbd_wrptr = 0;
1053         card->rxbd_rdptr = reg->rx_rollover_ind;
1054
1055         if (reg->pfu_enabled)
1056                 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
1057                                        MWIFIEX_MAX_TXRX_BD;
1058         else
1059                 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
1060                                        MWIFIEX_MAX_TXRX_BD;
1061
1062         mwifiex_dbg(adapter, INFO,
1063                     "info: rxbd_ring: Allocating %d bytes\n",
1064                     card->rxbd_ring_size);
1065         card->rxbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1066                                                    card->rxbd_ring_size,
1067                                                    &card->rxbd_ring_pbase,
1068                                                    GFP_KERNEL);
1069         if (!card->rxbd_ring_vbase) {
1070                 mwifiex_dbg(adapter, ERROR,
1071                             "allocate coherent memory (%d bytes) failed!\n",
1072                             card->rxbd_ring_size);
1073                 return -ENOMEM;
1074         }
1075
1076         mwifiex_dbg(adapter, DATA,
1077                     "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
1078                     card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
1079                     (u32)((u64)card->rxbd_ring_pbase >> 32),
1080                     card->rxbd_ring_size);
1081
1082         return mwifiex_init_rxq_ring(adapter);
1083 }
1084
1085 /*
1086  * This function deletes Buffer descriptor ring for RX
1087  */
1088 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
1089 {
1090         struct pcie_service_card *card = adapter->card;
1091         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1092
1093         mwifiex_cleanup_rxq_ring(adapter);
1094
1095         if (card->rxbd_ring_vbase)
1096                 dma_free_coherent(&card->dev->dev, card->rxbd_ring_size,
1097                                   card->rxbd_ring_vbase,
1098                                   card->rxbd_ring_pbase);
1099         card->rxbd_ring_size = 0;
1100         card->rxbd_wrptr = 0;
1101         card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
1102         card->rxbd_ring_vbase = NULL;
1103         card->rxbd_ring_pbase = 0;
1104
1105         return 0;
1106 }
1107
1108 /*
1109  * This function creates buffer descriptor ring for Events
1110  */
1111 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
1112 {
1113         struct pcie_service_card *card = adapter->card;
1114         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1115
1116         /*
1117          * driver maintaines the read pointer and firmware maintaines the write
1118          * pointer. The write pointer starts at 0 (zero) while the read pointer
1119          * starts at zero with rollover bit set
1120          */
1121         card->evtbd_wrptr = 0;
1122         card->evtbd_rdptr = reg->evt_rollover_ind;
1123
1124         card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
1125                                 MWIFIEX_MAX_EVT_BD;
1126
1127         mwifiex_dbg(adapter, INFO,
1128                     "info: evtbd_ring: Allocating %d bytes\n",
1129                     card->evtbd_ring_size);
1130         card->evtbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1131                                                     card->evtbd_ring_size,
1132                                                     &card->evtbd_ring_pbase,
1133                                                     GFP_KERNEL);
1134         if (!card->evtbd_ring_vbase) {
1135                 mwifiex_dbg(adapter, ERROR,
1136                             "allocate coherent memory (%d bytes) failed!\n",
1137                             card->evtbd_ring_size);
1138                 return -ENOMEM;
1139         }
1140
1141         mwifiex_dbg(adapter, EVENT,
1142                     "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
1143                     card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
1144                     (u32)((u64)card->evtbd_ring_pbase >> 32),
1145                     card->evtbd_ring_size);
1146
1147         return mwifiex_pcie_init_evt_ring(adapter);
1148 }
1149
1150 /*
1151  * This function deletes Buffer descriptor ring for Events
1152  */
1153 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
1154 {
1155         struct pcie_service_card *card = adapter->card;
1156         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1157
1158         mwifiex_cleanup_evt_ring(adapter);
1159
1160         if (card->evtbd_ring_vbase)
1161                 dma_free_coherent(&card->dev->dev, card->evtbd_ring_size,
1162                                   card->evtbd_ring_vbase,
1163                                   card->evtbd_ring_pbase);
1164         card->evtbd_wrptr = 0;
1165         card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
1166         card->evtbd_ring_size = 0;
1167         card->evtbd_ring_vbase = NULL;
1168         card->evtbd_ring_pbase = 0;
1169
1170         return 0;
1171 }
1172
1173 /*
1174  * This function allocates a buffer for CMDRSP
1175  */
1176 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
1177 {
1178         struct pcie_service_card *card = adapter->card;
1179         struct sk_buff *skb;
1180
1181         /* Allocate memory for receiving command response data */
1182         skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1183         if (!skb) {
1184                 mwifiex_dbg(adapter, ERROR,
1185                             "Unable to allocate skb for command response data.\n");
1186                 return -ENOMEM;
1187         }
1188         skb_put(skb, MWIFIEX_UPLD_SIZE);
1189         if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1190                                    DMA_FROM_DEVICE)) {
1191                 kfree_skb(skb);
1192                 return -1;
1193         }
1194
1195         card->cmdrsp_buf = skb;
1196
1197         return 0;
1198 }
1199
1200 /*
1201  * This function deletes a buffer for CMDRSP
1202  */
1203 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
1204 {
1205         struct pcie_service_card *card;
1206
1207         if (!adapter)
1208                 return 0;
1209
1210         card = adapter->card;
1211
1212         if (card && card->cmdrsp_buf) {
1213                 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
1214                                          DMA_FROM_DEVICE);
1215                 dev_kfree_skb_any(card->cmdrsp_buf);
1216                 card->cmdrsp_buf = NULL;
1217         }
1218
1219         if (card && card->cmd_buf) {
1220                 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1221                                          DMA_TO_DEVICE);
1222                 dev_kfree_skb_any(card->cmd_buf);
1223                 card->cmd_buf = NULL;
1224         }
1225         return 0;
1226 }
1227
1228 /*
1229  * This function allocates a buffer for sleep cookie
1230  */
1231 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1232 {
1233         struct pcie_service_card *card = adapter->card;
1234         u32 tmp;
1235
1236         card->sleep_cookie_vbase = dma_alloc_coherent(&card->dev->dev,
1237                                                       sizeof(u32),
1238                                                       &card->sleep_cookie_pbase,
1239                                                       GFP_KERNEL);
1240         if (!card->sleep_cookie_vbase) {
1241                 mwifiex_dbg(adapter, ERROR,
1242                             "dma_alloc_coherent failed!\n");
1243                 return -ENOMEM;
1244         }
1245         /* Init val of Sleep Cookie */
1246         tmp = FW_AWAKE_COOKIE;
1247         put_unaligned(tmp, card->sleep_cookie_vbase);
1248
1249         mwifiex_dbg(adapter, INFO,
1250                     "alloc_scook: sleep cookie=0x%x\n",
1251                     get_unaligned(card->sleep_cookie_vbase));
1252
1253         return 0;
1254 }
1255
1256 /*
1257  * This function deletes buffer for sleep cookie
1258  */
1259 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1260 {
1261         struct pcie_service_card *card;
1262
1263         if (!adapter)
1264                 return 0;
1265
1266         card = adapter->card;
1267
1268         if (card && card->sleep_cookie_vbase) {
1269                 dma_free_coherent(&card->dev->dev, sizeof(u32),
1270                                   card->sleep_cookie_vbase,
1271                                   card->sleep_cookie_pbase);
1272                 card->sleep_cookie_vbase = NULL;
1273         }
1274
1275         return 0;
1276 }
1277
1278 /* This function flushes the TX buffer descriptor ring
1279  * This function defined as handler is also called while cleaning TXRX
1280  * during disconnect/ bss stop.
1281  */
1282 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1283 {
1284         struct pcie_service_card *card = adapter->card;
1285
1286         if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1287                 card->txbd_flush = 1;
1288                 /* write pointer already set at last send
1289                  * send dnld-rdy intr again, wait for completion.
1290                  */
1291                 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1292                                       CPU_INTR_DNLD_RDY)) {
1293                         mwifiex_dbg(adapter, ERROR,
1294                                     "failed to assert dnld-rdy interrupt.\n");
1295                         return -1;
1296                 }
1297         }
1298         return 0;
1299 }
1300
1301 /*
1302  * This function unmaps and frees downloaded data buffer
1303  */
1304 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1305 {
1306         struct sk_buff *skb;
1307         u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1308         struct mwifiex_pcie_buf_desc *desc;
1309         struct mwifiex_pfu_buf_desc *desc2;
1310         struct pcie_service_card *card = adapter->card;
1311         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1312
1313         if (!mwifiex_pcie_ok_to_access_hw(adapter))
1314                 mwifiex_pm_wakeup_card(adapter);
1315
1316         /* Read the TX ring read pointer set by firmware */
1317         if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1318                 mwifiex_dbg(adapter, ERROR,
1319                             "SEND COMP: failed to read reg->tx_rdptr\n");
1320                 return -1;
1321         }
1322
1323         mwifiex_dbg(adapter, DATA,
1324                     "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1325                     card->txbd_rdptr, rdptr);
1326
1327         num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1328         /* free from previous txbd_rdptr to current txbd_rdptr */
1329         while (((card->txbd_rdptr & reg->tx_mask) !=
1330                 (rdptr & reg->tx_mask)) ||
1331                ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1332                 (rdptr & reg->tx_rollover_ind))) {
1333                 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1334                             reg->tx_start_ptr;
1335
1336                 skb = card->tx_buf_list[wrdoneidx];
1337
1338                 if (skb) {
1339                         mwifiex_dbg(adapter, DATA,
1340                                     "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1341                                     skb, wrdoneidx);
1342                         mwifiex_unmap_pci_memory(adapter, skb,
1343                                                  DMA_TO_DEVICE);
1344
1345                         unmap_count++;
1346
1347                         if (card->txbd_flush)
1348                                 mwifiex_write_data_complete(adapter, skb, 0,
1349                                                             -1);
1350                         else
1351                                 mwifiex_write_data_complete(adapter, skb, 0, 0);
1352                         atomic_dec(&adapter->tx_hw_pending);
1353                 }
1354
1355                 card->tx_buf_list[wrdoneidx] = NULL;
1356
1357                 if (reg->pfu_enabled) {
1358                         desc2 = card->txbd_ring[wrdoneidx];
1359                         memset(desc2, 0, sizeof(*desc2));
1360                 } else {
1361                         desc = card->txbd_ring[wrdoneidx];
1362                         memset(desc, 0, sizeof(*desc));
1363                 }
1364                 switch (card->dev->device) {
1365                 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1366                         card->txbd_rdptr++;
1367                         break;
1368                 case PCIE_DEVICE_ID_MARVELL_88W8897:
1369                 case PCIE_DEVICE_ID_MARVELL_88W8997:
1370                         card->txbd_rdptr += reg->ring_tx_start_ptr;
1371                         break;
1372                 }
1373
1374
1375                 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1376                         card->txbd_rdptr = ((card->txbd_rdptr &
1377                                              reg->tx_rollover_ind) ^
1378                                              reg->tx_rollover_ind);
1379         }
1380
1381         if (unmap_count)
1382                 adapter->data_sent = false;
1383
1384         if (card->txbd_flush) {
1385                 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1386                         card->txbd_flush = 0;
1387                 else
1388                         mwifiex_clean_pcie_ring_buf(adapter);
1389         }
1390
1391         return 0;
1392 }
1393
1394 /* This function sends data buffer to device. First 4 bytes of payload
1395  * are filled with payload length and payload type. Then this payload
1396  * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1397  * Download ready interrupt to FW is deffered if Tx ring is not full and
1398  * additional payload can be accomodated.
1399  * Caller must ensure tx_param parameter to this function is not NULL.
1400  */
1401 static int
1402 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1403                        struct mwifiex_tx_param *tx_param)
1404 {
1405         struct pcie_service_card *card = adapter->card;
1406         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1407         u32 wrindx, num_tx_buffs, rx_val;
1408         int ret;
1409         dma_addr_t buf_pa;
1410         struct mwifiex_pcie_buf_desc *desc = NULL;
1411         struct mwifiex_pfu_buf_desc *desc2 = NULL;
1412
1413         if (!(skb->data && skb->len)) {
1414                 mwifiex_dbg(adapter, ERROR,
1415                             "%s(): invalid parameter <%p, %#x>\n",
1416                             __func__, skb->data, skb->len);
1417                 return -1;
1418         }
1419
1420         if (!mwifiex_pcie_ok_to_access_hw(adapter))
1421                 mwifiex_pm_wakeup_card(adapter);
1422
1423         num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1424         mwifiex_dbg(adapter, DATA,
1425                     "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1426                 card->txbd_rdptr, card->txbd_wrptr);
1427         if (mwifiex_pcie_txbd_not_full(card)) {
1428                 u8 *payload;
1429
1430                 adapter->data_sent = true;
1431                 payload = skb->data;
1432                 put_unaligned_le16((u16)skb->len, payload + 0);
1433                 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2);
1434
1435                 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1436                                            DMA_TO_DEVICE))
1437                         return -1;
1438
1439                 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1440                 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1441                 card->tx_buf_list[wrindx] = skb;
1442                 atomic_inc(&adapter->tx_hw_pending);
1443
1444                 if (reg->pfu_enabled) {
1445                         desc2 = card->txbd_ring[wrindx];
1446                         desc2->paddr = buf_pa;
1447                         desc2->len = (u16)skb->len;
1448                         desc2->frag_len = (u16)skb->len;
1449                         desc2->offset = 0;
1450                         desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1451                                          MWIFIEX_BD_FLAG_LAST_DESC;
1452                 } else {
1453                         desc = card->txbd_ring[wrindx];
1454                         desc->paddr = buf_pa;
1455                         desc->len = (u16)skb->len;
1456                         desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1457                                       MWIFIEX_BD_FLAG_LAST_DESC;
1458                 }
1459
1460                 switch (card->dev->device) {
1461                 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1462                         card->txbd_wrptr++;
1463                         break;
1464                 case PCIE_DEVICE_ID_MARVELL_88W8897:
1465                 case PCIE_DEVICE_ID_MARVELL_88W8997:
1466                         card->txbd_wrptr += reg->ring_tx_start_ptr;
1467                         break;
1468                 }
1469
1470                 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1471                         card->txbd_wrptr = ((card->txbd_wrptr &
1472                                                 reg->tx_rollover_ind) ^
1473                                                 reg->tx_rollover_ind);
1474
1475                 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1476                 /* Write the TX ring write pointer in to reg->tx_wrptr */
1477                 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1478                                       card->txbd_wrptr | rx_val)) {
1479                         mwifiex_dbg(adapter, ERROR,
1480                                     "SEND DATA: failed to write reg->tx_wrptr\n");
1481                         ret = -1;
1482                         goto done_unmap;
1483                 }
1484                 if ((mwifiex_pcie_txbd_not_full(card)) &&
1485                     tx_param->next_pkt_len) {
1486                         /* have more packets and TxBD still can hold more */
1487                         mwifiex_dbg(adapter, DATA,
1488                                     "SEND DATA: delay dnld-rdy interrupt.\n");
1489                         adapter->data_sent = false;
1490                 } else {
1491                         /* Send the TX ready interrupt */
1492                         if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1493                                               CPU_INTR_DNLD_RDY)) {
1494                                 mwifiex_dbg(adapter, ERROR,
1495                                             "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1496                                 ret = -1;
1497                                 goto done_unmap;
1498                         }
1499                 }
1500                 mwifiex_dbg(adapter, DATA,
1501                             "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1502                             "%#x> and sent packet to firmware successfully\n",
1503                             card->txbd_rdptr, card->txbd_wrptr);
1504         } else {
1505                 mwifiex_dbg(adapter, DATA,
1506                             "info: TX Ring full, can't send packets to fw\n");
1507                 adapter->data_sent = true;
1508                 /* Send the TX ready interrupt */
1509                 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1510                                       CPU_INTR_DNLD_RDY))
1511                         mwifiex_dbg(adapter, ERROR,
1512                                     "SEND DATA: failed to assert door-bell intr\n");
1513                 return -EBUSY;
1514         }
1515
1516         return -EINPROGRESS;
1517 done_unmap:
1518         mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1519         card->tx_buf_list[wrindx] = NULL;
1520         atomic_dec(&adapter->tx_hw_pending);
1521         if (reg->pfu_enabled)
1522                 memset(desc2, 0, sizeof(*desc2));
1523         else
1524                 memset(desc, 0, sizeof(*desc));
1525
1526         return ret;
1527 }
1528
1529 /*
1530  * This function handles received buffer ring and
1531  * dispatches packets to upper
1532  */
1533 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1534 {
1535         struct pcie_service_card *card = adapter->card;
1536         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1537         u32 wrptr, rd_index, tx_val;
1538         dma_addr_t buf_pa;
1539         int ret = 0;
1540         struct sk_buff *skb_tmp = NULL;
1541         struct mwifiex_pcie_buf_desc *desc;
1542         struct mwifiex_pfu_buf_desc *desc2;
1543
1544         if (!mwifiex_pcie_ok_to_access_hw(adapter))
1545                 mwifiex_pm_wakeup_card(adapter);
1546
1547         /* Read the RX ring Write pointer set by firmware */
1548         if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1549                 mwifiex_dbg(adapter, ERROR,
1550                             "RECV DATA: failed to read reg->rx_wrptr\n");
1551                 ret = -1;
1552                 goto done;
1553         }
1554         card->rxbd_wrptr = wrptr;
1555
1556         while (((wrptr & reg->rx_mask) !=
1557                 (card->rxbd_rdptr & reg->rx_mask)) ||
1558                ((wrptr & reg->rx_rollover_ind) ==
1559                 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
1560                 struct sk_buff *skb_data;
1561                 u16 rx_len;
1562
1563                 rd_index = card->rxbd_rdptr & reg->rx_mask;
1564                 skb_data = card->rx_buf_list[rd_index];
1565
1566                 /* If skb allocation was failed earlier for Rx packet,
1567                  * rx_buf_list[rd_index] would have been left with a NULL.
1568                  */
1569                 if (!skb_data)
1570                         return -ENOMEM;
1571
1572                 mwifiex_unmap_pci_memory(adapter, skb_data, DMA_FROM_DEVICE);
1573                 card->rx_buf_list[rd_index] = NULL;
1574
1575                 /* Get data length from interface header -
1576                  * first 2 bytes for len, next 2 bytes is for type
1577                  */
1578                 rx_len = get_unaligned_le16(skb_data->data);
1579                 if (WARN_ON(rx_len <= adapter->intf_hdr_len ||
1580                             rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1581                         mwifiex_dbg(adapter, ERROR,
1582                                     "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1583                                     rx_len, card->rxbd_rdptr, wrptr);
1584                         dev_kfree_skb_any(skb_data);
1585                 } else {
1586                         skb_put(skb_data, rx_len);
1587                         mwifiex_dbg(adapter, DATA,
1588                                     "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1589                                     card->rxbd_rdptr, wrptr, rx_len);
1590                         skb_pull(skb_data, adapter->intf_hdr_len);
1591                         if (adapter->rx_work_enabled) {
1592                                 skb_queue_tail(&adapter->rx_data_q, skb_data);
1593                                 adapter->data_received = true;
1594                                 atomic_inc(&adapter->rx_pending);
1595                         } else {
1596                                 mwifiex_handle_rx_packet(adapter, skb_data);
1597                         }
1598                 }
1599
1600                 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1601                                                       GFP_KERNEL);
1602                 if (!skb_tmp) {
1603                         mwifiex_dbg(adapter, ERROR,
1604                                     "Unable to allocate skb.\n");
1605                         return -ENOMEM;
1606                 }
1607
1608                 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1609                                            MWIFIEX_RX_DATA_BUF_SIZE,
1610                                            DMA_FROM_DEVICE))
1611                         return -1;
1612
1613                 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1614
1615                 mwifiex_dbg(adapter, INFO,
1616                             "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1617                             skb_tmp, rd_index);
1618                 card->rx_buf_list[rd_index] = skb_tmp;
1619
1620                 if (reg->pfu_enabled) {
1621                         desc2 = card->rxbd_ring[rd_index];
1622                         desc2->paddr = buf_pa;
1623                         desc2->len = skb_tmp->len;
1624                         desc2->frag_len = skb_tmp->len;
1625                         desc2->offset = 0;
1626                         desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1627                 } else {
1628                         desc = card->rxbd_ring[rd_index];
1629                         desc->paddr = buf_pa;
1630                         desc->len = skb_tmp->len;
1631                         desc->flags = 0;
1632                 }
1633
1634                 if ((++card->rxbd_rdptr & reg->rx_mask) ==
1635                                                         MWIFIEX_MAX_TXRX_BD) {
1636                         card->rxbd_rdptr = ((card->rxbd_rdptr &
1637                                              reg->rx_rollover_ind) ^
1638                                              reg->rx_rollover_ind);
1639                 }
1640                 mwifiex_dbg(adapter, DATA,
1641                             "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1642                             card->rxbd_rdptr, wrptr);
1643
1644                 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1645                 /* Write the RX ring read pointer in to reg->rx_rdptr */
1646                 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1647                                       card->rxbd_rdptr | tx_val)) {
1648                         mwifiex_dbg(adapter, DATA,
1649                                     "RECV DATA: failed to write reg->rx_rdptr\n");
1650                         ret = -1;
1651                         goto done;
1652                 }
1653
1654                 /* Read the RX ring Write pointer set by firmware */
1655                 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1656                         mwifiex_dbg(adapter, ERROR,
1657                                     "RECV DATA: failed to read reg->rx_wrptr\n");
1658                         ret = -1;
1659                         goto done;
1660                 }
1661                 mwifiex_dbg(adapter, DATA,
1662                             "info: RECV DATA: Rcvd packet from fw successfully\n");
1663                 card->rxbd_wrptr = wrptr;
1664         }
1665
1666 done:
1667         return ret;
1668 }
1669
1670 /*
1671  * This function downloads the boot command to device
1672  */
1673 static int
1674 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1675 {
1676         dma_addr_t buf_pa;
1677         struct pcie_service_card *card = adapter->card;
1678         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1679
1680         if (!(skb->data && skb->len)) {
1681                 mwifiex_dbg(adapter, ERROR,
1682                             "Invalid parameter in %s <%p. len %d>\n",
1683                             __func__, skb->data, skb->len);
1684                 return -1;
1685         }
1686
1687         if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE))
1688                 return -1;
1689
1690         buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1691
1692         /* Write the lower 32bits of the physical address to low command
1693          * address scratch register
1694          */
1695         if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1696                 mwifiex_dbg(adapter, ERROR,
1697                             "%s: failed to write download command to boot code.\n",
1698                             __func__);
1699                 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1700                 return -1;
1701         }
1702
1703         /* Write the upper 32bits of the physical address to high command
1704          * address scratch register
1705          */
1706         if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1707                               (u32)((u64)buf_pa >> 32))) {
1708                 mwifiex_dbg(adapter, ERROR,
1709                             "%s: failed to write download command to boot code.\n",
1710                             __func__);
1711                 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1712                 return -1;
1713         }
1714
1715         /* Write the command length to cmd_size scratch register */
1716         if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1717                 mwifiex_dbg(adapter, ERROR,
1718                             "%s: failed to write command len to cmd_size scratch reg\n",
1719                             __func__);
1720                 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1721                 return -1;
1722         }
1723
1724         /* Ring the door bell */
1725         if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1726                               CPU_INTR_DOOR_BELL)) {
1727                 mwifiex_dbg(adapter, ERROR,
1728                             "%s: failed to assert door-bell intr\n", __func__);
1729                 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1730                 return -1;
1731         }
1732
1733         return 0;
1734 }
1735
1736 /* This function init rx port in firmware which in turn enables to receive data
1737  * from device before transmitting any packet.
1738  */
1739 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1740 {
1741         struct pcie_service_card *card = adapter->card;
1742         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1743         int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1744
1745         /* Write the RX ring read pointer in to reg->rx_rdptr */
1746         if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1747                               tx_wrap)) {
1748                 mwifiex_dbg(adapter, ERROR,
1749                             "RECV DATA: failed to write reg->rx_rdptr\n");
1750                 return -1;
1751         }
1752         return 0;
1753 }
1754
1755 /* This function downloads commands to the device
1756  */
1757 static int
1758 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1759 {
1760         struct pcie_service_card *card = adapter->card;
1761         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1762         int ret = 0;
1763         dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1764         u8 *payload = (u8 *)skb->data;
1765
1766         if (!(skb->data && skb->len)) {
1767                 mwifiex_dbg(adapter, ERROR,
1768                             "Invalid parameter in %s <%p, %#x>\n",
1769                             __func__, skb->data, skb->len);
1770                 return -1;
1771         }
1772
1773         /* Make sure a command response buffer is available */
1774         if (!card->cmdrsp_buf) {
1775                 mwifiex_dbg(adapter, ERROR,
1776                             "No response buffer available, send command failed\n");
1777                 return -EBUSY;
1778         }
1779
1780         if (!mwifiex_pcie_ok_to_access_hw(adapter))
1781                 mwifiex_pm_wakeup_card(adapter);
1782
1783         adapter->cmd_sent = true;
1784
1785         put_unaligned_le16((u16)skb->len, &payload[0]);
1786         put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]);
1787
1788         if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE))
1789                 return -1;
1790
1791         card->cmd_buf = skb;
1792         /*
1793          * Need to keep a reference, since core driver might free up this
1794          * buffer before we've unmapped it.
1795          */
1796         skb_get(skb);
1797
1798         /* To send a command, the driver will:
1799                 1. Write the 64bit physical address of the data buffer to
1800                    cmd response address low  + cmd response address high
1801                 2. Ring the door bell (i.e. set the door bell interrupt)
1802
1803                 In response to door bell interrupt, the firmware will perform
1804                 the DMA of the command packet (first header to obtain the total
1805                 length and then rest of the command).
1806         */
1807
1808         if (card->cmdrsp_buf) {
1809                 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1810                 /* Write the lower 32bits of the cmdrsp buffer physical
1811                    address */
1812                 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1813                                       (u32)cmdrsp_buf_pa)) {
1814                         mwifiex_dbg(adapter, ERROR,
1815                                     "Failed to write download cmd to boot code.\n");
1816                         ret = -1;
1817                         goto done;
1818                 }
1819                 /* Write the upper 32bits of the cmdrsp buffer physical
1820                    address */
1821                 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1822                                       (u32)((u64)cmdrsp_buf_pa >> 32))) {
1823                         mwifiex_dbg(adapter, ERROR,
1824                                     "Failed to write download cmd to boot code.\n");
1825                         ret = -1;
1826                         goto done;
1827                 }
1828         }
1829
1830         cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1831         /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1832         if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1833                               (u32)cmd_buf_pa)) {
1834                 mwifiex_dbg(adapter, ERROR,
1835                             "Failed to write download cmd to boot code.\n");
1836                 ret = -1;
1837                 goto done;
1838         }
1839         /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1840         if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1841                               (u32)((u64)cmd_buf_pa >> 32))) {
1842                 mwifiex_dbg(adapter, ERROR,
1843                             "Failed to write download cmd to boot code.\n");
1844                 ret = -1;
1845                 goto done;
1846         }
1847
1848         /* Write the command length to reg->cmd_size */
1849         if (mwifiex_write_reg(adapter, reg->cmd_size,
1850                               card->cmd_buf->len)) {
1851                 mwifiex_dbg(adapter, ERROR,
1852                             "Failed to write cmd len to reg->cmd_size\n");
1853                 ret = -1;
1854                 goto done;
1855         }
1856
1857         /* Ring the door bell */
1858         if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1859                               CPU_INTR_DOOR_BELL)) {
1860                 mwifiex_dbg(adapter, ERROR,
1861                             "Failed to assert door-bell intr\n");
1862                 ret = -1;
1863                 goto done;
1864         }
1865
1866 done:
1867         if (ret)
1868                 adapter->cmd_sent = false;
1869
1870         return 0;
1871 }
1872
1873 /*
1874  * This function handles command complete interrupt
1875  */
1876 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1877 {
1878         struct pcie_service_card *card = adapter->card;
1879         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1880         struct sk_buff *skb = card->cmdrsp_buf;
1881         int count = 0;
1882         u16 rx_len;
1883
1884         mwifiex_dbg(adapter, CMD,
1885                     "info: Rx CMD Response\n");
1886
1887         if (adapter->curr_cmd)
1888                 mwifiex_unmap_pci_memory(adapter, skb, DMA_FROM_DEVICE);
1889         else
1890                 dma_sync_single_for_cpu(&card->dev->dev,
1891                                         MWIFIEX_SKB_DMA_ADDR(skb),
1892                                         MWIFIEX_UPLD_SIZE, DMA_FROM_DEVICE);
1893
1894         /* Unmap the command as a response has been received. */
1895         if (card->cmd_buf) {
1896                 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1897                                          DMA_TO_DEVICE);
1898                 dev_kfree_skb_any(card->cmd_buf);
1899                 card->cmd_buf = NULL;
1900         }
1901
1902         rx_len = get_unaligned_le16(skb->data);
1903         skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1904         skb_trim(skb, rx_len);
1905
1906         if (!adapter->curr_cmd) {
1907                 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1908                         dma_sync_single_for_device(&card->dev->dev,
1909                                                    MWIFIEX_SKB_DMA_ADDR(skb),
1910                                                    MWIFIEX_SLEEP_COOKIE_SIZE,
1911                                                    DMA_FROM_DEVICE);
1912                         if (mwifiex_write_reg(adapter,
1913                                               PCIE_CPU_INT_EVENT,
1914                                               CPU_INTR_SLEEP_CFM_DONE)) {
1915                                 mwifiex_dbg(adapter, ERROR,
1916                                             "Write register failed\n");
1917                                 return -1;
1918                         }
1919                         mwifiex_delay_for_sleep_cookie(adapter,
1920                                                        MWIFIEX_MAX_DELAY_COUNT);
1921                         mwifiex_unmap_pci_memory(adapter, skb,
1922                                                  DMA_FROM_DEVICE);
1923                         skb_pull(skb, adapter->intf_hdr_len);
1924                         while (reg->sleep_cookie && (count++ < 10) &&
1925                                mwifiex_pcie_ok_to_access_hw(adapter))
1926                                 usleep_range(50, 60);
1927                         mwifiex_pcie_enable_host_int(adapter);
1928                         mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1929                                                            skb->len);
1930                 } else {
1931                         mwifiex_dbg(adapter, ERROR,
1932                                     "There is no command but got cmdrsp\n");
1933                 }
1934                 memcpy(adapter->upld_buf, skb->data,
1935                        min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1936                 skb_push(skb, adapter->intf_hdr_len);
1937                 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1938                                            DMA_FROM_DEVICE))
1939                         return -1;
1940         } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1941                 skb_pull(skb, adapter->intf_hdr_len);
1942                 adapter->curr_cmd->resp_skb = skb;
1943                 adapter->cmd_resp_received = true;
1944                 /* Take the pointer and set it to CMD node and will
1945                    return in the response complete callback */
1946                 card->cmdrsp_buf = NULL;
1947
1948                 /* Clear the cmd-rsp buffer address in scratch registers. This
1949                    will prevent firmware from writing to the same response
1950                    buffer again. */
1951                 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1952                         mwifiex_dbg(adapter, ERROR,
1953                                     "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1954                         return -1;
1955                 }
1956                 /* Write the upper 32bits of the cmdrsp buffer physical
1957                    address */
1958                 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1959                         mwifiex_dbg(adapter, ERROR,
1960                                     "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1961                         return -1;
1962                 }
1963         }
1964
1965         return 0;
1966 }
1967
1968 /*
1969  * Command Response processing complete handler
1970  */
1971 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1972                                         struct sk_buff *skb)
1973 {
1974         struct pcie_service_card *card = adapter->card;
1975
1976         if (skb) {
1977                 card->cmdrsp_buf = skb;
1978                 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len);
1979                 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1980                                            DMA_FROM_DEVICE))
1981                         return -1;
1982         }
1983
1984         return 0;
1985 }
1986
1987 /*
1988  * This function handles firmware event ready interrupt
1989  */
1990 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1991 {
1992         struct pcie_service_card *card = adapter->card;
1993         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1994         u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1995         u32 wrptr, event;
1996         struct mwifiex_evt_buf_desc *desc;
1997
1998         if (!mwifiex_pcie_ok_to_access_hw(adapter))
1999                 mwifiex_pm_wakeup_card(adapter);
2000
2001         if (adapter->event_received) {
2002                 mwifiex_dbg(adapter, EVENT,
2003                             "info: Event being processed,\t"
2004                             "do not process this interrupt just yet\n");
2005                 return 0;
2006         }
2007
2008         if (rdptr >= MWIFIEX_MAX_EVT_BD) {
2009                 mwifiex_dbg(adapter, ERROR,
2010                             "info: Invalid read pointer...\n");
2011                 return -1;
2012         }
2013
2014         /* Read the event ring write pointer set by firmware */
2015         if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
2016                 mwifiex_dbg(adapter, ERROR,
2017                             "EventReady: failed to read reg->evt_wrptr\n");
2018                 return -1;
2019         }
2020
2021         mwifiex_dbg(adapter, EVENT,
2022                     "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
2023                     card->evtbd_rdptr, wrptr);
2024         if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
2025                                               & MWIFIEX_EVTBD_MASK)) ||
2026             ((wrptr & reg->evt_rollover_ind) ==
2027              (card->evtbd_rdptr & reg->evt_rollover_ind))) {
2028                 struct sk_buff *skb_cmd;
2029                 __le16 data_len = 0;
2030                 u16 evt_len;
2031
2032                 mwifiex_dbg(adapter, INFO,
2033                             "info: Read Index: %d\n", rdptr);
2034                 skb_cmd = card->evt_buf_list[rdptr];
2035                 mwifiex_unmap_pci_memory(adapter, skb_cmd, DMA_FROM_DEVICE);
2036
2037                 /* Take the pointer and set it to event pointer in adapter
2038                    and will return back after event handling callback */
2039                 card->evt_buf_list[rdptr] = NULL;
2040                 desc = card->evtbd_ring[rdptr];
2041                 memset(desc, 0, sizeof(*desc));
2042
2043                 event = get_unaligned_le32(
2044                         &skb_cmd->data[adapter->intf_hdr_len]);
2045                 adapter->event_cause = event;
2046                 /* The first 4bytes will be the event transfer header
2047                    len is 2 bytes followed by type which is 2 bytes */
2048                 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
2049                 evt_len = le16_to_cpu(data_len);
2050                 skb_trim(skb_cmd, evt_len);
2051                 skb_pull(skb_cmd, adapter->intf_hdr_len);
2052                 mwifiex_dbg(adapter, EVENT,
2053                             "info: Event length: %d\n", evt_len);
2054
2055                 if (evt_len > MWIFIEX_EVENT_HEADER_LEN &&
2056                     evt_len < MAX_EVENT_SIZE)
2057                         memcpy(adapter->event_body, skb_cmd->data +
2058                                MWIFIEX_EVENT_HEADER_LEN, evt_len -
2059                                MWIFIEX_EVENT_HEADER_LEN);
2060
2061                 adapter->event_received = true;
2062                 adapter->event_skb = skb_cmd;
2063
2064                 /* Do not update the event read pointer here, wait till the
2065                    buffer is released. This is just to make things simpler,
2066                    we need to find a better method of managing these buffers.
2067                 */
2068         } else {
2069                 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
2070                                       CPU_INTR_EVENT_DONE)) {
2071                         mwifiex_dbg(adapter, ERROR,
2072                                     "Write register failed\n");
2073                         return -1;
2074                 }
2075         }
2076
2077         return 0;
2078 }
2079
2080 /*
2081  * Event processing complete handler
2082  */
2083 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
2084                                        struct sk_buff *skb)
2085 {
2086         struct pcie_service_card *card = adapter->card;
2087         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2088         int ret = 0;
2089         u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
2090         u32 wrptr;
2091         struct mwifiex_evt_buf_desc *desc;
2092
2093         if (!skb)
2094                 return 0;
2095
2096         if (rdptr >= MWIFIEX_MAX_EVT_BD) {
2097                 mwifiex_dbg(adapter, ERROR,
2098                             "event_complete: Invalid rdptr 0x%x\n",
2099                             rdptr);
2100                 return -EINVAL;
2101         }
2102
2103         /* Read the event ring write pointer set by firmware */
2104         if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
2105                 mwifiex_dbg(adapter, ERROR,
2106                             "event_complete: failed to read reg->evt_wrptr\n");
2107                 return -1;
2108         }
2109
2110         if (!card->evt_buf_list[rdptr]) {
2111                 skb_push(skb, adapter->intf_hdr_len);
2112                 skb_put(skb, MAX_EVENT_SIZE - skb->len);
2113                 if (mwifiex_map_pci_memory(adapter, skb,
2114                                            MAX_EVENT_SIZE,
2115                                            DMA_FROM_DEVICE))
2116                         return -1;
2117                 card->evt_buf_list[rdptr] = skb;
2118                 desc = card->evtbd_ring[rdptr];
2119                 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
2120                 desc->len = (u16)skb->len;
2121                 desc->flags = 0;
2122                 skb = NULL;
2123         } else {
2124                 mwifiex_dbg(adapter, ERROR,
2125                             "info: ERROR: buf still valid at index %d, <%p, %p>\n",
2126                             rdptr, card->evt_buf_list[rdptr], skb);
2127         }
2128
2129         if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
2130                 card->evtbd_rdptr = ((card->evtbd_rdptr &
2131                                         reg->evt_rollover_ind) ^
2132                                         reg->evt_rollover_ind);
2133         }
2134
2135         mwifiex_dbg(adapter, EVENT,
2136                     "info: Updated <Rd: 0x%x, Wr: 0x%x>",
2137                     card->evtbd_rdptr, wrptr);
2138
2139         /* Write the event ring read pointer in to reg->evt_rdptr */
2140         if (mwifiex_write_reg(adapter, reg->evt_rdptr,
2141                               card->evtbd_rdptr)) {
2142                 mwifiex_dbg(adapter, ERROR,
2143                             "event_complete: failed to read reg->evt_rdptr\n");
2144                 return -1;
2145         }
2146
2147         mwifiex_dbg(adapter, EVENT,
2148                     "info: Check Events Again\n");
2149         ret = mwifiex_pcie_process_event_ready(adapter);
2150
2151         return ret;
2152 }
2153
2154 /* Combo firmware image is a combination of
2155  * (1) combo crc heaer, start with CMD5
2156  * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1.
2157  * (3) wifi image.
2158  *
2159  * This function bypass the header and bluetooth part, return
2160  * the offset of tail wifi-only part. If the image is already wifi-only,
2161  * that is start with CMD1, return 0.
2162  */
2163
2164 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter,
2165                                    const void *firmware, u32 firmware_len) {
2166         const struct mwifiex_fw_data *fwdata;
2167         u32 offset = 0, data_len, dnld_cmd;
2168         int ret = 0;
2169         bool cmd7_before = false, first_cmd = false;
2170
2171         while (1) {
2172                 /* Check for integer and buffer overflow */
2173                 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) ||
2174                     offset + sizeof(fwdata->header) >= firmware_len) {
2175                         mwifiex_dbg(adapter, ERROR,
2176                                     "extract wifi-only fw failure!\n");
2177                         ret = -1;
2178                         goto done;
2179                 }
2180
2181                 fwdata = firmware + offset;
2182                 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd);
2183                 data_len = le32_to_cpu(fwdata->header.data_length);
2184
2185                 /* Skip past header */
2186                 offset += sizeof(fwdata->header);
2187
2188                 switch (dnld_cmd) {
2189                 case MWIFIEX_FW_DNLD_CMD_1:
2190                         if (offset + data_len < data_len) {
2191                                 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2192                                 ret = -1;
2193                                 goto done;
2194                         }
2195
2196                         /* Image start with cmd1, already wifi-only firmware */
2197                         if (!first_cmd) {
2198                                 mwifiex_dbg(adapter, MSG,
2199                                             "input wifi-only firmware\n");
2200                                 return 0;
2201                         }
2202
2203                         if (!cmd7_before) {
2204                                 mwifiex_dbg(adapter, ERROR,
2205                                             "no cmd7 before cmd1!\n");
2206                                 ret = -1;
2207                                 goto done;
2208                         }
2209                         offset += data_len;
2210                         break;
2211                 case MWIFIEX_FW_DNLD_CMD_5:
2212                         first_cmd = true;
2213                         /* Check for integer overflow */
2214                         if (offset + data_len < data_len) {
2215                                 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2216                                 ret = -1;
2217                                 goto done;
2218                         }
2219                         offset += data_len;
2220                         break;
2221                 case MWIFIEX_FW_DNLD_CMD_6:
2222                         first_cmd = true;
2223                         /* Check for integer overflow */
2224                         if (offset + data_len < data_len) {
2225                                 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2226                                 ret = -1;
2227                                 goto done;
2228                         }
2229                         offset += data_len;
2230                         if (offset >= firmware_len) {
2231                                 mwifiex_dbg(adapter, ERROR,
2232                                             "extract wifi-only fw failure!\n");
2233                                 ret = -1;
2234                         } else {
2235                                 ret = offset;
2236                         }
2237                         goto done;
2238                 case MWIFIEX_FW_DNLD_CMD_7:
2239                         first_cmd = true;
2240                         cmd7_before = true;
2241                         break;
2242                 default:
2243                         mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n",
2244                                     dnld_cmd);
2245                         ret = -1;
2246                         goto done;
2247                 }
2248         }
2249
2250 done:
2251         return ret;
2252 }
2253
2254 /*
2255  * This function downloads the firmware to the card.
2256  *
2257  * Firmware is downloaded to the card in blocks. Every block download
2258  * is tested for CRC errors, and retried a number of times before
2259  * returning failure.
2260  */
2261 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
2262                                     struct mwifiex_fw_image *fw)
2263 {
2264         int ret;
2265         u8 *firmware = fw->fw_buf;
2266         u32 firmware_len = fw->fw_len;
2267         u32 offset = 0;
2268         struct sk_buff *skb;
2269         u32 txlen, tx_blocks = 0, tries, len, val;
2270         u32 block_retry_cnt = 0;
2271         struct pcie_service_card *card = adapter->card;
2272         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2273
2274         if (!firmware || !firmware_len) {
2275                 mwifiex_dbg(adapter, ERROR,
2276                             "No firmware image found! Terminating download\n");
2277                 return -1;
2278         }
2279
2280         mwifiex_dbg(adapter, INFO,
2281                     "info: Downloading FW image (%d bytes)\n",
2282                     firmware_len);
2283
2284         if (mwifiex_pcie_disable_host_int(adapter)) {
2285                 mwifiex_dbg(adapter, ERROR,
2286                             "%s: Disabling interrupts failed.\n", __func__);
2287                 return -1;
2288         }
2289
2290         skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
2291         if (!skb) {
2292                 ret = -ENOMEM;
2293                 goto done;
2294         }
2295
2296         ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val);
2297         if (ret) {
2298                 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n");
2299                 goto done;
2300         }
2301
2302         /* PCIE FLR case: extract wifi part from combo firmware*/
2303         if (val == MWIFIEX_PCIE_FLR_HAPPENS) {
2304                 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len);
2305                 if (ret < 0) {
2306                         mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n");
2307                         goto done;
2308                 }
2309                 offset = ret;
2310                 mwifiex_dbg(adapter, MSG,
2311                             "info: dnld wifi firmware from %d bytes\n", offset);
2312         }
2313
2314         /* Perform firmware data transfer */
2315         do {
2316                 u32 ireg_intr = 0;
2317
2318                 /* More data? */
2319                 if (offset >= firmware_len)
2320                         break;
2321
2322                 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2323                         ret = mwifiex_read_reg(adapter, reg->cmd_size,
2324                                                &len);
2325                         if (ret) {
2326                                 mwifiex_dbg(adapter, FATAL,
2327                                             "Failed reading len from boot code\n");
2328                                 goto done;
2329                         }
2330                         if (len)
2331                                 break;
2332                         usleep_range(10, 20);
2333                 }
2334
2335                 if (!len) {
2336                         break;
2337                 } else if (len > MWIFIEX_UPLD_SIZE) {
2338                         mwifiex_dbg(adapter, ERROR,
2339                                     "FW download failure @ %d, invalid length %d\n",
2340                                     offset, len);
2341                         ret = -1;
2342                         goto done;
2343                 }
2344
2345                 txlen = len;
2346
2347                 if (len & BIT(0)) {
2348                         block_retry_cnt++;
2349                         if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
2350                                 mwifiex_dbg(adapter, ERROR,
2351                                             "FW download failure @ %d, over max\t"
2352                                             "retry count\n", offset);
2353                                 ret = -1;
2354                                 goto done;
2355                         }
2356                         mwifiex_dbg(adapter, ERROR,
2357                                     "FW CRC error indicated by the\t"
2358                                     "helper: len = 0x%04X, txlen = %d\n",
2359                                     len, txlen);
2360                         len &= ~BIT(0);
2361                         /* Setting this to 0 to resend from same offset */
2362                         txlen = 0;
2363                 } else {
2364                         block_retry_cnt = 0;
2365                         /* Set blocksize to transfer - checking for
2366                            last block */
2367                         if (firmware_len - offset < txlen)
2368                                 txlen = firmware_len - offset;
2369
2370                         tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
2371                                     card->pcie.blksz_fw_dl;
2372
2373                         /* Copy payload to buffer */
2374                         memmove(skb->data, &firmware[offset], txlen);
2375                 }
2376
2377                 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
2378                 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
2379
2380                 /* Send the boot command to device */
2381                 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
2382                         mwifiex_dbg(adapter, ERROR,
2383                                     "Failed to send firmware download command\n");
2384                         ret = -1;
2385                         goto done;
2386                 }
2387
2388                 /* Wait for the command done interrupt */
2389                 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2390                         if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
2391                                              &ireg_intr)) {
2392                                 mwifiex_dbg(adapter, ERROR,
2393                                             "%s: Failed to read\t"
2394                                             "interrupt status during fw dnld.\n",
2395                                             __func__);
2396                                 mwifiex_unmap_pci_memory(adapter, skb,
2397                                                          DMA_TO_DEVICE);
2398                                 ret = -1;
2399                                 goto done;
2400                         }
2401                         if (!(ireg_intr & CPU_INTR_DOOR_BELL))
2402                                 break;
2403                         usleep_range(10, 20);
2404                 }
2405                 if (ireg_intr & CPU_INTR_DOOR_BELL) {
2406                         mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n",
2407                                     __func__);
2408                         mwifiex_unmap_pci_memory(adapter, skb,
2409                                                  DMA_TO_DEVICE);
2410                         ret = -1;
2411                         goto done;
2412                 }
2413
2414                 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
2415
2416                 offset += txlen;
2417         } while (true);
2418
2419         mwifiex_dbg(adapter, MSG,
2420                     "info: FW download over, size %d bytes\n", offset);
2421
2422         ret = 0;
2423
2424 done:
2425         dev_kfree_skb_any(skb);
2426         return ret;
2427 }
2428
2429 /*
2430  * This function checks the firmware status in card.
2431  */
2432 static int
2433 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2434 {
2435         int ret = 0;
2436         u32 firmware_stat;
2437         struct pcie_service_card *card = adapter->card;
2438         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2439         u32 tries;
2440
2441         /* Mask spurios interrupts */
2442         if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2443                               HOST_INTR_MASK)) {
2444                 mwifiex_dbg(adapter, ERROR,
2445                             "Write register failed\n");
2446                 return -1;
2447         }
2448
2449         mwifiex_dbg(adapter, INFO,
2450                     "Setting driver ready signature\n");
2451         if (mwifiex_write_reg(adapter, reg->drv_rdy,
2452                               FIRMWARE_READY_PCIE)) {
2453                 mwifiex_dbg(adapter, ERROR,
2454                             "Failed to write driver ready signature\n");
2455                 return -1;
2456         }
2457
2458         /* Wait for firmware initialization event */
2459         for (tries = 0; tries < poll_num; tries++) {
2460                 if (mwifiex_read_reg(adapter, reg->fw_status,
2461                                      &firmware_stat))
2462                         ret = -1;
2463                 else
2464                         ret = 0;
2465
2466                 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>",
2467                             tries, ret, firmware_stat);
2468
2469                 if (ret)
2470                         continue;
2471                 if (firmware_stat == FIRMWARE_READY_PCIE) {
2472                         ret = 0;
2473                         break;
2474                 } else {
2475                         msleep(100);
2476                         ret = -1;
2477                 }
2478         }
2479
2480         return ret;
2481 }
2482
2483 /* This function checks if WLAN is the winner.
2484  */
2485 static int
2486 mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2487 {
2488         u32 winner = 0;
2489         int ret = 0;
2490         struct pcie_service_card *card = adapter->card;
2491         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2492
2493         if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2494                 ret = -1;
2495         } else if (!winner) {
2496                 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2497                 adapter->winner = 1;
2498         } else {
2499                 mwifiex_dbg(adapter, ERROR,
2500                             "PCI-E is not the winner <%#x>", winner);
2501         }
2502
2503         return ret;
2504 }
2505
2506 /*
2507  * This function reads the interrupt status from card.
2508  */
2509 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2510                                      int msg_id)
2511 {
2512         u32 pcie_ireg;
2513         unsigned long flags;
2514         struct pcie_service_card *card = adapter->card;
2515
2516         if (card->msi_enable) {
2517                 spin_lock_irqsave(&adapter->int_lock, flags);
2518                 adapter->int_status = 1;
2519                 spin_unlock_irqrestore(&adapter->int_lock, flags);
2520                 return;
2521         }
2522
2523         if (!mwifiex_pcie_ok_to_access_hw(adapter))
2524                 return;
2525
2526         if (card->msix_enable && msg_id >= 0) {
2527                 pcie_ireg = BIT(msg_id);
2528         } else {
2529                 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2530                                      &pcie_ireg)) {
2531                         mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2532                         return;
2533                 }
2534
2535                 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2536                         return;
2537
2538
2539                 mwifiex_pcie_disable_host_int(adapter);
2540
2541                 /* Clear the pending interrupts */
2542                 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2543                                       ~pcie_ireg)) {
2544                         mwifiex_dbg(adapter, ERROR,
2545                                     "Write register failed\n");
2546                         return;
2547                 }
2548         }
2549
2550         if (!adapter->pps_uapsd_mode &&
2551             adapter->ps_state == PS_STATE_SLEEP &&
2552             mwifiex_pcie_ok_to_access_hw(adapter)) {
2553                 /* Potentially for PCIe we could get other
2554                  * interrupts like shared. Don't change power
2555                  * state until cookie is set
2556                  */
2557                 adapter->ps_state = PS_STATE_AWAKE;
2558                 adapter->pm_wakeup_fw_try = false;
2559                 del_timer(&adapter->wakeup_timer);
2560         }
2561
2562         spin_lock_irqsave(&adapter->int_lock, flags);
2563         adapter->int_status |= pcie_ireg;
2564         spin_unlock_irqrestore(&adapter->int_lock, flags);
2565         mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2566 }
2567
2568 /*
2569  * Interrupt handler for PCIe root port
2570  *
2571  * This function reads the interrupt status from firmware and assigns
2572  * the main process in workqueue which will handle the interrupt.
2573  */
2574 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2575 {
2576         struct mwifiex_msix_context *ctx = context;
2577         struct pci_dev *pdev = ctx->dev;
2578         struct pcie_service_card *card;
2579         struct mwifiex_adapter *adapter;
2580
2581         card = pci_get_drvdata(pdev);
2582
2583         if (!card->adapter) {
2584                 pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2585                        card ? card->adapter : NULL);
2586                 goto exit;
2587         }
2588         adapter = card->adapter;
2589
2590         if (test_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags))
2591                 goto exit;
2592
2593         if (card->msix_enable)
2594                 mwifiex_interrupt_status(adapter, ctx->msg_id);
2595         else
2596                 mwifiex_interrupt_status(adapter, -1);
2597
2598         mwifiex_queue_main_work(adapter);
2599
2600 exit:
2601         return IRQ_HANDLED;
2602 }
2603
2604 /*
2605  * This function checks the current interrupt status.
2606  *
2607  * The following interrupts are checked and handled by this function -
2608  *      - Data sent
2609  *      - Command sent
2610  *      - Command received
2611  *      - Packets received
2612  *      - Events received
2613  *
2614  * In case of Rx packets received, the packets are uploaded from card to
2615  * host and processed accordingly.
2616  */
2617 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2618 {
2619         int ret;
2620         u32 pcie_ireg = 0;
2621         unsigned long flags;
2622         struct pcie_service_card *card = adapter->card;
2623
2624         spin_lock_irqsave(&adapter->int_lock, flags);
2625         if (!card->msi_enable) {
2626                 /* Clear out unused interrupts */
2627                 pcie_ireg = adapter->int_status;
2628         }
2629         adapter->int_status = 0;
2630         spin_unlock_irqrestore(&adapter->int_lock, flags);
2631
2632         if (card->msi_enable) {
2633                 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2634                         if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2635                                              &pcie_ireg)) {
2636                                 mwifiex_dbg(adapter, ERROR,
2637                                             "Read register failed\n");
2638                                 return -1;
2639                         }
2640
2641                         if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2642                                 if (mwifiex_write_reg(adapter,
2643                                                       PCIE_HOST_INT_STATUS,
2644                                                       ~pcie_ireg)) {
2645                                         mwifiex_dbg(adapter, ERROR,
2646                                                     "Write register failed\n");
2647                                         return -1;
2648                                 }
2649                                 if (!adapter->pps_uapsd_mode &&
2650                                     adapter->ps_state == PS_STATE_SLEEP) {
2651                                         adapter->ps_state = PS_STATE_AWAKE;
2652                                         adapter->pm_wakeup_fw_try = false;
2653                                         del_timer(&adapter->wakeup_timer);
2654                                 }
2655                         }
2656                 }
2657         }
2658
2659         if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2660                 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n");
2661                 ret = mwifiex_pcie_send_data_complete(adapter);
2662                 if (ret)
2663                         return ret;
2664         }
2665         if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2666                 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n");
2667                 ret = mwifiex_pcie_process_recv_data(adapter);
2668                 if (ret)
2669                         return ret;
2670         }
2671         if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2672                 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n");
2673                 ret = mwifiex_pcie_process_event_ready(adapter);
2674                 if (ret)
2675                         return ret;
2676         }
2677         if (pcie_ireg & HOST_INTR_CMD_DONE) {
2678                 if (adapter->cmd_sent) {
2679                         mwifiex_dbg(adapter, INTR,
2680                                     "info: CMD sent Interrupt\n");
2681                         adapter->cmd_sent = false;
2682                 }
2683                 /* Handle command response */
2684                 ret = mwifiex_pcie_process_cmd_complete(adapter);
2685                 if (ret)
2686                         return ret;
2687         }
2688
2689         mwifiex_dbg(adapter, INTR,
2690                     "info: cmd_sent=%d data_sent=%d\n",
2691                     adapter->cmd_sent, adapter->data_sent);
2692         if (!card->msi_enable && !card->msix_enable &&
2693                                  adapter->ps_state != PS_STATE_SLEEP)
2694                 mwifiex_pcie_enable_host_int(adapter);
2695
2696         return 0;
2697 }
2698
2699 /*
2700  * This function downloads data from driver to card.
2701  *
2702  * Both commands and data packets are transferred to the card by this
2703  * function.
2704  *
2705  * This function adds the PCIE specific header to the front of the buffer
2706  * before transferring. The header contains the length of the packet and
2707  * the type. The firmware handles the packets based upon this set type.
2708  */
2709 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2710                                      struct sk_buff *skb,
2711                                      struct mwifiex_tx_param *tx_param)
2712 {
2713         if (!skb) {
2714                 mwifiex_dbg(adapter, ERROR,
2715                             "Passed NULL skb to %s\n", __func__);
2716                 return -1;
2717         }
2718
2719         if (type == MWIFIEX_TYPE_DATA)
2720                 return mwifiex_pcie_send_data(adapter, skb, tx_param);
2721         else if (type == MWIFIEX_TYPE_CMD)
2722                 return mwifiex_pcie_send_cmd(adapter, skb);
2723
2724         return 0;
2725 }
2726
2727 /* Function to dump PCIE scratch registers in case of FW crash
2728  */
2729 static int
2730 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2731 {
2732         char *p = drv_buf;
2733         char buf[256], *ptr;
2734         int i;
2735         u32 value;
2736         struct pcie_service_card *card = adapter->card;
2737         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2738         int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2739                                   PCIE_SCRATCH_14_REG,
2740                                   PCIE_SCRATCH_15_REG};
2741
2742         if (!p)
2743                 return 0;
2744
2745         mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2746
2747         if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2748                 mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2749                 return 0;
2750         }
2751
2752         ptr = buf;
2753         mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2754         for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2755                 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2756                 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2757                                pcie_scratch_reg[i], value);
2758         }
2759
2760         mwifiex_dbg(adapter, MSG, "%s\n", buf);
2761         p += sprintf(p, "%s\n", buf);
2762
2763         mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2764
2765         return p - drv_buf;
2766 }
2767
2768 /* This function read/write firmware */
2769 static enum rdwr_status
2770 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2771 {
2772         int ret, tries;
2773         u8 ctrl_data;
2774         u32 fw_status;
2775         struct pcie_service_card *card = adapter->card;
2776         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2777
2778         if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2779                 return RDWR_STATUS_FAILURE;
2780
2781         ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2782                                 reg->fw_dump_host_ready);
2783         if (ret) {
2784                 mwifiex_dbg(adapter, ERROR,
2785                             "PCIE write err\n");
2786                 return RDWR_STATUS_FAILURE;
2787         }
2788
2789         for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2790                 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2791                 if (ctrl_data == FW_DUMP_DONE)
2792                         return RDWR_STATUS_SUCCESS;
2793                 if (doneflag && ctrl_data == doneflag)
2794                         return RDWR_STATUS_DONE;
2795                 if (ctrl_data != reg->fw_dump_host_ready) {
2796                         mwifiex_dbg(adapter, WARN,
2797                                     "The ctrl reg was changed, re-try again!\n");
2798                         ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2799                                                 reg->fw_dump_host_ready);
2800                         if (ret) {
2801                                 mwifiex_dbg(adapter, ERROR,
2802                                             "PCIE write err\n");
2803                                 return RDWR_STATUS_FAILURE;
2804                         }
2805                 }
2806                 usleep_range(100, 200);
2807         }
2808
2809         mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2810         return RDWR_STATUS_FAILURE;
2811 }
2812
2813 /* This function dump firmware memory to file */
2814 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2815 {
2816         struct pcie_service_card *card = adapter->card;
2817         const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2818         unsigned int reg, reg_start, reg_end;
2819         u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2820         u8 idx, i, read_reg, doneflag = 0;
2821         enum rdwr_status stat;
2822         u32 memory_size;
2823         int ret;
2824
2825         if (!card->pcie.can_dump_fw)
2826                 return;
2827
2828         for (idx = 0; idx < adapter->num_mem_types; idx++) {
2829                 struct memory_type_mapping *entry =
2830                                 &adapter->mem_type_mapping_tbl[idx];
2831
2832                 if (entry->mem_ptr) {
2833                         vfree(entry->mem_ptr);
2834                         entry->mem_ptr = NULL;
2835                 }
2836                 entry->mem_size = 0;
2837         }
2838
2839         mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2840
2841         /* Read the number of the memories which will dump */
2842         stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2843         if (stat == RDWR_STATUS_FAILURE)
2844                 return;
2845
2846         reg = creg->fw_dump_start;
2847         mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2848
2849         /* W8997 chipset firmware dump will be restore in single region*/
2850         if (fw_dump_num == 0)
2851                 dump_num = 1;
2852         else
2853                 dump_num = fw_dump_num;
2854
2855         /* Read the length of every memory which will dump */
2856         for (idx = 0; idx < dump_num; idx++) {
2857                 struct memory_type_mapping *entry =
2858                                 &adapter->mem_type_mapping_tbl[idx];
2859                 memory_size = 0;
2860                 if (fw_dump_num != 0) {
2861                         stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2862                         if (stat == RDWR_STATUS_FAILURE)
2863                                 return;
2864
2865                         reg = creg->fw_dump_start;
2866                         for (i = 0; i < 4; i++) {
2867                                 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2868                                 memory_size |= (read_reg << (i * 8));
2869                                 reg++;
2870                         }
2871                 } else {
2872                         memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2873                 }
2874
2875                 if (memory_size == 0) {
2876                         mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2877                         ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2878                                                 creg->fw_dump_read_done);
2879                         if (ret) {
2880                                 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2881                                 return;
2882                         }
2883                         break;
2884                 }
2885
2886                 mwifiex_dbg(adapter, DUMP,
2887                             "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2888                 entry->mem_ptr = vmalloc(memory_size + 1);
2889                 entry->mem_size = memory_size;
2890                 if (!entry->mem_ptr) {
2891                         mwifiex_dbg(adapter, ERROR,
2892                                     "Vmalloc %s failed\n", entry->mem_name);
2893                         return;
2894                 }
2895                 dbg_ptr = entry->mem_ptr;
2896                 end_ptr = dbg_ptr + memory_size;
2897
2898                 doneflag = entry->done_flag;
2899                 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2900                             entry->mem_name);
2901
2902                 do {
2903                         stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2904                         if (RDWR_STATUS_FAILURE == stat)
2905                                 return;
2906
2907                         reg_start = creg->fw_dump_start;
2908                         reg_end = creg->fw_dump_end;
2909                         for (reg = reg_start; reg <= reg_end; reg++) {
2910                                 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2911                                 if (dbg_ptr < end_ptr) {
2912                                         dbg_ptr++;
2913                                         continue;
2914                                 }
2915                                 mwifiex_dbg(adapter, ERROR,
2916                                             "pre-allocated buf not enough\n");
2917                                 tmp_ptr =
2918                                         vzalloc(memory_size + MWIFIEX_SIZE_4K);
2919                                 if (!tmp_ptr)
2920                                         return;
2921                                 memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2922                                 vfree(entry->mem_ptr);
2923                                 entry->mem_ptr = tmp_ptr;
2924                                 tmp_ptr = NULL;
2925                                 dbg_ptr = entry->mem_ptr + memory_size;
2926                                 memory_size += MWIFIEX_SIZE_4K;
2927                                 end_ptr = entry->mem_ptr + memory_size;
2928                         }
2929
2930                         if (stat != RDWR_STATUS_DONE)
2931                                 continue;
2932
2933                         mwifiex_dbg(adapter, DUMP,
2934                                     "%s done: size=0x%tx\n",
2935                                     entry->mem_name, dbg_ptr - entry->mem_ptr);
2936                         break;
2937                 } while (true);
2938         }
2939         mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2940 }
2941
2942 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2943 {
2944         adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE);
2945         if (!adapter->devdump_data) {
2946                 mwifiex_dbg(adapter, ERROR,
2947                             "vzalloc devdump data failure!\n");
2948                 return;
2949         }
2950
2951         mwifiex_drv_info_dump(adapter);
2952         mwifiex_pcie_fw_dump(adapter);
2953         mwifiex_prepare_fw_dump_info(adapter);
2954         mwifiex_upload_device_dump(adapter);
2955 }
2956
2957 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter)
2958 {
2959         struct pcie_service_card *card = adapter->card;
2960
2961         /* We can't afford to wait here; remove() might be waiting on us. If we
2962          * can't grab the device lock, maybe we'll get another chance later.
2963          */
2964         pci_try_reset_function(card->dev);
2965 }
2966
2967 static void mwifiex_pcie_work(struct work_struct *work)
2968 {
2969         struct pcie_service_card *card =
2970                 container_of(work, struct pcie_service_card, work);
2971
2972         if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2973                                &card->work_flags))
2974                 mwifiex_pcie_device_dump_work(card->adapter);
2975         if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
2976                                &card->work_flags))
2977                 mwifiex_pcie_card_reset_work(card->adapter);
2978 }
2979
2980 /* This function dumps FW information */
2981 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
2982 {
2983         struct pcie_service_card *card = adapter->card;
2984
2985         if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2986                               &card->work_flags))
2987                 schedule_work(&card->work);
2988 }
2989
2990 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter)
2991 {
2992         struct pcie_service_card *card = adapter->card;
2993
2994         if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
2995                 schedule_work(&card->work);
2996 }
2997
2998 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter)
2999 {
3000         struct pcie_service_card *card = adapter->card;
3001         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3002         int ret;
3003
3004         card->cmdrsp_buf = NULL;
3005         ret = mwifiex_pcie_create_txbd_ring(adapter);
3006         if (ret) {
3007                 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n");
3008                 goto err_cre_txbd;
3009         }
3010
3011         ret = mwifiex_pcie_create_rxbd_ring(adapter);
3012         if (ret) {
3013                 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n");
3014                 goto err_cre_rxbd;
3015         }
3016
3017         ret = mwifiex_pcie_create_evtbd_ring(adapter);
3018         if (ret) {
3019                 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n");
3020                 goto err_cre_evtbd;
3021         }
3022
3023         ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
3024         if (ret) {
3025                 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n");
3026                 goto err_alloc_cmdbuf;
3027         }
3028
3029         if (reg->sleep_cookie) {
3030                 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
3031                 if (ret) {
3032                         mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n");
3033                         goto err_alloc_cookie;
3034                 }
3035         } else {
3036                 card->sleep_cookie_vbase = NULL;
3037         }
3038
3039         return 0;
3040
3041 err_alloc_cookie:
3042         mwifiex_pcie_delete_cmdrsp_buf(adapter);
3043 err_alloc_cmdbuf:
3044         mwifiex_pcie_delete_evtbd_ring(adapter);
3045 err_cre_evtbd:
3046         mwifiex_pcie_delete_rxbd_ring(adapter);
3047 err_cre_rxbd:
3048         mwifiex_pcie_delete_txbd_ring(adapter);
3049 err_cre_txbd:
3050         return ret;
3051 }
3052
3053 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter)
3054 {
3055         struct pcie_service_card *card = adapter->card;
3056         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3057
3058         if (reg->sleep_cookie)
3059                 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
3060
3061         mwifiex_pcie_delete_cmdrsp_buf(adapter);
3062         mwifiex_pcie_delete_evtbd_ring(adapter);
3063         mwifiex_pcie_delete_rxbd_ring(adapter);
3064         mwifiex_pcie_delete_txbd_ring(adapter);
3065 }
3066
3067 /*
3068  * This function initializes the PCI-E host memory space, WCB rings, etc.
3069  */
3070 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter)
3071 {
3072         struct pcie_service_card *card = adapter->card;
3073         int ret;
3074         struct pci_dev *pdev = card->dev;
3075
3076         pci_set_drvdata(pdev, card);
3077
3078         ret = pci_enable_device(pdev);
3079         if (ret)
3080                 goto err_enable_dev;
3081
3082         pci_set_master(pdev);
3083
3084         ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3085         if (ret) {
3086                 pr_err("dma_set_mask(32) failed: %d\n", ret);
3087                 goto err_set_dma_mask;
3088         }
3089
3090         ret = pci_request_region(pdev, 0, DRV_NAME);
3091         if (ret) {
3092                 pr_err("req_reg(0) error\n");
3093                 goto err_req_region0;
3094         }
3095         card->pci_mmap = pci_iomap(pdev, 0, 0);
3096         if (!card->pci_mmap) {
3097                 pr_err("iomap(0) error\n");
3098                 ret = -EIO;
3099                 goto err_iomap0;
3100         }
3101         ret = pci_request_region(pdev, 2, DRV_NAME);
3102         if (ret) {
3103                 pr_err("req_reg(2) error\n");
3104                 goto err_req_region2;
3105         }
3106         card->pci_mmap1 = pci_iomap(pdev, 2, 0);
3107         if (!card->pci_mmap1) {
3108                 pr_err("iomap(2) error\n");
3109                 ret = -EIO;
3110                 goto err_iomap2;
3111         }
3112
3113         pr_notice("PCI memory map Virt0: %pK PCI memory map Virt2: %pK\n",
3114                   card->pci_mmap, card->pci_mmap1);
3115
3116         ret = mwifiex_pcie_alloc_buffers(adapter);
3117         if (ret)
3118                 goto err_alloc_buffers;
3119
3120         return 0;
3121
3122 err_alloc_buffers:
3123         pci_iounmap(pdev, card->pci_mmap1);
3124 err_iomap2:
3125         pci_release_region(pdev, 2);
3126 err_req_region2:
3127         pci_iounmap(pdev, card->pci_mmap);
3128 err_iomap0:
3129         pci_release_region(pdev, 0);
3130 err_req_region0:
3131 err_set_dma_mask:
3132         pci_disable_device(pdev);
3133 err_enable_dev:
3134         return ret;
3135 }
3136
3137 /*
3138  * This function cleans up the allocated card buffers.
3139  */
3140 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter)
3141 {
3142         struct pcie_service_card *card = adapter->card;
3143         struct pci_dev *pdev = card->dev;
3144         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3145         u32 fw_status;
3146
3147         /* Perform the cancel_work_sync() only when we're not resetting
3148          * the card. It's because that function never returns if we're
3149          * in reset path. If we're here when resetting the card, it means
3150          * that we failed to reset the card (reset failure path).
3151          */
3152         if (!card->pci_reset_ongoing) {
3153                 mwifiex_dbg(adapter, MSG, "performing cancel_work_sync()...\n");
3154                 cancel_work_sync(&card->work);
3155                 mwifiex_dbg(adapter, MSG, "cancel_work_sync() done\n");
3156         } else {
3157                 mwifiex_dbg(adapter, MSG,
3158                             "skipped cancel_work_sync() because we're in card reset failure path\n");
3159         }
3160
3161         mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
3162         if (fw_status == FIRMWARE_READY_PCIE) {
3163                 mwifiex_dbg(adapter, INFO,
3164                             "Clearing driver ready signature\n");
3165                 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3166                         mwifiex_dbg(adapter, ERROR,
3167                                     "Failed to write driver not-ready signature\n");
3168         }
3169
3170         pci_disable_device(pdev);
3171
3172         pci_iounmap(pdev, card->pci_mmap);
3173         pci_iounmap(pdev, card->pci_mmap1);
3174         pci_release_region(pdev, 2);
3175         pci_release_region(pdev, 0);
3176
3177         mwifiex_pcie_free_buffers(adapter);
3178 }
3179
3180 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
3181 {
3182         int ret, i, j;
3183         struct pcie_service_card *card = adapter->card;
3184         struct pci_dev *pdev = card->dev;
3185
3186         if (card->pcie.reg->msix_support) {
3187                 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3188                         card->msix_entries[i].entry = i;
3189                 ret = pci_enable_msix_exact(pdev, card->msix_entries,
3190                                             MWIFIEX_NUM_MSIX_VECTORS);
3191                 if (!ret) {
3192                         for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
3193                                 card->msix_ctx[i].dev = pdev;
3194                                 card->msix_ctx[i].msg_id = i;
3195
3196                                 ret = request_irq(card->msix_entries[i].vector,
3197                                                   mwifiex_pcie_interrupt, 0,
3198                                                   "MWIFIEX_PCIE_MSIX",
3199                                                   &card->msix_ctx[i]);
3200                                 if (ret)
3201                                         break;
3202                         }
3203
3204                         if (ret) {
3205                                 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
3206                                             ret);
3207                                 for (j = 0; j < i; j++)
3208                                         free_irq(card->msix_entries[j].vector,
3209                                                  &card->msix_ctx[i]);
3210                                 pci_disable_msix(pdev);
3211                         } else {
3212                                 mwifiex_dbg(adapter, MSG, "MSIx enabled!");
3213                                 card->msix_enable = 1;
3214                                 return 0;
3215                         }
3216                 }
3217         }
3218
3219         if (pci_enable_msi(pdev) != 0)
3220                 pci_disable_msi(pdev);
3221         else
3222                 card->msi_enable = 1;
3223
3224         mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
3225
3226         card->share_irq_ctx.dev = pdev;
3227         card->share_irq_ctx.msg_id = -1;
3228         ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
3229                           "MRVL_PCIE", &card->share_irq_ctx);
3230         if (ret) {
3231                 pr_err("request_irq failed: ret=%d\n", ret);
3232                 return -1;
3233         }
3234
3235         return 0;
3236 }
3237
3238 /*
3239  * This function gets the firmware name for downloading by revision id
3240  *
3241  * Read revision id register to get revision id
3242  */
3243 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
3244 {
3245         int revision_id = 0;
3246         int version, magic;
3247         struct pcie_service_card *card = adapter->card;
3248
3249         switch (card->dev->device) {
3250         case PCIE_DEVICE_ID_MARVELL_88W8766P:
3251                 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
3252                 break;
3253         case PCIE_DEVICE_ID_MARVELL_88W8897:
3254                 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
3255                 mwifiex_read_reg(adapter, 0x0c58, &revision_id);
3256                 revision_id &= 0xff00;
3257                 switch (revision_id) {
3258                 case PCIE8897_A0:
3259                         strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
3260                         break;
3261                 case PCIE8897_B0:
3262                         strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
3263                         break;
3264                 default:
3265                         strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
3266
3267                         break;
3268                 }
3269                 break;
3270         case PCIE_DEVICE_ID_MARVELL_88W8997:
3271                 mwifiex_read_reg(adapter, 0x8, &revision_id);
3272                 mwifiex_read_reg(adapter, 0x0cd0, &version);
3273                 mwifiex_read_reg(adapter, 0x0cd4, &magic);
3274                 revision_id &= 0xff;
3275                 version &= 0x7;
3276                 magic &= 0xff;
3277                 if (revision_id == PCIE8997_A1 &&
3278                     magic == CHIP_MAGIC_VALUE &&
3279                     version == CHIP_VER_PCIEUART)
3280                         strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4);
3281                 else
3282                         strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4);
3283                 break;
3284         default:
3285                 break;
3286         }
3287 }
3288
3289 /*
3290  * This function registers the PCIE device.
3291  *
3292  * PCIE IRQ is claimed, block size is set and driver data is initialized.
3293  */
3294 static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
3295 {
3296         struct pcie_service_card *card = adapter->card;
3297
3298         /* save adapter pointer in card */
3299         card->adapter = adapter;
3300
3301         if (mwifiex_pcie_request_irq(adapter))
3302                 return -1;
3303
3304         adapter->tx_buf_size = card->pcie.tx_buf_size;
3305         adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
3306         adapter->num_mem_types = card->pcie.num_mem_types;
3307         adapter->ext_scan = card->pcie.can_ext_scan;
3308         mwifiex_pcie_get_fw_name(adapter);
3309
3310         return 0;
3311 }
3312
3313 /*
3314  * This function unregisters the PCIE device.
3315  *
3316  * The PCIE IRQ is released, the function is disabled and driver
3317  * data is set to null.
3318  */
3319 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
3320 {
3321         struct pcie_service_card *card = adapter->card;
3322         struct pci_dev *pdev = card->dev;
3323         int i;
3324
3325         if (card->msix_enable) {
3326                 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3327                         synchronize_irq(card->msix_entries[i].vector);
3328
3329                 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3330                         free_irq(card->msix_entries[i].vector,
3331                                  &card->msix_ctx[i]);
3332
3333                 card->msix_enable = 0;
3334                 pci_disable_msix(pdev);
3335         } else {
3336                 mwifiex_dbg(adapter, INFO,
3337                             "%s(): calling free_irq()\n", __func__);
3338                free_irq(card->dev->irq, &card->share_irq_ctx);
3339
3340                 if (card->msi_enable)
3341                         pci_disable_msi(pdev);
3342         }
3343         card->adapter = NULL;
3344 }
3345
3346 /*
3347  * This function initializes the PCI-E host memory space, WCB rings, etc.,
3348  * similar to mwifiex_init_pcie(), but without resetting PCI-E state.
3349  */
3350 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter)
3351 {
3352         struct pcie_service_card *card = adapter->card;
3353         struct pci_dev *pdev = card->dev;
3354
3355         /* tx_buf_size might be changed to 3584 by firmware during
3356          * data transfer, we should reset it to default size.
3357          */
3358         adapter->tx_buf_size = card->pcie.tx_buf_size;
3359
3360         mwifiex_pcie_alloc_buffers(adapter);
3361
3362         pci_set_master(pdev);
3363 }
3364
3365 /* This function cleans up the PCI-E host memory space. */
3366 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter)
3367 {
3368         struct pcie_service_card *card = adapter->card;
3369         const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3370         struct pci_dev *pdev = card->dev;
3371
3372         if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3373                 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n");
3374
3375         pci_clear_master(pdev);
3376
3377         adapter->seq_num = 0;
3378
3379         mwifiex_pcie_free_buffers(adapter);
3380 }
3381
3382 static struct mwifiex_if_ops pcie_ops = {
3383         .init_if =                      mwifiex_init_pcie,
3384         .cleanup_if =                   mwifiex_cleanup_pcie,
3385         .check_fw_status =              mwifiex_check_fw_status,
3386         .check_winner_status =          mwifiex_check_winner_status,
3387         .prog_fw =                      mwifiex_prog_fw_w_helper,
3388         .register_dev =                 mwifiex_register_dev,
3389         .unregister_dev =               mwifiex_unregister_dev,
3390         .enable_int =                   mwifiex_pcie_enable_host_int,
3391         .disable_int =                  mwifiex_pcie_disable_host_int_noerr,
3392         .process_int_status =           mwifiex_process_int_status,
3393         .host_to_card =                 mwifiex_pcie_host_to_card,
3394         .wakeup =                       mwifiex_pm_wakeup_card,
3395         .wakeup_complete =              mwifiex_pm_wakeup_card_complete,
3396
3397         /* PCIE specific */
3398         .cmdrsp_complete =              mwifiex_pcie_cmdrsp_complete,
3399         .event_complete =               mwifiex_pcie_event_complete,
3400         .update_mp_end_port =           NULL,
3401         .cleanup_mpa_buf =              NULL,
3402         .init_fw_port =                 mwifiex_pcie_init_fw_port,
3403         .clean_pcie_ring =              mwifiex_clean_pcie_ring_buf,
3404         .card_reset =                   mwifiex_pcie_card_reset,
3405         .reg_dump =                     mwifiex_pcie_reg_dump,
3406         .device_dump =                  mwifiex_pcie_device_dump,
3407         .down_dev =                     mwifiex_pcie_down_dev,
3408         .up_dev =                       mwifiex_pcie_up_dev,
3409 };
3410
3411 module_pci_driver(mwifiex_pcie);
3412
3413 MODULE_AUTHOR("Marvell International Ltd.");
3414 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3415 MODULE_VERSION(PCIE_VERSION);
3416 MODULE_LICENSE("GPL v2");