drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2017 Intel Deutschland GmbH
   9  * Copyright(c) 2018        Intel Corporation
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of version 2 of the GNU General Public License as
  13  * published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * BSD LICENSE
  21  *
  22  * Copyright(c) 2017 Intel Deutschland GmbH
  23  * Copyright(c) 2018        Intel Corporation
  24  * All rights reserved.
  25  *
  26  * Redistribution and use in source and binary forms, with or without
  27  * modification, are permitted provided that the following conditions
  28  * are met:
  29  *
  30  *  * Redistributions of source code must retain the above copyright
  31  *    notice, this list of conditions and the following disclaimer.
  32  *  * Redistributions in binary form must reproduce the above copyright
  33  *    notice, this list of conditions and the following disclaimer in
  34  *    the documentation and/or other materials provided with the
  35  *    distribution.
  36  *  * Neither the name Intel Corporation nor the names of its
  37  *    contributors may be used to endorse or promote products derived
  38  *    from this software without specific prior written permission.
  39  *
  40  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  41  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  42  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  43  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  44  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  45  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  46  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  47  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  48  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  49  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  50  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  51  *
  52  *****************************************************************************/
  53 #include <linux/pm_runtime.h>
  54 #include <net/tso.h>
  55 #include <linux/tcp.h>
  56
  57 #include "iwl-debug.h"
  58 #include "iwl-csr.h"
  59 #include "iwl-io.h"
  60 #include "internal.h"
  61 #include "fw/api/tx.h"
  62
  63  /*
  64  * iwl_pcie_gen2_tx_stop - Stop all Tx DMA channels
  65  */
  66 void iwl_pcie_gen2_tx_stop(struct iwl_trans *trans)
  67 {
  68         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
  69         int txq_id;
  70
  71         /*
  72          * This function can be called before the op_mode disabled the
  73          * queues. This happens when we have an rfkill interrupt.
  74          * Since we stop Tx altogether - mark the queues as stopped.
  75          */
  76         memset(trans_pcie->queue_stopped, 0, sizeof(trans_pcie->queue_stopped));
  77         memset(trans_pcie->queue_used, 0, sizeof(trans_pcie->queue_used));
  78
  79         /* Unmap DMA from host system and free skb's */
  80         for (txq_id = 0; txq_id < ARRAY_SIZE(trans_pcie->txq); txq_id++) {
  81                 if (!trans_pcie->txq[txq_id])
  82                         continue;
  83                 iwl_pcie_gen2_txq_unmap(trans, txq_id);
  84         }
  85 }
  86
  87 /*
  88  * iwl_pcie_txq_update_byte_tbl - Set up entry in Tx byte-count array
  89  */
  90 void iwl_pcie_gen2_update_byte_tbl(struct iwl_trans_pcie *trans_pcie,
  91                                    struct iwl_txq *txq, u16 byte_cnt,
  92                                    int num_tbs)
  93 {
  94         struct iwlagn_scd_bc_tbl *scd_bc_tbl = txq->bc_tbl.addr;
  95         struct iwl_trans *trans = iwl_trans_pcie_get_trans(trans_pcie);
  96         struct iwl_gen3_bc_tbl *scd_bc_tbl_gen3 = txq->bc_tbl.addr;
  97         int idx = iwl_pcie_get_cmd_index(txq, txq->write_ptr);
  98         u8 filled_tfd_size, num_fetch_chunks;
  99         u16 len = byte_cnt;
 100         __le16 bc_ent;
 101
 102         if (trans_pcie->bc_table_dword)
 103                 len = DIV_ROUND_UP(len, 4);
 104
 105         if (WARN_ON(len > 0xFFF || idx >= txq->n_window))
 106                 return;
 107
 108         filled_tfd_size = offsetof(struct iwl_tfh_tfd, tbs) +
 109                                    num_tbs * sizeof(struct iwl_tfh_tb);
 110         /*
 111          * filled_tfd_size contains the number of filled bytes in the TFD.
 112          * Dividing it by 64 will give the number of chunks to fetch
 113          * to SRAM- 0 for one chunk, 1 for 2 and so on.
 114          * If, for example, TFD contains only 3 TBs then 32 bytes
 115          * of the TFD are used, and only one chunk of 64 bytes should
 116          * be fetched
 117          */
 118         num_fetch_chunks = DIV_ROUND_UP(filled_tfd_size, 64) - 1;
 119
 120         bc_ent = cpu_to_le16(len | (num_fetch_chunks << 12));
 121         if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560)
 122                 scd_bc_tbl_gen3->tfd_offset[idx] = bc_ent;
 123         else
 124                 scd_bc_tbl->tfd_offset[idx] = bc_ent;
 125 }
 126
 127 /*
 128  * iwl_pcie_gen2_txq_inc_wr_ptr - Send new write index to hardware
 129  */
 130 void iwl_pcie_gen2_txq_inc_wr_ptr(struct iwl_trans *trans,
 131                                   struct iwl_txq *txq)
 132 {
 133         lockdep_assert_held(&txq->lock);
 134
 135         IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq->id, txq->write_ptr);
 136
 137         /*
 138          * if not in power-save mode, uCode will never sleep when we're
 139          * trying to tx (during RFKILL, we're not trying to tx).
 140          */
 141         iwl_write32(trans, HBUS_TARG_WRPTR, txq->write_ptr | (txq->id << 16));
 142 }
 143
 144 static u8 iwl_pcie_gen2_get_num_tbs(struct iwl_trans *trans,
 145                                     struct iwl_tfh_tfd *tfd)
 146 {
 147         return le16_to_cpu(tfd->num_tbs) & 0x1f;
 148 }
 149
 150 static void iwl_pcie_gen2_tfd_unmap(struct iwl_trans *trans,
 151                                     struct iwl_cmd_meta *meta,
 152                                     struct iwl_tfh_tfd *tfd)
 153 {
 154         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 155         int i, num_tbs;
 156
 157         /* Sanity check on number of chunks */
 158         num_tbs = iwl_pcie_gen2_get_num_tbs(trans, tfd);
 159
 160         if (num_tbs > trans_pcie->max_tbs) {
 161                 IWL_ERR(trans, "Too many chunks: %i\n", num_tbs);
 162                 return;
 163         }
 164
 165         /* first TB is never freed - it's the bidirectional DMA data */
 166         for (i = 1; i < num_tbs; i++) {
 167                 if (meta->tbs & BIT(i))
 168                         dma_unmap_page(trans->dev,
 169                                        le64_to_cpu(tfd->tbs[i].addr),
 170                                        le16_to_cpu(tfd->tbs[i].tb_len),
 171                                        DMA_TO_DEVICE);
 172                 else
 173                         dma_unmap_single(trans->dev,
 174                                          le64_to_cpu(tfd->tbs[i].addr),
 175                                          le16_to_cpu(tfd->tbs[i].tb_len),
 176                                          DMA_TO_DEVICE);
 177         }
 178
 179         tfd->num_tbs = 0;
 180 }
 181
 182 static void iwl_pcie_gen2_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq)
 183 {
 184         /* rd_ptr is bounded by TFD_QUEUE_SIZE_MAX and
 185          * idx is bounded by n_window
 186          */
 187         int idx = iwl_pcie_get_cmd_index(txq, txq->read_ptr);
 188
 189         lockdep_assert_held(&txq->lock);
 190
 191         iwl_pcie_gen2_tfd_unmap(trans, &txq->entries[idx].meta,
 192                                 iwl_pcie_get_tfd(trans, txq, idx));
 193
 194         /* free SKB */
 195         if (txq->entries) {
 196                 struct sk_buff *skb;
 197
 198                 skb = txq->entries[idx].skb;
 199
 200                 /* Can be called from irqs-disabled context
 201                  * If skb is not NULL, it means that the whole queue is being
 202                  * freed and that the queue is not empty - free the skb
 203                  */
 204                 if (skb) {
 205                         iwl_op_mode_free_skb(trans->op_mode, skb);
 206                         txq->entries[idx].skb = NULL;
 207                 }
 208         }
 209 }
 210
 211 static int iwl_pcie_gen2_set_tb(struct iwl_trans *trans,
 212                                 struct iwl_tfh_tfd *tfd, dma_addr_t addr,
 213                                 u16 len)
 214 {
 215         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 216         int idx = iwl_pcie_gen2_get_num_tbs(trans, tfd);
 217         struct iwl_tfh_tb *tb = &tfd->tbs[idx];
 218
 219         /* Each TFD can point to a maximum max_tbs Tx buffers */
 220         if (le16_to_cpu(tfd->num_tbs) >= trans_pcie->max_tbs) {
 221                 IWL_ERR(trans, "Error can not send more than %d chunks\n",
 222                         trans_pcie->max_tbs);
 223                 return -EINVAL;
 224         }
 225
 226         put_unaligned_le64(addr, &tb->addr);
 227         tb->tb_len = cpu_to_le16(len);
 228
 229         tfd->num_tbs = cpu_to_le16(idx + 1);
 230
 231         return idx;
 232 }
 233
 234 static int iwl_pcie_gen2_build_amsdu(struct iwl_trans *trans,
 235                                      struct sk_buff *skb,
 236                                      struct iwl_tfh_tfd *tfd, int start_len,
 237                                      u8 hdr_len, struct iwl_device_cmd *dev_cmd)
 238 {
 239 #ifdef CONFIG_INET
 240         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 241         struct iwl_tx_cmd *tx_cmd = (void *)dev_cmd->payload;
 242         struct ieee80211_hdr *hdr = (void *)skb->data;
 243         unsigned int snap_ip_tcp_hdrlen, ip_hdrlen, total_len, hdr_room;
 244         unsigned int mss = skb_shinfo(skb)->gso_size;
 245         u16 length, iv_len, amsdu_pad;
 246         u8 *start_hdr;
 247         struct iwl_tso_hdr_page *hdr_page;
 248         struct page **page_ptr;
 249         struct tso_t tso;
 250
 251         /* if the packet is protected, then it must be CCMP or GCMP */
 252         iv_len = ieee80211_has_protected(hdr->frame_control) ?
 253                 IEEE80211_CCMP_HDR_LEN : 0;
 254
 255         trace_iwlwifi_dev_tx(trans->dev, skb, tfd, sizeof(*tfd),
 256                              &dev_cmd->hdr, start_len, 0);
 257
 258         ip_hdrlen = skb_transport_header(skb) - skb_network_header(skb);
 259         snap_ip_tcp_hdrlen = 8 + ip_hdrlen + tcp_hdrlen(skb);
 260         total_len = skb->len - snap_ip_tcp_hdrlen - hdr_len - iv_len;
 261         amsdu_pad = 0;
 262
 263         /* total amount of header we may need for this A-MSDU */
 264         hdr_room = DIV_ROUND_UP(total_len, mss) *
 265                 (3 + snap_ip_tcp_hdrlen + sizeof(struct ethhdr)) + iv_len;
 266
 267         /* Our device supports 9 segments at most, it will fit in 1 page */
 268         hdr_page = get_page_hdr(trans, hdr_room);
 269         if (!hdr_page)
 270                 return -ENOMEM;
 271
 272         get_page(hdr_page->page);
 273         start_hdr = hdr_page->pos;
 274         page_ptr = (void *)((u8 *)skb->cb + trans_pcie->page_offs);
 275         *page_ptr = hdr_page->page;
 276         memcpy(hdr_page->pos, skb->data + hdr_len, iv_len);
 277         hdr_page->pos += iv_len;
 278
 279         /*
 280          * Pull the ieee80211 header + IV to be able to use TSO core,
 281          * we will restore it for the tx_status flow.
 282          */
 283         skb_pull(skb, hdr_len + iv_len);
 284
 285         /*
 286          * Remove the length of all the headers that we don't actually
 287          * have in the MPDU by themselves, but that we duplicate into
 288          * all the different MSDUs inside the A-MSDU.
 289          */
 290         le16_add_cpu(&tx_cmd->len, -snap_ip_tcp_hdrlen);
 291
 292         tso_start(skb, &tso);
 293
 294         while (total_len) {
 295                 /* this is the data left for this subframe */
 296                 unsigned int data_left = min_t(unsigned int, mss, total_len);
 297                 struct sk_buff *csum_skb = NULL;
 298                 unsigned int tb_len;
 299                 dma_addr_t tb_phys;
 300                 u8 *subf_hdrs_start = hdr_page->pos;
 301
 302                 total_len -= data_left;
 303
 304                 memset(hdr_page->pos, 0, amsdu_pad);
 305                 hdr_page->pos += amsdu_pad;
 306                 amsdu_pad = (4 - (sizeof(struct ethhdr) + snap_ip_tcp_hdrlen +
 307                                   data_left)) & 0x3;
 308                 ether_addr_copy(hdr_page->pos, ieee80211_get_DA(hdr));
 309                 hdr_page->pos += ETH_ALEN;
 310                 ether_addr_copy(hdr_page->pos, ieee80211_get_SA(hdr));
 311                 hdr_page->pos += ETH_ALEN;
 312
 313                 length = snap_ip_tcp_hdrlen + data_left;
 314                 *((__be16 *)hdr_page->pos) = cpu_to_be16(length);
 315                 hdr_page->pos += sizeof(length);
 316
 317                 /*
 318                  * This will copy the SNAP as well which will be considered
 319                  * as MAC header.
 320                  */
 321                 tso_build_hdr(skb, hdr_page->pos, &tso, data_left, !total_len);
 322
 323                 hdr_page->pos += snap_ip_tcp_hdrlen;
 324
 325                 tb_len = hdr_page->pos - start_hdr;
 326                 tb_phys = dma_map_single(trans->dev, start_hdr,
 327                                          tb_len, DMA_TO_DEVICE);
 328                 if (unlikely(dma_mapping_error(trans->dev, tb_phys))) {
 329                         dev_kfree_skb(csum_skb);
 330                         goto out_err;
 331                 }
 332                 iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, tb_len);
 333                 trace_iwlwifi_dev_tx_tb(trans->dev, skb, start_hdr, tb_len);
 334                 /* add this subframe's headers' length to the tx_cmd */
 335                 le16_add_cpu(&tx_cmd->len, hdr_page->pos - subf_hdrs_start);
 336
 337                 /* prepare the start_hdr for the next subframe */
 338                 start_hdr = hdr_page->pos;
 339
 340                 /* put the payload */
 341                 while (data_left) {
 342                         tb_len = min_t(unsigned int, tso.size, data_left);
 343                         tb_phys = dma_map_single(trans->dev, tso.data,
 344                                                  tb_len, DMA_TO_DEVICE);
 345                         if (unlikely(dma_mapping_error(trans->dev, tb_phys))) {
 346                                 dev_kfree_skb(csum_skb);
 347                                 goto out_err;
 348                         }
 349                         iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, tb_len);
 350                         trace_iwlwifi_dev_tx_tb(trans->dev, skb, tso.data,
 351                                                 tb_len);
 352
 353                         data_left -= tb_len;
 354                         tso_build_data(skb, &tso, tb_len);
 355                 }
 356         }
 357
 358         /* re -add the WiFi header and IV */
 359         skb_push(skb, hdr_len + iv_len);
 360
 361         return 0;
 362
 363 out_err:
 364 #endif
 365         return -EINVAL;
 366 }
 367
 368 static struct
 369 iwl_tfh_tfd *iwl_pcie_gen2_build_tx_amsdu(struct iwl_trans *trans,
 370                                           struct iwl_txq *txq,
 371                                           struct iwl_device_cmd *dev_cmd,
 372                                           struct sk_buff *skb,
 373                                           struct iwl_cmd_meta *out_meta,
 374                                           int hdr_len,
 375                                           int tx_cmd_len)
 376 {
 377         int idx = iwl_pcie_get_cmd_index(txq, txq->write_ptr);
 378         struct iwl_tfh_tfd *tfd = iwl_pcie_get_tfd(trans, txq, idx);
 379         dma_addr_t tb_phys;
 380         int len;
 381         void *tb1_addr;
 382
 383         tb_phys = iwl_pcie_get_first_tb_dma(txq, idx);
 384
 385         iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, IWL_FIRST_TB_SIZE);
 386
 387         /*
 388          * The second TB (tb1) points to the remainder of the TX command
 389          * and the 802.11 header - dword aligned size
 390          * (This calculation modifies the TX command, so do it before the
 391          * setup of the first TB)
 392          */
 393         len = tx_cmd_len + sizeof(struct iwl_cmd_header) + hdr_len -
 394               IWL_FIRST_TB_SIZE;
 395
 396         /* do not align A-MSDU to dword as the subframe header aligns it */
 397
 398         /* map the data for TB1 */
 399         tb1_addr = ((u8 *)&dev_cmd->hdr) + IWL_FIRST_TB_SIZE;
 400         tb_phys = dma_map_single(trans->dev, tb1_addr, len, DMA_TO_DEVICE);
 401         if (unlikely(dma_mapping_error(trans->dev, tb_phys)))
 402                 goto out_err;
 403         iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, len);
 404
 405         if (iwl_pcie_gen2_build_amsdu(trans, skb, tfd,
 406                                       len + IWL_FIRST_TB_SIZE,
 407                                       hdr_len, dev_cmd))
 408                 goto out_err;
 409
 410         /* building the A-MSDU might have changed this data, memcpy it now */
 411         memcpy(&txq->first_tb_bufs[idx], &dev_cmd->hdr, IWL_FIRST_TB_SIZE);
 412         return tfd;
 413
 414 out_err:
 415         iwl_pcie_gen2_tfd_unmap(trans, out_meta, tfd);
 416         return NULL;
 417 }
 418
 419 static int iwl_pcie_gen2_tx_add_frags(struct iwl_trans *trans,
 420                                       struct sk_buff *skb,
 421                                       struct iwl_tfh_tfd *tfd,
 422                                       struct iwl_cmd_meta *out_meta)
 423 {
 424         int i;
 425
 426         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 427                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
 428                 dma_addr_t tb_phys;
 429                 int tb_idx;
 430
 431                 if (!skb_frag_size(frag))
 432                         continue;
 433
 434                 tb_phys = skb_frag_dma_map(trans->dev, frag, 0,
 435                                            skb_frag_size(frag), DMA_TO_DEVICE);
 436
 437                 if (unlikely(dma_mapping_error(trans->dev, tb_phys)))
 438                         return -ENOMEM;
 439                 tb_idx = iwl_pcie_gen2_set_tb(trans, tfd, tb_phys,
 440                                               skb_frag_size(frag));
 441                 trace_iwlwifi_dev_tx_tb(trans->dev, skb,
 442                                         skb_frag_address(frag),
 443                                         skb_frag_size(frag));
 444                 if (tb_idx < 0)
 445                         return tb_idx;
 446
 447                 out_meta->tbs |= BIT(tb_idx);
 448         }
 449
 450         return 0;
 451 }
 452
 453 static struct
 454 iwl_tfh_tfd *iwl_pcie_gen2_build_tx(struct iwl_trans *trans,
 455                                     struct iwl_txq *txq,
 456                                     struct iwl_device_cmd *dev_cmd,
 457                                     struct sk_buff *skb,
 458                                     struct iwl_cmd_meta *out_meta,
 459                                     int hdr_len,
 460                                     int tx_cmd_len,
 461                                     bool pad)
 462 {
 463         int idx = iwl_pcie_get_cmd_index(txq, txq->write_ptr);
 464         struct iwl_tfh_tfd *tfd = iwl_pcie_get_tfd(trans, txq, idx);
 465         dma_addr_t tb_phys;
 466         int len, tb1_len, tb2_len;
 467         void *tb1_addr;
 468
 469         tb_phys = iwl_pcie_get_first_tb_dma(txq, idx);
 470
 471         /* The first TB points to bi-directional DMA data */
 472         memcpy(&txq->first_tb_bufs[idx], &dev_cmd->hdr, IWL_FIRST_TB_SIZE);
 473
 474         iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, IWL_FIRST_TB_SIZE);
 475
 476         /*
 477          * The second TB (tb1) points to the remainder of the TX command
 478          * and the 802.11 header - dword aligned size
 479          * (This calculation modifies the TX command, so do it before the
 480          * setup of the first TB)
 481          */
 482         len = tx_cmd_len + sizeof(struct iwl_cmd_header) + hdr_len -
 483               IWL_FIRST_TB_SIZE;
 484
 485         if (pad)
 486                 tb1_len = ALIGN(len, 4);
 487         else
 488                 tb1_len = len;
 489
 490         /* map the data for TB1 */
 491         tb1_addr = ((u8 *)&dev_cmd->hdr) + IWL_FIRST_TB_SIZE;
 492         tb_phys = dma_map_single(trans->dev, tb1_addr, tb1_len, DMA_TO_DEVICE);
 493         if (unlikely(dma_mapping_error(trans->dev, tb_phys)))
 494                 goto out_err;
 495         iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, tb1_len);
 496         trace_iwlwifi_dev_tx(trans->dev, skb, tfd, sizeof(*tfd), &dev_cmd->hdr,
 497                              IWL_FIRST_TB_SIZE + tb1_len, hdr_len);
 498
 499         /* set up TFD's third entry to point to remainder of skb's head */
 500         tb2_len = skb_headlen(skb) - hdr_len;
 501
 502         if (tb2_len > 0) {
 503                 tb_phys = dma_map_single(trans->dev, skb->data + hdr_len,
 504                                          tb2_len, DMA_TO_DEVICE);
 505                 if (unlikely(dma_mapping_error(trans->dev, tb_phys)))
 506                         goto out_err;
 507                 iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, tb2_len);
 508                 trace_iwlwifi_dev_tx_tb(trans->dev, skb,
 509                                         skb->data + hdr_len,
 510                                         tb2_len);
 511         }
 512
 513         if (iwl_pcie_gen2_tx_add_frags(trans, skb, tfd, out_meta))
 514                 goto out_err;
 515
 516         return tfd;
 517
 518 out_err:
 519         iwl_pcie_gen2_tfd_unmap(trans, out_meta, tfd);
 520         return NULL;
 521 }
 522
 523 static
 524 struct iwl_tfh_tfd *iwl_pcie_gen2_build_tfd(struct iwl_trans *trans,
 525                                             struct iwl_txq *txq,
 526                                             struct iwl_device_cmd *dev_cmd,
 527                                             struct sk_buff *skb,
 528                                             struct iwl_cmd_meta *out_meta)
 529 {
 530         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
 531         int idx = iwl_pcie_get_cmd_index(txq, txq->write_ptr);
 532         struct iwl_tfh_tfd *tfd = iwl_pcie_get_tfd(trans, txq, idx);
 533         int len, hdr_len;
 534         bool amsdu;
 535
 536         /* There must be data left over for TB1 or this code must be changed */
 537         BUILD_BUG_ON(sizeof(struct iwl_tx_cmd_gen2) < IWL_FIRST_TB_SIZE);
 538
 539         memset(tfd, 0, sizeof(*tfd));
 540
 541         if (trans->cfg->device_family < IWL_DEVICE_FAMILY_22560)
 542                 len = sizeof(struct iwl_tx_cmd_gen2);
 543         else
 544                 len = sizeof(struct iwl_tx_cmd_gen3);
 545
 546         amsdu = ieee80211_is_data_qos(hdr->frame_control) &&
 547                         (*ieee80211_get_qos_ctl(hdr) &
 548                          IEEE80211_QOS_CTL_A_MSDU_PRESENT);
 549
 550         hdr_len = ieee80211_hdrlen(hdr->frame_control);
 551
 552         /*
 553          * Only build A-MSDUs here if doing so by GSO, otherwise it may be
 554          * an A-MSDU for other reasons, e.g. NAN or an A-MSDU having been
 555          * built in the higher layers already.
 556          */
 557         if (amsdu && skb_shinfo(skb)->gso_size)
 558                 return iwl_pcie_gen2_build_tx_amsdu(trans, txq, dev_cmd, skb,
 559                                                     out_meta, hdr_len, len);
 560
 561         return iwl_pcie_gen2_build_tx(trans, txq, dev_cmd, skb, out_meta,
 562                                       hdr_len, len, !amsdu);
 563 }
 564
 565 int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
 566                            struct iwl_device_cmd *dev_cmd, int txq_id)
 567 {
 568         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 569         struct iwl_cmd_meta *out_meta;
 570         struct iwl_txq *txq = trans_pcie->txq[txq_id];
 571         u16 cmd_len;
 572         int idx;
 573         void *tfd;
 574
 575         if (WARN_ONCE(!test_bit(txq_id, trans_pcie->queue_used),
 576                       "TX on unused queue %d\n", txq_id))
 577                 return -EINVAL;
 578
 579         if (skb_is_nonlinear(skb) &&
 580             skb_shinfo(skb)->nr_frags > IWL_PCIE_MAX_FRAGS(trans_pcie) &&
 581             __skb_linearize(skb))
 582                 return -ENOMEM;
 583
 584         spin_lock(&txq->lock);
 585
 586         if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560) {
 587                 struct iwl_tx_cmd_gen3 *tx_cmd_gen3 =
 588                         (void *)dev_cmd->payload;
 589
 590                 cmd_len = le16_to_cpu(tx_cmd_gen3->len);
 591         } else {
 592                 struct iwl_tx_cmd_gen2 *tx_cmd_gen2 =
 593                         (void *)dev_cmd->payload;
 594
 595                 cmd_len = le16_to_cpu(tx_cmd_gen2->len);
 596         }
 597
 598         if (iwl_queue_space(trans, txq) < txq->high_mark) {
 599                 iwl_stop_queue(trans, txq);
 600
 601                 /* don't put the packet on the ring, if there is no room */
 602                 if (unlikely(iwl_queue_space(trans, txq) < 3)) {
 603                         struct iwl_device_cmd **dev_cmd_ptr;
 604
 605                         dev_cmd_ptr = (void *)((u8 *)skb->cb +
 606                                                trans_pcie->dev_cmd_offs);
 607
 608                         *dev_cmd_ptr = dev_cmd;
 609                         __skb_queue_tail(&txq->overflow_q, skb);
 610                         spin_unlock(&txq->lock);
 611                         return 0;
 612                 }
 613         }
 614
 615         idx = iwl_pcie_get_cmd_index(txq, txq->write_ptr);
 616
 617         /* Set up driver data for this TFD */
 618         txq->entries[idx].skb = skb;
 619         txq->entries[idx].cmd = dev_cmd;
 620
 621         dev_cmd->hdr.sequence =
 622                 cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
 623                             INDEX_TO_SEQ(idx)));
 624
 625         /* Set up first empty entry in queue's array of Tx/cmd buffers */
 626         out_meta = &txq->entries[idx].meta;
 627         out_meta->flags = 0;
 628
 629         tfd = iwl_pcie_gen2_build_tfd(trans, txq, dev_cmd, skb, out_meta);
 630         if (!tfd) {
 631                 spin_unlock(&txq->lock);
 632                 return -1;
 633         }
 634
 635         /* Set up entry for this TFD in Tx byte-count array */
 636         iwl_pcie_gen2_update_byte_tbl(trans_pcie, txq, cmd_len,
 637                                       iwl_pcie_gen2_get_num_tbs(trans, tfd));
 638
 639         /* start timer if queue currently empty */
 640         if (txq->read_ptr == txq->write_ptr) {
 641                 if (txq->wd_timeout)
 642                         mod_timer(&txq->stuck_timer, jiffies + txq->wd_timeout);
 643                 IWL_DEBUG_RPM(trans, "Q: %d first tx - take ref\n", txq->id);
 644                 iwl_trans_ref(trans);
 645         }
 646
 647         /* Tell device the write index *just past* this latest filled TFD */
 648         txq->write_ptr = iwl_queue_inc_wrap(trans, txq->write_ptr);
 649         iwl_pcie_gen2_txq_inc_wr_ptr(trans, txq);
 650         /*
 651          * At this point the frame is "transmitted" successfully
 652          * and we will get a TX status notification eventually.
 653          */
 654         spin_unlock(&txq->lock);
 655         return 0;
 656 }
 657
 658 /*************** HOST COMMAND QUEUE FUNCTIONS   *****/
 659
 660 /*
 661  * iwl_pcie_gen2_enqueue_hcmd - enqueue a uCode command
 662  * @priv: device private data point
 663  * @cmd: a pointer to the ucode command structure
 664  *
 665  * The function returns < 0 values to indicate the operation
 666  * failed. On success, it returns the index (>= 0) of command in the
 667  * command queue.
 668  */
 669 static int iwl_pcie_gen2_enqueue_hcmd(struct iwl_trans *trans,
 670                                       struct iwl_host_cmd *cmd)
 671 {
 672         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 673         struct iwl_txq *txq = trans_pcie->txq[trans_pcie->cmd_queue];
 674         struct iwl_device_cmd *out_cmd;
 675         struct iwl_cmd_meta *out_meta;
 676         unsigned long flags;
 677         void *dup_buf = NULL;
 678         dma_addr_t phys_addr;
 679         int i, cmd_pos, idx;
 680         u16 copy_size, cmd_size, tb0_size;
 681         bool had_nocopy = false;
 682         u8 group_id = iwl_cmd_groupid(cmd->id);
 683         const u8 *cmddata[IWL_MAX_CMD_TBS_PER_TFD];
 684         u16 cmdlen[IWL_MAX_CMD_TBS_PER_TFD];
 685         struct iwl_tfh_tfd *tfd;
 686
 687         copy_size = sizeof(struct iwl_cmd_header_wide);
 688         cmd_size = sizeof(struct iwl_cmd_header_wide);
 689
 690         for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) {
 691                 cmddata[i] = cmd->data[i];
 692                 cmdlen[i] = cmd->len[i];
 693
 694                 if (!cmd->len[i])
 695                         continue;
 696
 697                 /* need at least IWL_FIRST_TB_SIZE copied */
 698                 if (copy_size < IWL_FIRST_TB_SIZE) {
 699                         int copy = IWL_FIRST_TB_SIZE - copy_size;
 700
 701                         if (copy > cmdlen[i])
 702                                 copy = cmdlen[i];
 703                         cmdlen[i] -= copy;
 704                         cmddata[i] += copy;
 705                         copy_size += copy;
 706                 }
 707
 708                 if (cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY) {
 709                         had_nocopy = true;
 710                         if (WARN_ON(cmd->dataflags[i] & IWL_HCMD_DFL_DUP)) {
 711                                 idx = -EINVAL;
 712                                 goto free_dup_buf;
 713                         }
 714                 } else if (cmd->dataflags[i] & IWL_HCMD_DFL_DUP) {
 715                         /*
 716                          * This is also a chunk that isn't copied
 717                          * to the static buffer so set had_nocopy.
 718                          */
 719                         had_nocopy = true;
 720
 721                         /* only allowed once */
 722                         if (WARN_ON(dup_buf)) {
 723                                 idx = -EINVAL;
 724                                 goto free_dup_buf;
 725                         }
 726
 727                         dup_buf = kmemdup(cmddata[i], cmdlen[i],
 728                                           GFP_ATOMIC);
 729                         if (!dup_buf)
 730                                 return -ENOMEM;
 731                 } else {
 732                         /* NOCOPY must not be followed by normal! */
 733                         if (WARN_ON(had_nocopy)) {
 734                                 idx = -EINVAL;
 735                                 goto free_dup_buf;
 736                         }
 737                         copy_size += cmdlen[i];
 738                 }
 739                 cmd_size += cmd->len[i];
 740         }
 741
 742         /*
 743          * If any of the command structures end up being larger than the
 744          * TFD_MAX_PAYLOAD_SIZE and they aren't dynamically allocated into
 745          * separate TFDs, then we will need to increase the size of the buffers
 746          */
 747         if (WARN(copy_size > TFD_MAX_PAYLOAD_SIZE,
 748                  "Command %s (%#x) is too large (%d bytes)\n",
 749                  iwl_get_cmd_string(trans, cmd->id), cmd->id, copy_size)) {
 750                 idx = -EINVAL;
 751                 goto free_dup_buf;
 752         }
 753
 754         spin_lock_bh(&txq->lock);
 755
 756         idx = iwl_pcie_get_cmd_index(txq, txq->write_ptr);
 757         tfd = iwl_pcie_get_tfd(trans, txq, txq->write_ptr);
 758         memset(tfd, 0, sizeof(*tfd));
 759
 760         if (iwl_queue_space(trans, txq) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
 761                 spin_unlock_bh(&txq->lock);
 762
 763                 IWL_ERR(trans, "No space in command queue\n");
 764                 iwl_op_mode_cmd_queue_full(trans->op_mode);
 765                 idx = -ENOSPC;
 766                 goto free_dup_buf;
 767         }
 768
 769         out_cmd = txq->entries[idx].cmd;
 770         out_meta = &txq->entries[idx].meta;
 771
 772         /* re-initialize to NULL */
 773         memset(out_meta, 0, sizeof(*out_meta));
 774         if (cmd->flags & CMD_WANT_SKB)
 775                 out_meta->source = cmd;
 776
 777         /* set up the header */
 778         out_cmd->hdr_wide.cmd = iwl_cmd_opcode(cmd->id);
 779         out_cmd->hdr_wide.group_id = group_id;
 780         out_cmd->hdr_wide.version = iwl_cmd_version(cmd->id);
 781         out_cmd->hdr_wide.length =
 782                 cpu_to_le16(cmd_size - sizeof(struct iwl_cmd_header_wide));
 783         out_cmd->hdr_wide.reserved = 0;
 784         out_cmd->hdr_wide.sequence =
 785                 cpu_to_le16(QUEUE_TO_SEQ(trans_pcie->cmd_queue) |
 786                                          INDEX_TO_SEQ(txq->write_ptr));
 787
 788         cmd_pos = sizeof(struct iwl_cmd_header_wide);
 789         copy_size = sizeof(struct iwl_cmd_header_wide);
 790
 791         /* and copy the data that needs to be copied */
 792         for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) {
 793                 int copy;
 794
 795                 if (!cmd->len[i])
 796                         continue;
 797
 798                 /* copy everything if not nocopy/dup */
 799                 if (!(cmd->dataflags[i] & (IWL_HCMD_DFL_NOCOPY |
 800                                            IWL_HCMD_DFL_DUP))) {
 801                         copy = cmd->len[i];
 802
 803                         memcpy((u8 *)out_cmd + cmd_pos, cmd->data[i], copy);
 804                         cmd_pos += copy;
 805                         copy_size += copy;
 806                         continue;
 807                 }
 808
 809                 /*
 810                  * Otherwise we need at least IWL_FIRST_TB_SIZE copied
 811                  * in total (for bi-directional DMA), but copy up to what
 812                  * we can fit into the payload for debug dump purposes.
 813                  */
 814                 copy = min_t(int, TFD_MAX_PAYLOAD_SIZE - cmd_pos, cmd->len[i]);
 815
 816                 memcpy((u8 *)out_cmd + cmd_pos, cmd->data[i], copy);
 817                 cmd_pos += copy;
 818
 819                 /* However, treat copy_size the proper way, we need it below */
 820                 if (copy_size < IWL_FIRST_TB_SIZE) {
 821                         copy = IWL_FIRST_TB_SIZE - copy_size;
 822
 823                         if (copy > cmd->len[i])
 824                                 copy = cmd->len[i];
 825                         copy_size += copy;
 826                 }
 827         }
 828
 829         IWL_DEBUG_HC(trans,
 830                      "Sending command %s (%.2x.%.2x), seq: 0x%04X, %d bytes at %d[%d]:%d\n",
 831                      iwl_get_cmd_string(trans, cmd->id), group_id,
 832                      out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
 833                      cmd_size, txq->write_ptr, idx, trans_pcie->cmd_queue);
 834
 835         /* start the TFD with the minimum copy bytes */
 836         tb0_size = min_t(int, copy_size, IWL_FIRST_TB_SIZE);
 837         memcpy(&txq->first_tb_bufs[idx], &out_cmd->hdr, tb0_size);
 838         iwl_pcie_gen2_set_tb(trans, tfd, iwl_pcie_get_first_tb_dma(txq, idx),
 839                              tb0_size);
 840
 841         /* map first command fragment, if any remains */
 842         if (copy_size > tb0_size) {
 843                 phys_addr = dma_map_single(trans->dev,
 844                                            ((u8 *)&out_cmd->hdr) + tb0_size,
 845                                            copy_size - tb0_size,
 846                                            DMA_TO_DEVICE);
 847                 if (dma_mapping_error(trans->dev, phys_addr)) {
 848                         idx = -ENOMEM;
 849                         iwl_pcie_gen2_tfd_unmap(trans, out_meta, tfd);
 850                         goto out;
 851                 }
 852                 iwl_pcie_gen2_set_tb(trans, tfd, phys_addr,
 853                                      copy_size - tb0_size);
 854         }
 855
 856         /* map the remaining (adjusted) nocopy/dup fragments */
 857         for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) {
 858                 const void *data = cmddata[i];
 859
 860                 if (!cmdlen[i])
 861                         continue;
 862                 if (!(cmd->dataflags[i] & (IWL_HCMD_DFL_NOCOPY |
 863                                            IWL_HCMD_DFL_DUP)))
 864                         continue;
 865                 if (cmd->dataflags[i] & IWL_HCMD_DFL_DUP)
 866                         data = dup_buf;
 867                 phys_addr = dma_map_single(trans->dev, (void *)data,
 868                                            cmdlen[i], DMA_TO_DEVICE);
 869                 if (dma_mapping_error(trans->dev, phys_addr)) {
 870                         idx = -ENOMEM;
 871                         iwl_pcie_gen2_tfd_unmap(trans, out_meta, tfd);
 872                         goto out;
 873                 }
 874                 iwl_pcie_gen2_set_tb(trans, tfd, phys_addr, cmdlen[i]);
 875         }
 876
 877         BUILD_BUG_ON(IWL_TFH_NUM_TBS > sizeof(out_meta->tbs) * BITS_PER_BYTE);
 878         out_meta->flags = cmd->flags;
 879         if (WARN_ON_ONCE(txq->entries[idx].free_buf))
 880                 kzfree(txq->entries[idx].free_buf);
 881         txq->entries[idx].free_buf = dup_buf;
 882
 883         trace_iwlwifi_dev_hcmd(trans->dev, cmd, cmd_size, &out_cmd->hdr_wide);
 884
 885         /* start timer if queue currently empty */
 886         if (txq->read_ptr == txq->write_ptr && txq->wd_timeout)
 887                 mod_timer(&txq->stuck_timer, jiffies + txq->wd_timeout);
 888
 889         spin_lock_irqsave(&trans_pcie->reg_lock, flags);
 890         if (!(cmd->flags & CMD_SEND_IN_IDLE) &&
 891             !trans_pcie->ref_cmd_in_flight) {
 892                 trans_pcie->ref_cmd_in_flight = true;
 893                 IWL_DEBUG_RPM(trans, "set ref_cmd_in_flight - ref\n");
 894                 iwl_trans_ref(trans);
 895         }
 896         /* Increment and update queue's write index */
 897         txq->write_ptr = iwl_queue_inc_wrap(trans, txq->write_ptr);
 898         iwl_pcie_gen2_txq_inc_wr_ptr(trans, txq);
 899         spin_unlock_irqrestore(&trans_pcie->reg_lock, flags);
 900
 901 out:
 902         spin_unlock_bh(&txq->lock);
 903 free_dup_buf:
 904         if (idx < 0)
 905                 kfree(dup_buf);
 906         return idx;
 907 }
 908
 909 #define HOST_COMPLETE_TIMEOUT   (2 * HZ)
 910
 911 static int iwl_pcie_gen2_send_hcmd_sync(struct iwl_trans *trans,
 912                                         struct iwl_host_cmd *cmd)
 913 {
 914         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 915         const char *cmd_str = iwl_get_cmd_string(trans, cmd->id);
 916         struct iwl_txq *txq = trans_pcie->txq[trans_pcie->cmd_queue];
 917         int cmd_idx;
 918         int ret;
 919
 920         IWL_DEBUG_INFO(trans, "Attempting to send sync command %s\n", cmd_str);
 921
 922         if (WARN(test_and_set_bit(STATUS_SYNC_HCMD_ACTIVE,
 923                                   &trans->status),
 924                  "Command %s: a command is already active!\n", cmd_str))
 925                 return -EIO;
 926
 927         IWL_DEBUG_INFO(trans, "Setting HCMD_ACTIVE for command %s\n", cmd_str);
 928
 929         if (pm_runtime_suspended(&trans_pcie->pci_dev->dev)) {
 930                 ret = wait_event_timeout(trans_pcie->d0i3_waitq,
 931                                  pm_runtime_active(&trans_pcie->pci_dev->dev),
 932                                  msecs_to_jiffies(IWL_TRANS_IDLE_TIMEOUT));
 933                 if (!ret) {
 934                         IWL_ERR(trans, "Timeout exiting D0i3 before hcmd\n");
 935                         return -ETIMEDOUT;
 936                 }
 937         }
 938
 939         cmd_idx = iwl_pcie_gen2_enqueue_hcmd(trans, cmd);
 940         if (cmd_idx < 0) {
 941                 ret = cmd_idx;
 942                 clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status);
 943                 IWL_ERR(trans, "Error sending %s: enqueue_hcmd failed: %d\n",
 944                         cmd_str, ret);
 945                 return ret;
 946         }
 947
 948         ret = wait_event_timeout(trans_pcie->wait_command_queue,
 949                                  !test_bit(STATUS_SYNC_HCMD_ACTIVE,
 950                                            &trans->status),
 951                                  HOST_COMPLETE_TIMEOUT);
 952         if (!ret) {
 953                 IWL_ERR(trans, "Error sending %s: time out after %dms.\n",
 954                         cmd_str, jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
 955
 956                 IWL_ERR(trans, "Current CMD queue read_ptr %d write_ptr %d\n",
 957                         txq->read_ptr, txq->write_ptr);
 958
 959                 clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status);
 960                 IWL_DEBUG_INFO(trans, "Clearing HCMD_ACTIVE for command %s\n",
 961                                cmd_str);
 962                 ret = -ETIMEDOUT;
 963
 964                 iwl_force_nmi(trans);
 965                 iwl_trans_fw_error(trans);
 966
 967                 goto cancel;
 968         }
 969
 970         if (test_bit(STATUS_FW_ERROR, &trans->status)) {
 971                 IWL_ERR(trans, "FW error in SYNC CMD %s\n", cmd_str);
 972                 dump_stack();
 973                 ret = -EIO;
 974                 goto cancel;
 975         }
 976
 977         if (!(cmd->flags & CMD_SEND_IN_RFKILL) &&
 978             test_bit(STATUS_RFKILL_OPMODE, &trans->status)) {
 979                 IWL_DEBUG_RF_KILL(trans, "RFKILL in SYNC CMD... no rsp\n");
 980                 ret = -ERFKILL;
 981                 goto cancel;
 982         }
 983
 984         if ((cmd->flags & CMD_WANT_SKB) && !cmd->resp_pkt) {
 985                 IWL_ERR(trans, "Error: Response NULL in '%s'\n", cmd_str);
 986                 ret = -EIO;
 987                 goto cancel;
 988         }
 989
 990         return 0;
 991
 992 cancel:
 993         if (cmd->flags & CMD_WANT_SKB) {
 994                 /*
 995                  * Cancel the CMD_WANT_SKB flag for the cmd in the
 996                  * TX cmd queue. Otherwise in case the cmd comes
 997                  * in later, it will possibly set an invalid
 998                  * address (cmd->meta.source).
 999                  */
1000                 txq->entries[cmd_idx].meta.flags &= ~CMD_WANT_SKB;
1001         }
1002
1003         if (cmd->resp_pkt) {
1004                 iwl_free_resp(cmd);
1005                 cmd->resp_pkt = NULL;
1006         }
1007
1008         return ret;
1009 }
1010
1011 int iwl_trans_pcie_gen2_send_hcmd(struct iwl_trans *trans,
1012                                   struct iwl_host_cmd *cmd)
1013 {
1014         if (!(cmd->flags & CMD_SEND_IN_RFKILL) &&
1015             test_bit(STATUS_RFKILL_OPMODE, &trans->status)) {
1016                 IWL_DEBUG_RF_KILL(trans, "Dropping CMD 0x%x: RF KILL\n",
1017                                   cmd->id);
1018                 return -ERFKILL;
1019         }
1020
1021         if (cmd->flags & CMD_ASYNC) {
1022                 int ret;
1023
1024                 /* An asynchronous command can not expect an SKB to be set. */
1025                 if (WARN_ON(cmd->flags & CMD_WANT_SKB))
1026                         return -EINVAL;
1027
1028                 ret = iwl_pcie_gen2_enqueue_hcmd(trans, cmd);
1029                 if (ret < 0) {
1030                         IWL_ERR(trans,
1031                                 "Error sending %s: enqueue_hcmd failed: %d\n",
1032                                 iwl_get_cmd_string(trans, cmd->id), ret);
1033                         return ret;
1034                 }
1035                 return 0;
1036         }
1037
1038         return iwl_pcie_gen2_send_hcmd_sync(trans, cmd);
1039 }
1040
1041 /*
1042  * iwl_pcie_gen2_txq_unmap -  Unmap any remaining DMA mappings and free skb's
1043  */
1044 void iwl_pcie_gen2_txq_unmap(struct iwl_trans *trans, int txq_id)
1045 {
1046         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1047         struct iwl_txq *txq = trans_pcie->txq[txq_id];
1048
1049         spin_lock_bh(&txq->lock);
1050         while (txq->write_ptr != txq->read_ptr) {
1051                 IWL_DEBUG_TX_REPLY(trans, "Q %d Free %d\n",
1052                                    txq_id, txq->read_ptr);
1053
1054                 if (txq_id != trans_pcie->cmd_queue) {
1055                         int idx = iwl_pcie_get_cmd_index(txq, txq->read_ptr);
1056                         struct sk_buff *skb = txq->entries[idx].skb;
1057
1058                         if (WARN_ON_ONCE(!skb))
1059                                 continue;
1060
1061                         iwl_pcie_free_tso_page(trans_pcie, skb);
1062                 }
1063                 iwl_pcie_gen2_free_tfd(trans, txq);
1064                 txq->read_ptr = iwl_queue_inc_wrap(trans, txq->read_ptr);
1065
1066                 if (txq->read_ptr == txq->write_ptr) {
1067                         unsigned long flags;
1068
1069                         spin_lock_irqsave(&trans_pcie->reg_lock, flags);
1070                         if (txq_id != trans_pcie->cmd_queue) {
1071                                 IWL_DEBUG_RPM(trans, "Q %d - last tx freed\n",
1072                                               txq->id);
1073                                 iwl_trans_unref(trans);
1074                         } else if (trans_pcie->ref_cmd_in_flight) {
1075                                 trans_pcie->ref_cmd_in_flight = false;
1076                                 IWL_DEBUG_RPM(trans,
1077                                               "clear ref_cmd_in_flight\n");
1078                                 iwl_trans_unref(trans);
1079                         }
1080                         spin_unlock_irqrestore(&trans_pcie->reg_lock, flags);
1081                 }
1082         }
1083
1084         while (!skb_queue_empty(&txq->overflow_q)) {
1085                 struct sk_buff *skb = __skb_dequeue(&txq->overflow_q);
1086
1087                 iwl_op_mode_free_skb(trans->op_mode, skb);
1088         }
1089
1090         spin_unlock_bh(&txq->lock);
1091
1092         /* just in case - this queue may have been stopped */
1093         iwl_wake_queue(trans, txq);
1094 }
1095
1096 void iwl_pcie_gen2_txq_free_memory(struct iwl_trans *trans,
1097                                    struct iwl_txq *txq)
1098 {
1099         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1100         struct device *dev = trans->dev;
1101
1102         /* De-alloc circular buffer of TFDs */
1103         if (txq->tfds) {
1104                 dma_free_coherent(dev,
1105                                   trans_pcie->tfd_size * txq->n_window,
1106                                   txq->tfds, txq->dma_addr);
1107                 dma_free_coherent(dev,
1108                                   sizeof(*txq->first_tb_bufs) * txq->n_window,
1109                                   txq->first_tb_bufs, txq->first_tb_dma);
1110         }
1111
1112         kfree(txq->entries);
1113         iwl_pcie_free_dma_ptr(trans, &txq->bc_tbl);
1114         kfree(txq);
1115 }
1116
1117 /*
1118  * iwl_pcie_txq_free - Deallocate DMA queue.
1119  * @txq: Transmit queue to deallocate.
1120  *
1121  * Empty queue by removing and destroying all BD's.
1122  * Free all buffers.
1123  * 0-fill, but do not free "txq" descriptor structure.
1124  */
1125 static void iwl_pcie_gen2_txq_free(struct iwl_trans *trans, int txq_id)
1126 {
1127         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1128         struct iwl_txq *txq = trans_pcie->txq[txq_id];
1129         int i;
1130
1131         if (WARN_ON(!txq))
1132                 return;
1133
1134         iwl_pcie_gen2_txq_unmap(trans, txq_id);
1135
1136         /* De-alloc array of command/tx buffers */
1137         if (txq_id == trans_pcie->cmd_queue)
1138                 for (i = 0; i < txq->n_window; i++) {
1139                         kzfree(txq->entries[i].cmd);
1140                         kzfree(txq->entries[i].free_buf);
1141                 }
1142         del_timer_sync(&txq->stuck_timer);
1143
1144         iwl_pcie_gen2_txq_free_memory(trans, txq);
1145
1146         trans_pcie->txq[txq_id] = NULL;
1147
1148         clear_bit(txq_id, trans_pcie->queue_used);
1149 }
1150
1151 int iwl_trans_pcie_dyn_txq_alloc_dma(struct iwl_trans *trans,
1152                                      struct iwl_txq **intxq, int size,
1153                                      unsigned int timeout)
1154 {
1155         int ret;
1156
1157         struct iwl_txq *txq;
1158         txq = kzalloc(sizeof(*txq), GFP_KERNEL);
1159         if (!txq)
1160                 return -ENOMEM;
1161         ret = iwl_pcie_alloc_dma_ptr(trans, &txq->bc_tbl,
1162                                      (trans->cfg->device_family >=
1163                                       IWL_DEVICE_FAMILY_22560) ?
1164                                      sizeof(struct iwl_gen3_bc_tbl) :
1165                                      sizeof(struct iwlagn_scd_bc_tbl));
1166         if (ret) {
1167                 IWL_ERR(trans, "Scheduler BC Table allocation failed\n");
1168                 kfree(txq);
1169                 return -ENOMEM;
1170         }
1171
1172         ret = iwl_pcie_txq_alloc(trans, txq, size, false);
1173         if (ret) {
1174                 IWL_ERR(trans, "Tx queue alloc failed\n");
1175                 goto error;
1176         }
1177         ret = iwl_pcie_txq_init(trans, txq, size, false);
1178         if (ret) {
1179                 IWL_ERR(trans, "Tx queue init failed\n");
1180                 goto error;
1181         }
1182
1183         txq->wd_timeout = msecs_to_jiffies(timeout);
1184
1185         *intxq = txq;
1186         return 0;
1187
1188 error:
1189         iwl_pcie_gen2_txq_free_memory(trans, txq);
1190         return ret;
1191 }
1192
1193 int iwl_trans_pcie_txq_alloc_response(struct iwl_trans *trans,
1194                                       struct iwl_txq *txq,
1195                                       struct iwl_host_cmd *hcmd)
1196 {
1197         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1198         struct iwl_tx_queue_cfg_rsp *rsp;
1199         int ret, qid;
1200         u32 wr_ptr;
1201
1202         if (WARN_ON(iwl_rx_packet_payload_len(hcmd->resp_pkt) !=
1203                     sizeof(*rsp))) {
1204                 ret = -EINVAL;
1205                 goto error_free_resp;
1206         }
1207
1208         rsp = (void *)hcmd->resp_pkt->data;
1209         qid = le16_to_cpu(rsp->queue_number);
1210         wr_ptr = le16_to_cpu(rsp->write_pointer);
1211
1212         if (qid >= ARRAY_SIZE(trans_pcie->txq)) {
1213                 WARN_ONCE(1, "queue index %d unsupported", qid);
1214                 ret = -EIO;
1215                 goto error_free_resp;
1216         }
1217
1218         if (test_and_set_bit(qid, trans_pcie->queue_used)) {
1219                 WARN_ONCE(1, "queue %d already used", qid);
1220                 ret = -EIO;
1221                 goto error_free_resp;
1222         }
1223
1224         txq->id = qid;
1225         trans_pcie->txq[qid] = txq;
1226         wr_ptr &= (trans->cfg->base_params->max_tfd_queue_size - 1);
1227
1228         /* Place first TFD at index corresponding to start sequence number */
1229         txq->read_ptr = wr_ptr;
1230         txq->write_ptr = wr_ptr;
1231         iwl_write_direct32(trans, HBUS_TARG_WRPTR,
1232                            (txq->write_ptr) | (qid << 16));
1233         IWL_DEBUG_TX_QUEUES(trans, "Activate queue %d\n", qid);
1234
1235         iwl_free_resp(hcmd);
1236         return qid;
1237
1238 error_free_resp:
1239         iwl_free_resp(hcmd);
1240         iwl_pcie_gen2_txq_free_memory(trans, txq);
1241         return ret;
1242 }
1243
1244 int iwl_trans_pcie_dyn_txq_alloc(struct iwl_trans *trans,
1245                                  __le16 flags, u8 sta_id, u8 tid,
1246                                  int cmd_id, int size,
1247                                  unsigned int timeout)
1248 {
1249         struct iwl_txq *txq = NULL;
1250         struct iwl_tx_queue_cfg_cmd cmd = {
1251                 .flags = flags,
1252                 .sta_id = sta_id,
1253                 .tid = tid,
1254         };
1255         struct iwl_host_cmd hcmd = {
1256                 .id = cmd_id,
1257                 .len = { sizeof(cmd) },
1258                 .data = { &cmd, },
1259                 .flags = CMD_WANT_SKB,
1260         };
1261         int ret;
1262
1263         ret = iwl_trans_pcie_dyn_txq_alloc_dma(trans, &txq, size, timeout);
1264         if (ret)
1265                 return ret;
1266
1267         cmd.tfdq_addr = cpu_to_le64(txq->dma_addr);
1268         cmd.byte_cnt_addr = cpu_to_le64(txq->bc_tbl.dma);
1269         cmd.cb_size = cpu_to_le32(TFD_QUEUE_CB_SIZE(size));
1270
1271         ret = iwl_trans_send_cmd(trans, &hcmd);
1272         if (ret)
1273                 goto error;
1274
1275         return iwl_trans_pcie_txq_alloc_response(trans, txq, &hcmd);
1276
1277 error:
1278         iwl_pcie_gen2_txq_free_memory(trans, txq);
1279         return ret;
1280 }
1281
1282 void iwl_trans_pcie_dyn_txq_free(struct iwl_trans *trans, int queue)
1283 {
1284         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1285
1286         /*
1287          * Upon HW Rfkill - we stop the device, and then stop the queues
1288          * in the op_mode. Just for the sake of the simplicity of the op_mode,
1289          * allow the op_mode to call txq_disable after it already called
1290          * stop_device.
1291          */
1292         if (!test_and_clear_bit(queue, trans_pcie->queue_used)) {
1293                 WARN_ONCE(test_bit(STATUS_DEVICE_ENABLED, &trans->status),
1294                           "queue %d not used", queue);
1295                 return;
1296         }
1297
1298         iwl_pcie_gen2_txq_unmap(trans, queue);
1299
1300         IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", queue);
1301 }
1302
1303 void iwl_pcie_gen2_tx_free(struct iwl_trans *trans)
1304 {
1305         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1306         int i;
1307
1308         memset(trans_pcie->queue_used, 0, sizeof(trans_pcie->queue_used));
1309
1310         /* Free all TX queues */
1311         for (i = 0; i < ARRAY_SIZE(trans_pcie->txq); i++) {
1312                 if (!trans_pcie->txq[i])
1313                         continue;
1314
1315                 iwl_pcie_gen2_txq_free(trans, i);
1316         }
1317 }
1318
1319 int iwl_pcie_gen2_tx_init(struct iwl_trans *trans, int txq_id, int queue_size)
1320 {
1321         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1322         struct iwl_txq *queue;
1323         int ret;
1324
1325         /* alloc and init the tx queue */
1326         if (!trans_pcie->txq[txq_id]) {
1327                 queue = kzalloc(sizeof(*queue), GFP_KERNEL);
1328                 if (!queue) {
1329                         IWL_ERR(trans, "Not enough memory for tx queue\n");
1330                         return -ENOMEM;
1331                 }
1332                 trans_pcie->txq[txq_id] = queue;
1333                 ret = iwl_pcie_txq_alloc(trans, queue, queue_size, true);
1334                 if (ret) {
1335                         IWL_ERR(trans, "Tx %d queue init failed\n", txq_id);
1336                         goto error;
1337                 }
1338         } else {
1339                 queue = trans_pcie->txq[txq_id];
1340         }
1341
1342         ret = iwl_pcie_txq_init(trans, queue, queue_size,
1343                                 (txq_id == trans_pcie->cmd_queue));
1344         if (ret) {
1345                 IWL_ERR(trans, "Tx %d queue alloc failed\n", txq_id);
1346                 goto error;
1347         }
1348         trans_pcie->txq[txq_id]->id = txq_id;
1349         set_bit(txq_id, trans_pcie->queue_used);
1350
1351         return 0;
1352
1353 error:
1354         iwl_pcie_gen2_tx_free(trans);
1355         return ret;
1356 }
1357