drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c

   1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
   4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
   5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
   6  */
   7 #include <linux/types.h>
   8 #include <linux/slab.h>
   9 #include <linux/export.h>
  10 #include <linux/etherdevice.h>
  11 #include <linux/pci.h>
  12 #include <linux/firmware.h>
  13
  14 #include "iwl-drv.h"
  15 #include "iwl-modparams.h"
  16 #include "iwl-nvm-parse.h"
  17 #include "iwl-prph.h"
  18 #include "iwl-io.h"
  19 #include "iwl-csr.h"
  20 #include "fw/acpi.h"
  21 #include "fw/api/nvm-reg.h"
  22 #include "fw/api/commands.h"
  23 #include "fw/api/cmdhdr.h"
  24 #include "fw/img.h"
  25
  26 /* NVM offsets (in words) definitions */
  27 enum nvm_offsets {
  28         /* NVM HW-Section offset (in words) definitions */
  29         SUBSYSTEM_ID = 0x0A,
  30         HW_ADDR = 0x15,
  31
  32         /* NVM SW-Section offset (in words) definitions */
  33         NVM_SW_SECTION = 0x1C0,
  34         NVM_VERSION = 0,
  35         RADIO_CFG = 1,
  36         SKU = 2,
  37         N_HW_ADDRS = 3,
  38         NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
  39
  40         /* NVM calibration section offset (in words) definitions */
  41         NVM_CALIB_SECTION = 0x2B8,
  42         XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
  43
  44         /* NVM REGULATORY -Section offset (in words) definitions */
  45         NVM_CHANNELS_SDP = 0,
  46 };
  47
  48 enum ext_nvm_offsets {
  49         /* NVM HW-Section offset (in words) definitions */
  50         MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
  51
  52         /* NVM SW-Section offset (in words) definitions */
  53         NVM_VERSION_EXT_NVM = 0,
  54         N_HW_ADDRS_FAMILY_8000 = 3,
  55
  56         /* NVM PHY_SKU-Section offset (in words) definitions */
  57         RADIO_CFG_FAMILY_EXT_NVM = 0,
  58         SKU_FAMILY_8000 = 2,
  59
  60         /* NVM REGULATORY -Section offset (in words) definitions */
  61         NVM_CHANNELS_EXTENDED = 0,
  62         NVM_LAR_OFFSET_OLD = 0x4C7,
  63         NVM_LAR_OFFSET = 0x507,
  64         NVM_LAR_ENABLED = 0x7,
  65 };
  66
  67 /* SKU Capabilities (actual values from NVM definition) */
  68 enum nvm_sku_bits {
  69         NVM_SKU_CAP_BAND_24GHZ          = BIT(0),
  70         NVM_SKU_CAP_BAND_52GHZ          = BIT(1),
  71         NVM_SKU_CAP_11N_ENABLE          = BIT(2),
  72         NVM_SKU_CAP_11AC_ENABLE         = BIT(3),
  73         NVM_SKU_CAP_MIMO_DISABLE        = BIT(5),
  74 };
  75
  76 /*
  77  * These are the channel numbers in the order that they are stored in the NVM
  78  */
  79 static const u16 iwl_nvm_channels[] = {
  80         /* 2.4 GHz */
  81         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  82         /* 5 GHz */
  83         36, 40, 44 , 48, 52, 56, 60, 64,
  84         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  85         149, 153, 157, 161, 165
  86 };
  87
  88 static const u16 iwl_ext_nvm_channels[] = {
  89         /* 2.4 GHz */
  90         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  91         /* 5 GHz */
  92         36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
  93         96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  94         149, 153, 157, 161, 165, 169, 173, 177, 181
  95 };
  96
  97 static const u16 iwl_uhb_nvm_channels[] = {
  98         /* 2.4 GHz */
  99         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 100         /* 5 GHz */
 101         36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
 102         96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 103         149, 153, 157, 161, 165, 169, 173, 177, 181,
 104         /* 6-7 GHz */
 105         1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61, 65, 69,
 106         73, 77, 81, 85, 89, 93, 97, 101, 105, 109, 113, 117, 121, 125, 129,
 107         133, 137, 141, 145, 149, 153, 157, 161, 165, 169, 173, 177, 181, 185,
 108         189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233
 109 };
 110
 111 #define IWL_NVM_NUM_CHANNELS            ARRAY_SIZE(iwl_nvm_channels)
 112 #define IWL_NVM_NUM_CHANNELS_EXT        ARRAY_SIZE(iwl_ext_nvm_channels)
 113 #define IWL_NVM_NUM_CHANNELS_UHB        ARRAY_SIZE(iwl_uhb_nvm_channels)
 114 #define NUM_2GHZ_CHANNELS               14
 115 #define NUM_5GHZ_CHANNELS               37
 116 #define FIRST_2GHZ_HT_MINUS             5
 117 #define LAST_2GHZ_HT_PLUS               9
 118 #define N_HW_ADDR_MASK                  0xF
 119
 120 /* rate data (static) */
 121 static struct ieee80211_rate iwl_cfg80211_rates[] = {
 122         { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
 123         { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
 124           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 125         { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
 126           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 127         { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
 128           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 129         { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
 130         { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
 131         { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
 132         { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
 133         { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
 134         { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
 135         { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
 136         { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
 137 };
 138 #define RATES_24_OFFS   0
 139 #define N_RATES_24      ARRAY_SIZE(iwl_cfg80211_rates)
 140 #define RATES_52_OFFS   4
 141 #define N_RATES_52      (N_RATES_24 - RATES_52_OFFS)
 142
 143 /**
 144  * enum iwl_nvm_channel_flags - channel flags in NVM
 145  * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
 146  * @NVM_CHANNEL_IBSS: usable as an IBSS channel
 147  * @NVM_CHANNEL_ACTIVE: active scanning allowed
 148  * @NVM_CHANNEL_RADAR: radar detection required
 149  * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
 150  * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
 151  *      on same channel on 2.4 or same UNII band on 5.2
 152  * @NVM_CHANNEL_UNIFORM: uniform spreading required
 153  * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
 154  * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
 155  * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
 156  * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
 157  * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?)
 158  */
 159 enum iwl_nvm_channel_flags {
 160         NVM_CHANNEL_VALID               = BIT(0),
 161         NVM_CHANNEL_IBSS                = BIT(1),
 162         NVM_CHANNEL_ACTIVE              = BIT(3),
 163         NVM_CHANNEL_RADAR               = BIT(4),
 164         NVM_CHANNEL_INDOOR_ONLY         = BIT(5),
 165         NVM_CHANNEL_GO_CONCURRENT       = BIT(6),
 166         NVM_CHANNEL_UNIFORM             = BIT(7),
 167         NVM_CHANNEL_20MHZ               = BIT(8),
 168         NVM_CHANNEL_40MHZ               = BIT(9),
 169         NVM_CHANNEL_80MHZ               = BIT(10),
 170         NVM_CHANNEL_160MHZ              = BIT(11),
 171         NVM_CHANNEL_DC_HIGH             = BIT(12),
 172 };
 173
 174 /**
 175  * enum iwl_reg_capa_flags - global flags applied for the whole regulatory
 176  * domain.
 177  * @REG_CAPA_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the
 178  *      2.4Ghz band is allowed.
 179  * @REG_CAPA_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the
 180  *      5Ghz band is allowed.
 181  * @REG_CAPA_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
 182  *      for this regulatory domain (valid only in 5Ghz).
 183  * @REG_CAPA_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
 184  *      for this regulatory domain (valid only in 5Ghz).
 185  * @REG_CAPA_MCS_8_ALLOWED: 11ac with MCS 8 is allowed.
 186  * @REG_CAPA_MCS_9_ALLOWED: 11ac with MCS 9 is allowed.
 187  * @REG_CAPA_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden
 188  *      for this regulatory domain (valid only in 5Ghz).
 189  * @REG_CAPA_DC_HIGH_ENABLED: DC HIGH allowed.
 190  * @REG_CAPA_11AX_DISABLED: 11ax is forbidden for this regulatory domain.
 191  */
 192 enum iwl_reg_capa_flags {
 193         REG_CAPA_BF_CCD_LOW_BAND        = BIT(0),
 194         REG_CAPA_BF_CCD_HIGH_BAND       = BIT(1),
 195         REG_CAPA_160MHZ_ALLOWED         = BIT(2),
 196         REG_CAPA_80MHZ_ALLOWED          = BIT(3),
 197         REG_CAPA_MCS_8_ALLOWED          = BIT(4),
 198         REG_CAPA_MCS_9_ALLOWED          = BIT(5),
 199         REG_CAPA_40MHZ_FORBIDDEN        = BIT(7),
 200         REG_CAPA_DC_HIGH_ENABLED        = BIT(9),
 201         REG_CAPA_11AX_DISABLED          = BIT(10),
 202 };
 203
 204 /**
 205  * enum iwl_reg_capa_flags_v2 - global flags applied for the whole regulatory
 206  * domain (version 2).
 207  * @REG_CAPA_V2_STRADDLE_DISABLED: Straddle channels (144, 142, 138) are
 208  *      disabled.
 209  * @REG_CAPA_V2_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the
 210  *      2.4Ghz band is allowed.
 211  * @REG_CAPA_V2_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the
 212  *      5Ghz band is allowed.
 213  * @REG_CAPA_V2_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
 214  *      for this regulatory domain (valid only in 5Ghz).
 215  * @REG_CAPA_V2_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
 216  *      for this regulatory domain (valid only in 5Ghz).
 217  * @REG_CAPA_V2_MCS_8_ALLOWED: 11ac with MCS 8 is allowed.
 218  * @REG_CAPA_V2_MCS_9_ALLOWED: 11ac with MCS 9 is allowed.
 219  * @REG_CAPA_V2_WEATHER_DISABLED: Weather radar channels (120, 124, 128, 118,
 220  *      126, 122) are disabled.
 221  * @REG_CAPA_V2_40MHZ_ALLOWED: 11n channel with a width of 40Mhz is allowed
 222  *      for this regulatory domain (uvalid only in 5Ghz).
 223  * @REG_CAPA_V2_11AX_DISABLED: 11ax is forbidden for this regulatory domain.
 224  */
 225 enum iwl_reg_capa_flags_v2 {
 226         REG_CAPA_V2_STRADDLE_DISABLED   = BIT(0),
 227         REG_CAPA_V2_BF_CCD_LOW_BAND     = BIT(1),
 228         REG_CAPA_V2_BF_CCD_HIGH_BAND    = BIT(2),
 229         REG_CAPA_V2_160MHZ_ALLOWED      = BIT(3),
 230         REG_CAPA_V2_80MHZ_ALLOWED       = BIT(4),
 231         REG_CAPA_V2_MCS_8_ALLOWED       = BIT(5),
 232         REG_CAPA_V2_MCS_9_ALLOWED       = BIT(6),
 233         REG_CAPA_V2_WEATHER_DISABLED    = BIT(7),
 234         REG_CAPA_V2_40MHZ_ALLOWED       = BIT(8),
 235         REG_CAPA_V2_11AX_DISABLED       = BIT(10),
 236 };
 237
 238 /*
 239 * API v2 for reg_capa_flags is relevant from version 6 and onwards of the
 240 * MCC update command response.
 241 */
 242 #define REG_CAPA_V2_RESP_VER    6
 243
 244 /**
 245  * struct iwl_reg_capa - struct for global regulatory capabilities, Used for
 246  * handling the different APIs of reg_capa_flags.
 247  *
 248  * @allow_40mhz: 11n channel with a width of 40Mhz is allowed
 249  *      for this regulatory domain (valid only in 5Ghz).
 250  * @allow_80mhz: 11ac channel with a width of 80Mhz is allowed
 251  *      for this regulatory domain (valid only in 5Ghz).
 252  * @allow_160mhz: 11ac channel with a width of 160Mhz is allowed
 253  *      for this regulatory domain (valid only in 5Ghz).
 254  * @disable_11ax: 11ax is forbidden for this regulatory domain.
 255  */
 256 struct iwl_reg_capa {
 257         u16 allow_40mhz;
 258         u16 allow_80mhz;
 259         u16 allow_160mhz;
 260         u16 disable_11ax;
 261 };
 262
 263 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
 264                                                int chan, u32 flags)
 265 {
 266 #define CHECK_AND_PRINT_I(x)    \
 267         ((flags & NVM_CHANNEL_##x) ? " " #x : "")
 268
 269         if (!(flags & NVM_CHANNEL_VALID)) {
 270                 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
 271                               chan, flags);
 272                 return;
 273         }
 274
 275         /* Note: already can print up to 101 characters, 110 is the limit! */
 276         IWL_DEBUG_DEV(dev, level,
 277                       "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
 278                       chan, flags,
 279                       CHECK_AND_PRINT_I(VALID),
 280                       CHECK_AND_PRINT_I(IBSS),
 281                       CHECK_AND_PRINT_I(ACTIVE),
 282                       CHECK_AND_PRINT_I(RADAR),
 283                       CHECK_AND_PRINT_I(INDOOR_ONLY),
 284                       CHECK_AND_PRINT_I(GO_CONCURRENT),
 285                       CHECK_AND_PRINT_I(UNIFORM),
 286                       CHECK_AND_PRINT_I(20MHZ),
 287                       CHECK_AND_PRINT_I(40MHZ),
 288                       CHECK_AND_PRINT_I(80MHZ),
 289                       CHECK_AND_PRINT_I(160MHZ),
 290                       CHECK_AND_PRINT_I(DC_HIGH));
 291 #undef CHECK_AND_PRINT_I
 292 }
 293
 294 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, enum nl80211_band band,
 295                                  u32 nvm_flags, const struct iwl_cfg *cfg)
 296 {
 297         u32 flags = IEEE80211_CHAN_NO_HT40;
 298
 299         if (band == NL80211_BAND_2GHZ && (nvm_flags & NVM_CHANNEL_40MHZ)) {
 300                 if (ch_num <= LAST_2GHZ_HT_PLUS)
 301                         flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
 302                 if (ch_num >= FIRST_2GHZ_HT_MINUS)
 303                         flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
 304         } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
 305                 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
 306                         flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
 307                 else
 308                         flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
 309         }
 310         if (!(nvm_flags & NVM_CHANNEL_80MHZ))
 311                 flags |= IEEE80211_CHAN_NO_80MHZ;
 312         if (!(nvm_flags & NVM_CHANNEL_160MHZ))
 313                 flags |= IEEE80211_CHAN_NO_160MHZ;
 314
 315         if (!(nvm_flags & NVM_CHANNEL_IBSS))
 316                 flags |= IEEE80211_CHAN_NO_IR;
 317
 318         if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
 319                 flags |= IEEE80211_CHAN_NO_IR;
 320
 321         if (nvm_flags & NVM_CHANNEL_RADAR)
 322                 flags |= IEEE80211_CHAN_RADAR;
 323
 324         if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
 325                 flags |= IEEE80211_CHAN_INDOOR_ONLY;
 326
 327         /* Set the GO concurrent flag only in case that NO_IR is set.
 328          * Otherwise it is meaningless
 329          */
 330         if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
 331             (flags & IEEE80211_CHAN_NO_IR))
 332                 flags |= IEEE80211_CHAN_IR_CONCURRENT;
 333
 334         return flags;
 335 }
 336
 337 static enum nl80211_band iwl_nl80211_band_from_channel_idx(int ch_idx)
 338 {
 339         if (ch_idx >= NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS) {
 340                 return NL80211_BAND_6GHZ;
 341         }
 342
 343         if (ch_idx >= NUM_2GHZ_CHANNELS)
 344                 return NL80211_BAND_5GHZ;
 345         return NL80211_BAND_2GHZ;
 346 }
 347
 348 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
 349                                 struct iwl_nvm_data *data,
 350                                 const void * const nvm_ch_flags,
 351                                 u32 sbands_flags, bool v4)
 352 {
 353         int ch_idx;
 354         int n_channels = 0;
 355         struct ieee80211_channel *channel;
 356         u32 ch_flags;
 357         int num_of_ch;
 358         const u16 *nvm_chan;
 359
 360         if (cfg->uhb_supported) {
 361                 num_of_ch = IWL_NVM_NUM_CHANNELS_UHB;
 362                 nvm_chan = iwl_uhb_nvm_channels;
 363         } else if (cfg->nvm_type == IWL_NVM_EXT) {
 364                 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT;
 365                 nvm_chan = iwl_ext_nvm_channels;
 366         } else {
 367                 num_of_ch = IWL_NVM_NUM_CHANNELS;
 368                 nvm_chan = iwl_nvm_channels;
 369         }
 370
 371         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
 372                 enum nl80211_band band =
 373                         iwl_nl80211_band_from_channel_idx(ch_idx);
 374
 375                 if (v4)
 376                         ch_flags =
 377                                 __le32_to_cpup((__le32 *)nvm_ch_flags + ch_idx);
 378                 else
 379                         ch_flags =
 380                                 __le16_to_cpup((__le16 *)nvm_ch_flags + ch_idx);
 381
 382                 if (band == NL80211_BAND_5GHZ &&
 383                     !data->sku_cap_band_52ghz_enable)
 384                         continue;
 385
 386                 /* workaround to disable wide channels in 5GHz */
 387                 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) &&
 388                     band == NL80211_BAND_5GHZ) {
 389                         ch_flags &= ~(NVM_CHANNEL_40MHZ |
 390                                      NVM_CHANNEL_80MHZ |
 391                                      NVM_CHANNEL_160MHZ);
 392                 }
 393
 394                 if (ch_flags & NVM_CHANNEL_160MHZ)
 395                         data->vht160_supported = true;
 396
 397                 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) &&
 398                     !(ch_flags & NVM_CHANNEL_VALID)) {
 399                         /*
 400                          * Channels might become valid later if lar is
 401                          * supported, hence we still want to add them to
 402                          * the list of supported channels to cfg80211.
 403                          */
 404                         iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
 405                                                     nvm_chan[ch_idx], ch_flags);
 406                         continue;
 407                 }
 408
 409                 channel = &data->channels[n_channels];
 410                 n_channels++;
 411
 412                 channel->hw_value = nvm_chan[ch_idx];
 413                 channel->band = band;
 414                 channel->center_freq =
 415                         ieee80211_channel_to_frequency(
 416                                 channel->hw_value, channel->band);
 417
 418                 /* Initialize regulatory-based run-time data */
 419
 420                 /*
 421                  * Default value - highest tx power value.  max_power
 422                  * is not used in mvm, and is used for backwards compatibility
 423                  */
 424                 channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
 425
 426                 /* don't put limitations in case we're using LAR */
 427                 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR))
 428                         channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
 429                                                                ch_idx, band,
 430                                                                ch_flags, cfg);
 431                 else
 432                         channel->flags = 0;
 433
 434                 /* TODO: Don't put limitations on UHB devices as we still don't
 435                  * have NVM for them
 436                  */
 437                 if (cfg->uhb_supported)
 438                         channel->flags = 0;
 439                 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
 440                                             channel->hw_value, ch_flags);
 441                 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
 442                                  channel->hw_value, channel->max_power);
 443         }
 444
 445         return n_channels;
 446 }
 447
 448 static void iwl_init_vht_hw_capab(struct iwl_trans *trans,
 449                                   struct iwl_nvm_data *data,
 450                                   struct ieee80211_sta_vht_cap *vht_cap,
 451                                   u8 tx_chains, u8 rx_chains)
 452 {
 453         const struct iwl_cfg *cfg = trans->cfg;
 454         int num_rx_ants = num_of_ant(rx_chains);
 455         int num_tx_ants = num_of_ant(tx_chains);
 456
 457         vht_cap->vht_supported = true;
 458
 459         vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
 460                        IEEE80211_VHT_CAP_RXSTBC_1 |
 461                        IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
 462                        3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
 463                        IEEE80211_VHT_MAX_AMPDU_1024K <<
 464                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
 465
 466         if (data->vht160_supported)
 467                 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
 468                                 IEEE80211_VHT_CAP_SHORT_GI_160;
 469
 470         if (cfg->vht_mu_mimo_supported)
 471                 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
 472
 473         if (cfg->ht_params->ldpc)
 474                 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
 475
 476         if (data->sku_cap_mimo_disabled) {
 477                 num_rx_ants = 1;
 478                 num_tx_ants = 1;
 479         }
 480
 481         if (num_tx_ants > 1)
 482                 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
 483         else
 484                 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
 485
 486         switch (iwlwifi_mod_params.amsdu_size) {
 487         case IWL_AMSDU_DEF:
 488                 if (trans->trans_cfg->mq_rx_supported)
 489                         vht_cap->cap |=
 490                                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 491                 else
 492                         vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
 493                 break;
 494         case IWL_AMSDU_2K:
 495                 if (trans->trans_cfg->mq_rx_supported)
 496                         vht_cap->cap |=
 497                                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 498                 else
 499                         WARN(1, "RB size of 2K is not supported by this device\n");
 500                 break;
 501         case IWL_AMSDU_4K:
 502                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
 503                 break;
 504         case IWL_AMSDU_8K:
 505                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
 506                 break;
 507         case IWL_AMSDU_12K:
 508                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 509                 break;
 510         default:
 511                 break;
 512         }
 513
 514         vht_cap->vht_mcs.rx_mcs_map =
 515                 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
 516                             IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
 517                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
 518                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
 519                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
 520                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
 521                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
 522                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
 523
 524         if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
 525                 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
 526                 /* this works because NOT_SUPPORTED == 3 */
 527                 vht_cap->vht_mcs.rx_mcs_map |=
 528                         cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
 529         }
 530
 531         vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
 532
 533         vht_cap->vht_mcs.tx_highest |=
 534                 cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);
 535 }
 536
 537 static const struct ieee80211_sband_iftype_data iwl_he_capa[] = {
 538         {
 539                 .types_mask = BIT(NL80211_IFTYPE_STATION),
 540                 .he_cap = {
 541                         .has_he = true,
 542                         .he_cap_elem = {
 543                                 .mac_cap_info[0] =
 544                                         IEEE80211_HE_MAC_CAP0_HTC_HE |
 545                                         IEEE80211_HE_MAC_CAP0_TWT_REQ,
 546                                 .mac_cap_info[1] =
 547                                         IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 548                                         IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 549                                 .mac_cap_info[2] =
 550                                         IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP,
 551                                 .mac_cap_info[3] =
 552                                         IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
 553                                         IEEE80211_HE_MAC_CAP3_RX_CTRL_FRAME_TO_MULTIBSS,
 554                                 .mac_cap_info[4] =
 555                                         IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU |
 556                                         IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39,
 557                                 .mac_cap_info[5] =
 558                                         IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 |
 559                                         IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 |
 560                                         IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU |
 561                                         IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS |
 562                                         IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX,
 563                                 .phy_cap_info[0] =
 564                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
 565                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
 566                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G,
 567                                 .phy_cap_info[1] =
 568                                         IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
 569                                         IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
 570                                         IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD,
 571                                 .phy_cap_info[2] =
 572                                         IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
 573                                         IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ,
 574                                 .phy_cap_info[3] =
 575                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_NO_DCM |
 576                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
 577                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_NO_DCM |
 578                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
 579                                 .phy_cap_info[4] =
 580                                         IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
 581                                         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 |
 582                                         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8,
 583                                 .phy_cap_info[6] =
 584                                         IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
 585                                         IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB |
 586                                         IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
 587                                 .phy_cap_info[7] =
 588                                         IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
 589                                         IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI,
 590                                 .phy_cap_info[8] =
 591                                         IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
 592                                         IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
 593                                         IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
 594                                         IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
 595                                         IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242,
 596                                 .phy_cap_info[9] =
 597                                         IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
 598                                         IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
 599                                         IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_RESERVED,
 600                                 .phy_cap_info[10] =
 601                                         IEEE80211_HE_PHY_CAP10_HE_MU_M1RU_MAX_LTF,
 602                         },
 603                         /*
 604                          * Set default Tx/Rx HE MCS NSS Support field.
 605                          * Indicate support for up to 2 spatial streams and all
 606                          * MCS, without any special cases
 607                          */
 608                         .he_mcs_nss_supp = {
 609                                 .rx_mcs_80 = cpu_to_le16(0xfffa),
 610                                 .tx_mcs_80 = cpu_to_le16(0xfffa),
 611                                 .rx_mcs_160 = cpu_to_le16(0xfffa),
 612                                 .tx_mcs_160 = cpu_to_le16(0xfffa),
 613                                 .rx_mcs_80p80 = cpu_to_le16(0xffff),
 614                                 .tx_mcs_80p80 = cpu_to_le16(0xffff),
 615                         },
 616                         /*
 617                          * Set default PPE thresholds, with PPET16 set to 0,
 618                          * PPET8 set to 7
 619                          */
 620                         .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
 621                 },
 622         },
 623         {
 624                 .types_mask = BIT(NL80211_IFTYPE_AP),
 625                 .he_cap = {
 626                         .has_he = true,
 627                         .he_cap_elem = {
 628                                 .mac_cap_info[0] =
 629                                         IEEE80211_HE_MAC_CAP0_HTC_HE,
 630                                 .mac_cap_info[1] =
 631                                         IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 632                                         IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 633                                 .mac_cap_info[3] =
 634                                         IEEE80211_HE_MAC_CAP3_OMI_CONTROL,
 635                                 .phy_cap_info[0] =
 636                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
 637                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G,
 638                                 .phy_cap_info[1] =
 639                                         IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD,
 640                                 .phy_cap_info[2] =
 641                                         IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
 642                                         IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US,
 643                                 .phy_cap_info[3] =
 644                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_NO_DCM |
 645                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
 646                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_NO_DCM |
 647                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
 648                                 .phy_cap_info[6] =
 649                                         IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
 650                                 .phy_cap_info[7] =
 651                                         IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI,
 652                                 .phy_cap_info[8] =
 653                                         IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
 654                                         IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242,
 655                                 .phy_cap_info[9] =
 656                                         IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_RESERVED,
 657                         },
 658                         /*
 659                          * Set default Tx/Rx HE MCS NSS Support field.
 660                          * Indicate support for up to 2 spatial streams and all
 661                          * MCS, without any special cases
 662                          */
 663                         .he_mcs_nss_supp = {
 664                                 .rx_mcs_80 = cpu_to_le16(0xfffa),
 665                                 .tx_mcs_80 = cpu_to_le16(0xfffa),
 666                                 .rx_mcs_160 = cpu_to_le16(0xfffa),
 667                                 .tx_mcs_160 = cpu_to_le16(0xfffa),
 668                                 .rx_mcs_80p80 = cpu_to_le16(0xffff),
 669                                 .tx_mcs_80p80 = cpu_to_le16(0xffff),
 670                         },
 671                         /*
 672                          * Set default PPE thresholds, with PPET16 set to 0,
 673                          * PPET8 set to 7
 674                          */
 675                         .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
 676                 },
 677         },
 678 };
 679
 680 static void iwl_init_he_6ghz_capa(struct iwl_trans *trans,
 681                                   struct iwl_nvm_data *data,
 682                                   struct ieee80211_supported_band *sband,
 683                                   u8 tx_chains, u8 rx_chains)
 684 {
 685         struct ieee80211_sta_ht_cap ht_cap;
 686         struct ieee80211_sta_vht_cap vht_cap = {};
 687         struct ieee80211_sband_iftype_data *iftype_data;
 688         u16 he_6ghz_capa = 0;
 689         u32 exp;
 690         int i;
 691
 692         if (sband->band != NL80211_BAND_6GHZ)
 693                 return;
 694
 695         /* grab HT/VHT capabilities and calculate HE 6 GHz capabilities */
 696         iwl_init_ht_hw_capab(trans, data, &ht_cap, NL80211_BAND_5GHZ,
 697                              tx_chains, rx_chains);
 698         WARN_ON(!ht_cap.ht_supported);
 699         iwl_init_vht_hw_capab(trans, data, &vht_cap, tx_chains, rx_chains);
 700         WARN_ON(!vht_cap.vht_supported);
 701
 702         he_6ghz_capa |=
 703                 u16_encode_bits(ht_cap.ampdu_density,
 704                                 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
 705         exp = u32_get_bits(vht_cap.cap,
 706                            IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK);
 707         he_6ghz_capa |=
 708                 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
 709         exp = u32_get_bits(vht_cap.cap, IEEE80211_VHT_CAP_MAX_MPDU_MASK);
 710         he_6ghz_capa |=
 711                 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
 712         /* we don't support extended_ht_cap_info anywhere, so no RD_RESPONDER */
 713         if (vht_cap.cap & IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN)
 714                 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS;
 715         if (vht_cap.cap & IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN)
 716                 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
 717
 718         IWL_DEBUG_EEPROM(trans->dev, "he_6ghz_capa=0x%x\n", he_6ghz_capa);
 719
 720         /* we know it's writable - we set it before ourselves */
 721         iftype_data = (void *)sband->iftype_data;
 722         for (i = 0; i < sband->n_iftype_data; i++)
 723                 iftype_data[i].he_6ghz_capa.capa = cpu_to_le16(he_6ghz_capa);
 724 }
 725
 726 static void
 727 iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans,
 728                          struct ieee80211_supported_band *sband,
 729                          struct ieee80211_sband_iftype_data *iftype_data,
 730                          u8 tx_chains, u8 rx_chains,
 731                          const struct iwl_fw *fw)
 732 {
 733         bool is_ap = iftype_data->types_mask & BIT(NL80211_IFTYPE_AP);
 734
 735         /* Advertise an A-MPDU exponent extension based on
 736          * operating band
 737          */
 738         if (sband->band != NL80211_BAND_2GHZ)
 739                 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |=
 740                         IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1;
 741         else
 742                 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |=
 743                         IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
 744
 745         if (is_ap && iwlwifi_mod_params.nvm_file)
 746                 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |=
 747                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
 748
 749         if ((tx_chains & rx_chains) == ANT_AB) {
 750                 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |=
 751                         IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ;
 752                 iftype_data->he_cap.he_cap_elem.phy_cap_info[5] |=
 753                         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 |
 754                         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2;
 755                 if (!is_ap)
 756                         iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |=
 757                                 IEEE80211_HE_PHY_CAP7_MAX_NC_2;
 758         } else if (!is_ap) {
 759                 /* If not 2x2, we need to indicate 1x1 in the
 760                  * Midamble RX Max NSTS - but not for AP mode
 761                  */
 762                 iftype_data->he_cap.he_cap_elem.phy_cap_info[1] &=
 763                         ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS;
 764                 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &=
 765                         ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS;
 766                 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |=
 767                         IEEE80211_HE_PHY_CAP7_MAX_NC_1;
 768         }
 769
 770         switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {
 771         case IWL_CFG_RF_TYPE_GF:
 772         case IWL_CFG_RF_TYPE_MR:
 773                 iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |=
 774                         IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
 775                 if (!is_ap)
 776                         iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |=
 777                                 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
 778                 break;
 779         }
 780
 781         if (fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_BROADCAST_TWT))
 782                 iftype_data->he_cap.he_cap_elem.mac_cap_info[2] |=
 783                         IEEE80211_HE_MAC_CAP2_BCAST_TWT;
 784 }
 785
 786 static void iwl_init_he_hw_capab(struct iwl_trans *trans,
 787                                  struct iwl_nvm_data *data,
 788                                  struct ieee80211_supported_band *sband,
 789                                  u8 tx_chains, u8 rx_chains,
 790                                  const struct iwl_fw *fw)
 791 {
 792         struct ieee80211_sband_iftype_data *iftype_data;
 793         int i;
 794
 795         /* should only initialize once */
 796         if (WARN_ON(sband->iftype_data))
 797                 return;
 798
 799         BUILD_BUG_ON(sizeof(data->iftd.low) != sizeof(iwl_he_capa));
 800         BUILD_BUG_ON(sizeof(data->iftd.high) != sizeof(iwl_he_capa));
 801
 802         switch (sband->band) {
 803         case NL80211_BAND_2GHZ:
 804                 iftype_data = data->iftd.low;
 805                 break;
 806         case NL80211_BAND_5GHZ:
 807         case NL80211_BAND_6GHZ:
 808                 iftype_data = data->iftd.high;
 809                 break;
 810         default:
 811                 WARN_ON(1);
 812                 return;
 813         }
 814
 815         memcpy(iftype_data, iwl_he_capa, sizeof(iwl_he_capa));
 816
 817         sband->iftype_data = iftype_data;
 818         sband->n_iftype_data = ARRAY_SIZE(iwl_he_capa);
 819
 820         for (i = 0; i < sband->n_iftype_data; i++)
 821                 iwl_nvm_fixup_sband_iftd(trans, sband, &iftype_data[i],
 822                                          tx_chains, rx_chains, fw);
 823
 824         iwl_init_he_6ghz_capa(trans, data, sband, tx_chains, rx_chains);
 825 }
 826
 827 static void iwl_init_sbands(struct iwl_trans *trans,
 828                             struct iwl_nvm_data *data,
 829                             const void *nvm_ch_flags, u8 tx_chains,
 830                             u8 rx_chains, u32 sbands_flags, bool v4,
 831                             const struct iwl_fw *fw)
 832 {
 833         struct device *dev = trans->dev;
 834         const struct iwl_cfg *cfg = trans->cfg;
 835         int n_channels;
 836         int n_used = 0;
 837         struct ieee80211_supported_band *sband;
 838
 839         n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
 840                                           sbands_flags, v4);
 841         sband = &data->bands[NL80211_BAND_2GHZ];
 842         sband->band = NL80211_BAND_2GHZ;
 843         sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
 844         sband->n_bitrates = N_RATES_24;
 845         n_used += iwl_init_sband_channels(data, sband, n_channels,
 846                                           NL80211_BAND_2GHZ);
 847         iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ,
 848                              tx_chains, rx_chains);
 849
 850         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
 851                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
 852                                      fw);
 853
 854         sband = &data->bands[NL80211_BAND_5GHZ];
 855         sband->band = NL80211_BAND_5GHZ;
 856         sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
 857         sband->n_bitrates = N_RATES_52;
 858         n_used += iwl_init_sband_channels(data, sband, n_channels,
 859                                           NL80211_BAND_5GHZ);
 860         iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ,
 861                              tx_chains, rx_chains);
 862         if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
 863                 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap,
 864                                       tx_chains, rx_chains);
 865
 866         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
 867                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
 868                                      fw);
 869
 870         /* 6GHz band. */
 871         sband = &data->bands[NL80211_BAND_6GHZ];
 872         sband->band = NL80211_BAND_6GHZ;
 873         /* use the same rates as 5GHz band */
 874         sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
 875         sband->n_bitrates = N_RATES_52;
 876         n_used += iwl_init_sband_channels(data, sband, n_channels,
 877                                           NL80211_BAND_6GHZ);
 878
 879         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
 880                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
 881                                      fw);
 882         else
 883                 sband->n_channels = 0;
 884         if (n_channels != n_used)
 885                 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
 886                             n_used, n_channels);
 887 }
 888
 889 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
 890                        const __le16 *phy_sku)
 891 {
 892         if (cfg->nvm_type != IWL_NVM_EXT)
 893                 return le16_to_cpup(nvm_sw + SKU);
 894
 895         return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
 896 }
 897
 898 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
 899 {
 900         if (cfg->nvm_type != IWL_NVM_EXT)
 901                 return le16_to_cpup(nvm_sw + NVM_VERSION);
 902         else
 903                 return le32_to_cpup((__le32 *)(nvm_sw +
 904                                                NVM_VERSION_EXT_NVM));
 905 }
 906
 907 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
 908                              const __le16 *phy_sku)
 909 {
 910         if (cfg->nvm_type != IWL_NVM_EXT)
 911                 return le16_to_cpup(nvm_sw + RADIO_CFG);
 912
 913         return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
 914
 915 }
 916
 917 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
 918 {
 919         int n_hw_addr;
 920
 921         if (cfg->nvm_type != IWL_NVM_EXT)
 922                 return le16_to_cpup(nvm_sw + N_HW_ADDRS);
 923
 924         n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
 925
 926         return n_hw_addr & N_HW_ADDR_MASK;
 927 }
 928
 929 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
 930                               struct iwl_nvm_data *data,
 931                               u32 radio_cfg)
 932 {
 933         if (cfg->nvm_type != IWL_NVM_EXT) {
 934                 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
 935                 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
 936                 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
 937                 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
 938                 return;
 939         }
 940
 941         /* set the radio configuration for family 8000 */
 942         data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
 943         data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
 944         data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
 945         data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
 946         data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
 947         data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
 948 }
 949
 950 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
 951 {
 952         const u8 *hw_addr;
 953
 954         hw_addr = (const u8 *)&mac_addr0;
 955         dest[0] = hw_addr[3];
 956         dest[1] = hw_addr[2];
 957         dest[2] = hw_addr[1];
 958         dest[3] = hw_addr[0];
 959
 960         hw_addr = (const u8 *)&mac_addr1;
 961         dest[4] = hw_addr[1];
 962         dest[5] = hw_addr[0];
 963 }
 964
 965 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
 966                                         struct iwl_nvm_data *data)
 967 {
 968         __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans,
 969                                                   CSR_MAC_ADDR0_STRAP(trans)));
 970         __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans,
 971                                                   CSR_MAC_ADDR1_STRAP(trans)));
 972
 973         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 974         /*
 975          * If the OEM fused a valid address, use it instead of the one in the
 976          * OTP
 977          */
 978         if (is_valid_ether_addr(data->hw_addr))
 979                 return;
 980
 981         mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP(trans)));
 982         mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP(trans)));
 983
 984         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 985 }
 986
 987 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
 988                                            const struct iwl_cfg *cfg,
 989                                            struct iwl_nvm_data *data,
 990                                            const __le16 *mac_override,
 991                                            const __be16 *nvm_hw)
 992 {
 993         const u8 *hw_addr;
 994
 995         if (mac_override) {
 996                 static const u8 reserved_mac[] = {
 997                         0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
 998                 };
 999
1000                 hw_addr = (const u8 *)(mac_override +
1001                                  MAC_ADDRESS_OVERRIDE_EXT_NVM);
1002
1003                 /*
1004                  * Store the MAC address from MAO section.
1005                  * No byte swapping is required in MAO section
1006                  */
1007                 memcpy(data->hw_addr, hw_addr, ETH_ALEN);
1008
1009                 /*
1010                  * Force the use of the OTP MAC address in case of reserved MAC
1011                  * address in the NVM, or if address is given but invalid.
1012                  */
1013                 if (is_valid_ether_addr(data->hw_addr) &&
1014                     memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
1015                         return;
1016
1017                 IWL_ERR(trans,
1018                         "mac address from nvm override section is not valid\n");
1019         }
1020
1021         if (nvm_hw) {
1022                 /* read the mac address from WFMP registers */
1023                 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
1024                                                 WFMP_MAC_ADDR_0));
1025                 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
1026                                                 WFMP_MAC_ADDR_1));
1027
1028                 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
1029
1030                 return;
1031         }
1032
1033         IWL_ERR(trans, "mac address is not found\n");
1034 }
1035
1036 static int iwl_set_hw_address(struct iwl_trans *trans,
1037                               const struct iwl_cfg *cfg,
1038                               struct iwl_nvm_data *data, const __be16 *nvm_hw,
1039                               const __le16 *mac_override)
1040 {
1041         if (cfg->mac_addr_from_csr) {
1042                 iwl_set_hw_address_from_csr(trans, data);
1043         } else if (cfg->nvm_type != IWL_NVM_EXT) {
1044                 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
1045
1046                 /* The byte order is little endian 16 bit, meaning 214365 */
1047                 data->hw_addr[0] = hw_addr[1];
1048                 data->hw_addr[1] = hw_addr[0];
1049                 data->hw_addr[2] = hw_addr[3];
1050                 data->hw_addr[3] = hw_addr[2];
1051                 data->hw_addr[4] = hw_addr[5];
1052                 data->hw_addr[5] = hw_addr[4];
1053         } else {
1054                 iwl_set_hw_address_family_8000(trans, cfg, data,
1055                                                mac_override, nvm_hw);
1056         }
1057
1058         if (!is_valid_ether_addr(data->hw_addr)) {
1059                 IWL_ERR(trans, "no valid mac address was found\n");
1060                 return -EINVAL;
1061         }
1062
1063         IWL_INFO(trans, "base HW address: %pM\n", data->hw_addr);
1064
1065         return 0;
1066 }
1067
1068 static bool
1069 iwl_nvm_no_wide_in_5ghz(struct iwl_trans *trans, const struct iwl_cfg *cfg,
1070                         const __be16 *nvm_hw)
1071 {
1072         /*
1073          * Workaround a bug in Indonesia SKUs where the regulatory in
1074          * some 7000-family OTPs erroneously allow wide channels in
1075          * 5GHz.  To check for Indonesia, we take the SKU value from
1076          * bits 1-4 in the subsystem ID and check if it is either 5 or
1077          * 9.  In those cases, we need to force-disable wide channels
1078          * in 5GHz otherwise the FW will throw a sysassert when we try
1079          * to use them.
1080          */
1081         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
1082                 /*
1083                  * Unlike the other sections in the NVM, the hw
1084                  * section uses big-endian.
1085                  */
1086                 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID);
1087                 u8 sku = (subsystem_id & 0x1e) >> 1;
1088
1089                 if (sku == 5 || sku == 9) {
1090                         IWL_DEBUG_EEPROM(trans->dev,
1091                                          "disabling wide channels in 5GHz (0x%0x %d)\n",
1092                                          subsystem_id, sku);
1093                         return true;
1094                 }
1095         }
1096
1097         return false;
1098 }
1099
1100 struct iwl_nvm_data *
1101 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
1102                    const struct iwl_fw *fw,
1103                    const __be16 *nvm_hw, const __le16 *nvm_sw,
1104                    const __le16 *nvm_calib, const __le16 *regulatory,
1105                    const __le16 *mac_override, const __le16 *phy_sku,
1106                    u8 tx_chains, u8 rx_chains)
1107 {
1108         struct iwl_nvm_data *data;
1109         bool lar_enabled;
1110         u32 sku, radio_cfg;
1111         u32 sbands_flags = 0;
1112         u16 lar_config;
1113         const __le16 *ch_section;
1114
1115         if (cfg->uhb_supported)
1116                 data = kzalloc(struct_size(data, channels,
1117                                            IWL_NVM_NUM_CHANNELS_UHB),
1118                                            GFP_KERNEL);
1119         else if (cfg->nvm_type != IWL_NVM_EXT)
1120                 data = kzalloc(struct_size(data, channels,
1121                                            IWL_NVM_NUM_CHANNELS),
1122                                            GFP_KERNEL);
1123         else
1124                 data = kzalloc(struct_size(data, channels,
1125                                            IWL_NVM_NUM_CHANNELS_EXT),
1126                                            GFP_KERNEL);
1127         if (!data)
1128                 return NULL;
1129
1130         data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
1131
1132         radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
1133         iwl_set_radio_cfg(cfg, data, radio_cfg);
1134         if (data->valid_tx_ant)
1135                 tx_chains &= data->valid_tx_ant;
1136         if (data->valid_rx_ant)
1137                 rx_chains &= data->valid_rx_ant;
1138
1139         sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
1140         data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
1141         data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
1142         data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
1143         if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
1144                 data->sku_cap_11n_enable = false;
1145         data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
1146                                     (sku & NVM_SKU_CAP_11AC_ENABLE);
1147         data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
1148
1149         data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
1150
1151         if (cfg->nvm_type != IWL_NVM_EXT) {
1152                 /* Checking for required sections */
1153                 if (!nvm_calib) {
1154                         IWL_ERR(trans,
1155                                 "Can't parse empty Calib NVM sections\n");
1156                         kfree(data);
1157                         return NULL;
1158                 }
1159
1160                 ch_section = cfg->nvm_type == IWL_NVM_SDP ?
1161                              &regulatory[NVM_CHANNELS_SDP] :
1162                              &nvm_sw[NVM_CHANNELS];
1163
1164                 /* in family 8000 Xtal calibration values moved to OTP */
1165                 data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
1166                 data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
1167                 lar_enabled = true;
1168         } else {
1169                 u16 lar_offset = data->nvm_version < 0xE39 ?
1170                                  NVM_LAR_OFFSET_OLD :
1171                                  NVM_LAR_OFFSET;
1172
1173                 lar_config = le16_to_cpup(regulatory + lar_offset);
1174                 data->lar_enabled = !!(lar_config &
1175                                        NVM_LAR_ENABLED);
1176                 lar_enabled = data->lar_enabled;
1177                 ch_section = &regulatory[NVM_CHANNELS_EXTENDED];
1178         }
1179
1180         /* If no valid mac address was found - bail out */
1181         if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) {
1182                 kfree(data);
1183                 return NULL;
1184         }
1185
1186         if (lar_enabled &&
1187             fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT))
1188                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1189
1190         if (iwl_nvm_no_wide_in_5ghz(trans, cfg, nvm_hw))
1191                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ;
1192
1193         iwl_init_sbands(trans, data, ch_section, tx_chains, rx_chains,
1194                         sbands_flags, false, fw);
1195         data->calib_version = 255;
1196
1197         return data;
1198 }
1199 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
1200
1201 static u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan,
1202                                        int ch_idx, u16 nvm_flags,
1203                                        struct iwl_reg_capa reg_capa,
1204                                        const struct iwl_cfg *cfg)
1205 {
1206         u32 flags = NL80211_RRF_NO_HT40;
1207
1208         if (ch_idx < NUM_2GHZ_CHANNELS &&
1209             (nvm_flags & NVM_CHANNEL_40MHZ)) {
1210                 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
1211                         flags &= ~NL80211_RRF_NO_HT40PLUS;
1212                 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
1213                         flags &= ~NL80211_RRF_NO_HT40MINUS;
1214         } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
1215                 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
1216                         flags &= ~NL80211_RRF_NO_HT40PLUS;
1217                 else
1218                         flags &= ~NL80211_RRF_NO_HT40MINUS;
1219         }
1220
1221         if (!(nvm_flags & NVM_CHANNEL_80MHZ))
1222                 flags |= NL80211_RRF_NO_80MHZ;
1223         if (!(nvm_flags & NVM_CHANNEL_160MHZ))
1224                 flags |= NL80211_RRF_NO_160MHZ;
1225
1226         if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
1227                 flags |= NL80211_RRF_NO_IR;
1228
1229         if (nvm_flags & NVM_CHANNEL_RADAR)
1230                 flags |= NL80211_RRF_DFS;
1231
1232         if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
1233                 flags |= NL80211_RRF_NO_OUTDOOR;
1234
1235         /* Set the GO concurrent flag only in case that NO_IR is set.
1236          * Otherwise it is meaningless
1237          */
1238         if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
1239             (flags & NL80211_RRF_NO_IR))
1240                 flags |= NL80211_RRF_GO_CONCURRENT;
1241
1242         /*
1243          * reg_capa is per regulatory domain so apply it for every channel
1244          */
1245         if (ch_idx >= NUM_2GHZ_CHANNELS) {
1246                 if (!reg_capa.allow_40mhz)
1247                         flags |= NL80211_RRF_NO_HT40;
1248
1249                 if (!reg_capa.allow_80mhz)
1250                         flags |= NL80211_RRF_NO_80MHZ;
1251
1252                 if (!reg_capa.allow_160mhz)
1253                         flags |= NL80211_RRF_NO_160MHZ;
1254         }
1255         if (reg_capa.disable_11ax)
1256                 flags |= NL80211_RRF_NO_HE;
1257
1258         return flags;
1259 }
1260
1261 static struct iwl_reg_capa iwl_get_reg_capa(u16 flags, u8 resp_ver)
1262 {
1263         struct iwl_reg_capa reg_capa;
1264
1265         if (resp_ver >= REG_CAPA_V2_RESP_VER) {
1266                 reg_capa.allow_40mhz = flags & REG_CAPA_V2_40MHZ_ALLOWED;
1267                 reg_capa.allow_80mhz = flags & REG_CAPA_V2_80MHZ_ALLOWED;
1268                 reg_capa.allow_160mhz = flags & REG_CAPA_V2_160MHZ_ALLOWED;
1269                 reg_capa.disable_11ax = flags & REG_CAPA_V2_11AX_DISABLED;
1270         } else {
1271                 reg_capa.allow_40mhz = !(flags & REG_CAPA_40MHZ_FORBIDDEN);
1272                 reg_capa.allow_80mhz = flags & REG_CAPA_80MHZ_ALLOWED;
1273                 reg_capa.allow_160mhz = flags & REG_CAPA_160MHZ_ALLOWED;
1274                 reg_capa.disable_11ax = flags & REG_CAPA_11AX_DISABLED;
1275         }
1276         return reg_capa;
1277 }
1278
1279 struct ieee80211_regdomain *
1280 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
1281                        int num_of_ch, __le32 *channels, u16 fw_mcc,
1282                        u16 geo_info, u16 cap, u8 resp_ver)
1283 {
1284         int ch_idx;
1285         u16 ch_flags;
1286         u32 reg_rule_flags, prev_reg_rule_flags = 0;
1287         const u16 *nvm_chan;
1288         struct ieee80211_regdomain *regd, *copy_rd;
1289         struct ieee80211_reg_rule *rule;
1290         enum nl80211_band band;
1291         int center_freq, prev_center_freq = 0;
1292         int valid_rules = 0;
1293         bool new_rule;
1294         int max_num_ch;
1295         struct iwl_reg_capa reg_capa;
1296
1297         if (cfg->uhb_supported) {
1298                 max_num_ch = IWL_NVM_NUM_CHANNELS_UHB;
1299                 nvm_chan = iwl_uhb_nvm_channels;
1300         } else if (cfg->nvm_type == IWL_NVM_EXT) {
1301                 max_num_ch = IWL_NVM_NUM_CHANNELS_EXT;
1302                 nvm_chan = iwl_ext_nvm_channels;
1303         } else {
1304                 max_num_ch = IWL_NVM_NUM_CHANNELS;
1305                 nvm_chan = iwl_nvm_channels;
1306         }
1307
1308         if (WARN_ON(num_of_ch > max_num_ch))
1309                 num_of_ch = max_num_ch;
1310
1311         if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
1312                 return ERR_PTR(-EINVAL);
1313
1314         IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
1315                       num_of_ch);
1316
1317         /* build a regdomain rule for every valid channel */
1318         regd = kzalloc(struct_size(regd, reg_rules, num_of_ch), GFP_KERNEL);
1319         if (!regd)
1320                 return ERR_PTR(-ENOMEM);
1321
1322         /* set alpha2 from FW. */
1323         regd->alpha2[0] = fw_mcc >> 8;
1324         regd->alpha2[1] = fw_mcc & 0xff;
1325
1326         /* parse regulatory capability flags */
1327         reg_capa = iwl_get_reg_capa(cap, resp_ver);
1328
1329         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
1330                 ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
1331                 band = iwl_nl80211_band_from_channel_idx(ch_idx);
1332                 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
1333                                                              band);
1334                 new_rule = false;
1335
1336                 if (!(ch_flags & NVM_CHANNEL_VALID)) {
1337                         iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
1338                                                     nvm_chan[ch_idx], ch_flags);
1339                         continue;
1340                 }
1341
1342                 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
1343                                                              ch_flags, reg_capa,
1344                                                              cfg);
1345
1346                 /* we can't continue the same rule */
1347                 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags ||
1348                     center_freq - prev_center_freq > 20) {
1349                         valid_rules++;
1350                         new_rule = true;
1351                 }
1352
1353                 rule = &regd->reg_rules[valid_rules - 1];
1354
1355                 if (new_rule)
1356                         rule->freq_range.start_freq_khz =
1357                                                 MHZ_TO_KHZ(center_freq - 10);
1358
1359                 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
1360
1361                 /* this doesn't matter - not used by FW */
1362                 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
1363                 rule->power_rule.max_eirp =
1364                         DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
1365
1366                 rule->flags = reg_rule_flags;
1367
1368                 /* rely on auto-calculation to merge BW of contiguous chans */
1369                 rule->flags |= NL80211_RRF_AUTO_BW;
1370                 rule->freq_range.max_bandwidth_khz = 0;
1371
1372                 prev_center_freq = center_freq;
1373                 prev_reg_rule_flags = reg_rule_flags;
1374
1375                 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
1376                                             nvm_chan[ch_idx], ch_flags);
1377
1378                 if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) ||
1379                     band == NL80211_BAND_2GHZ)
1380                         continue;
1381
1382                 reg_query_regdb_wmm(regd->alpha2, center_freq, rule);
1383         }
1384
1385         /*
1386          * Certain firmware versions might report no valid channels
1387          * if booted in RF-kill, i.e. not all calibrations etc. are
1388          * running. We'll get out of this situation later when the
1389          * rfkill is removed and we update the regdomain again, but
1390          * since cfg80211 doesn't accept an empty regdomain, add a
1391          * dummy (unusable) rule here in this case so we can init.
1392          */
1393         if (!valid_rules) {
1394                 valid_rules = 1;
1395                 rule = &regd->reg_rules[valid_rules - 1];
1396                 rule->freq_range.start_freq_khz = MHZ_TO_KHZ(2412);
1397                 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(2413);
1398                 rule->freq_range.max_bandwidth_khz = MHZ_TO_KHZ(1);
1399                 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
1400                 rule->power_rule.max_eirp =
1401                         DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
1402         }
1403
1404         regd->n_reg_rules = valid_rules;
1405
1406         /*
1407          * Narrow down regdom for unused regulatory rules to prevent hole
1408          * between reg rules to wmm rules.
1409          */
1410         copy_rd = kmemdup(regd, struct_size(regd, reg_rules, valid_rules),
1411                           GFP_KERNEL);
1412         if (!copy_rd)
1413                 copy_rd = ERR_PTR(-ENOMEM);
1414
1415         kfree(regd);
1416         return copy_rd;
1417 }
1418 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
1419
1420 #define IWL_MAX_NVM_SECTION_SIZE        0x1b58
1421 #define IWL_MAX_EXT_NVM_SECTION_SIZE    0x1ffc
1422 #define MAX_NVM_FILE_LEN        16384
1423
1424 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data,
1425                     unsigned int len)
1426 {
1427 #define IWL_4165_DEVICE_ID      0x5501
1428 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
1429
1430         if (section == NVM_SECTION_TYPE_PHY_SKU &&
1431             hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
1432             (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
1433                 /* OTP 0x52 bug work around: it's a 1x1 device */
1434                 data[3] = ANT_B | (ANT_B << 4);
1435 }
1436 IWL_EXPORT_SYMBOL(iwl_nvm_fixups);
1437
1438 /*
1439  * Reads external NVM from a file into mvm->nvm_sections
1440  *
1441  * HOW TO CREATE THE NVM FILE FORMAT:
1442  * ------------------------------
1443  * 1. create hex file, format:
1444  *      3800 -> header
1445  *      0000 -> header
1446  *      5a40 -> data
1447  *
1448  *   rev - 6 bit (word1)
1449  *   len - 10 bit (word1)
1450  *   id - 4 bit (word2)
1451  *   rsv - 12 bit (word2)
1452  *
1453  * 2. flip 8bits with 8 bits per line to get the right NVM file format
1454  *
1455  * 3. create binary file from the hex file
1456  *
1457  * 4. save as "iNVM_xxx.bin" under /lib/firmware
1458  */
1459 int iwl_read_external_nvm(struct iwl_trans *trans,
1460                           const char *nvm_file_name,
1461                           struct iwl_nvm_section *nvm_sections)
1462 {
1463         int ret, section_size;
1464         u16 section_id;
1465         const struct firmware *fw_entry;
1466         const struct {
1467                 __le16 word1;
1468                 __le16 word2;
1469                 u8 data[];
1470         } *file_sec;
1471         const u8 *eof;
1472         u8 *temp;
1473         int max_section_size;
1474         const __le32 *dword_buff;
1475
1476 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
1477 #define NVM_WORD2_ID(x) (x >> 12)
1478 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
1479 #define EXT_NVM_WORD1_ID(x) ((x) >> 4)
1480 #define NVM_HEADER_0    (0x2A504C54)
1481 #define NVM_HEADER_1    (0x4E564D2A)
1482 #define NVM_HEADER_SIZE (4 * sizeof(u32))
1483
1484         IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n");
1485
1486         /* Maximal size depends on NVM version */
1487         if (trans->cfg->nvm_type != IWL_NVM_EXT)
1488                 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
1489         else
1490                 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
1491
1492         /*
1493          * Obtain NVM image via request_firmware. Since we already used
1494          * request_firmware_nowait() for the firmware binary load and only
1495          * get here after that we assume the NVM request can be satisfied
1496          * synchronously.
1497          */
1498         ret = request_firmware(&fw_entry, nvm_file_name, trans->dev);
1499         if (ret) {
1500                 IWL_ERR(trans, "ERROR: %s isn't available %d\n",
1501                         nvm_file_name, ret);
1502                 return ret;
1503         }
1504
1505         IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n",
1506                  nvm_file_name, fw_entry->size);
1507
1508         if (fw_entry->size > MAX_NVM_FILE_LEN) {
1509                 IWL_ERR(trans, "NVM file too large\n");
1510                 ret = -EINVAL;
1511                 goto out;
1512         }
1513
1514         eof = fw_entry->data + fw_entry->size;
1515         dword_buff = (__le32 *)fw_entry->data;
1516
1517         /* some NVM file will contain a header.
1518          * The header is identified by 2 dwords header as follow:
1519          * dword[0] = 0x2A504C54
1520          * dword[1] = 0x4E564D2A
1521          *
1522          * This header must be skipped when providing the NVM data to the FW.
1523          */
1524         if (fw_entry->size > NVM_HEADER_SIZE &&
1525             dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
1526             dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
1527                 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
1528                 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
1529                 IWL_INFO(trans, "NVM Manufacturing date %08X\n",
1530                          le32_to_cpu(dword_buff[3]));
1531
1532                 /* nvm file validation, dword_buff[2] holds the file version */
1533                 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
1534                     CSR_HW_REV_STEP(trans->hw_rev) == SILICON_C_STEP &&
1535                     le32_to_cpu(dword_buff[2]) < 0xE4A) {
1536                         ret = -EFAULT;
1537                         goto out;
1538                 }
1539         } else {
1540                 file_sec = (void *)fw_entry->data;
1541         }
1542
1543         while (true) {
1544                 if (file_sec->data > eof) {
1545                         IWL_ERR(trans,
1546                                 "ERROR - NVM file too short for section header\n");
1547                         ret = -EINVAL;
1548                         break;
1549                 }
1550
1551                 /* check for EOF marker */
1552                 if (!file_sec->word1 && !file_sec->word2) {
1553                         ret = 0;
1554                         break;
1555                 }
1556
1557                 if (trans->cfg->nvm_type != IWL_NVM_EXT) {
1558                         section_size =
1559                                 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
1560                         section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
1561                 } else {
1562                         section_size = 2 * EXT_NVM_WORD2_LEN(
1563                                                 le16_to_cpu(file_sec->word2));
1564                         section_id = EXT_NVM_WORD1_ID(
1565                                                 le16_to_cpu(file_sec->word1));
1566                 }
1567
1568                 if (section_size > max_section_size) {
1569                         IWL_ERR(trans, "ERROR - section too large (%d)\n",
1570                                 section_size);
1571                         ret = -EINVAL;
1572                         break;
1573                 }
1574
1575                 if (!section_size) {
1576                         IWL_ERR(trans, "ERROR - section empty\n");
1577                         ret = -EINVAL;
1578                         break;
1579                 }
1580
1581                 if (file_sec->data + section_size > eof) {
1582                         IWL_ERR(trans,
1583                                 "ERROR - NVM file too short for section (%d bytes)\n",
1584                                 section_size);
1585                         ret = -EINVAL;
1586                         break;
1587                 }
1588
1589                 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
1590                          "Invalid NVM section ID %d\n", section_id)) {
1591                         ret = -EINVAL;
1592                         break;
1593                 }
1594
1595                 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
1596                 if (!temp) {
1597                         ret = -ENOMEM;
1598                         break;
1599                 }
1600
1601                 iwl_nvm_fixups(trans->hw_id, section_id, temp, section_size);
1602
1603                 kfree(nvm_sections[section_id].data);
1604                 nvm_sections[section_id].data = temp;
1605                 nvm_sections[section_id].length = section_size;
1606
1607                 /* advance to the next section */
1608                 file_sec = (void *)(file_sec->data + section_size);
1609         }
1610 out:
1611         release_firmware(fw_entry);
1612         return ret;
1613 }
1614 IWL_EXPORT_SYMBOL(iwl_read_external_nvm);
1615
1616 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans,
1617                                  const struct iwl_fw *fw)
1618 {
1619         struct iwl_nvm_get_info cmd = {};
1620         struct iwl_nvm_data *nvm;
1621         struct iwl_host_cmd hcmd = {
1622                 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
1623                 .data = { &cmd, },
1624                 .len = { sizeof(cmd) },
1625                 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO)
1626         };
1627         int  ret;
1628         bool empty_otp;
1629         u32 mac_flags;
1630         u32 sbands_flags = 0;
1631         /*
1632          * All the values in iwl_nvm_get_info_rsp v4 are the same as
1633          * in v3, except for the channel profile part of the
1634          * regulatory.  So we can just access the new struct, with the
1635          * exception of the latter.
1636          */
1637         struct iwl_nvm_get_info_rsp *rsp;
1638         struct iwl_nvm_get_info_rsp_v3 *rsp_v3;
1639         bool v4 = fw_has_api(&fw->ucode_capa,
1640                              IWL_UCODE_TLV_API_REGULATORY_NVM_INFO);
1641         size_t rsp_size = v4 ? sizeof(*rsp) : sizeof(*rsp_v3);
1642         void *channel_profile;
1643
1644         ret = iwl_trans_send_cmd(trans, &hcmd);
1645         if (ret)
1646                 return ERR_PTR(ret);
1647
1648         if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != rsp_size,
1649                  "Invalid payload len in NVM response from FW %d",
1650                  iwl_rx_packet_payload_len(hcmd.resp_pkt))) {
1651                 ret = -EINVAL;
1652                 goto out;
1653         }
1654
1655         rsp = (void *)hcmd.resp_pkt->data;
1656         empty_otp = !!(le32_to_cpu(rsp->general.flags) &
1657                        NVM_GENERAL_FLAGS_EMPTY_OTP);
1658         if (empty_otp)
1659                 IWL_INFO(trans, "OTP is empty\n");
1660
1661         nvm = kzalloc(struct_size(nvm, channels, IWL_NUM_CHANNELS), GFP_KERNEL);
1662         if (!nvm) {
1663                 ret = -ENOMEM;
1664                 goto out;
1665         }
1666
1667         iwl_set_hw_address_from_csr(trans, nvm);
1668         /* TODO: if platform NVM has MAC address - override it here */
1669
1670         if (!is_valid_ether_addr(nvm->hw_addr)) {
1671                 IWL_ERR(trans, "no valid mac address was found\n");
1672                 ret = -EINVAL;
1673                 goto err_free;
1674         }
1675
1676         IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr);
1677
1678         /* Initialize general data */
1679         nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version);
1680         nvm->n_hw_addrs = rsp->general.n_hw_addrs;
1681         if (nvm->n_hw_addrs == 0)
1682                 IWL_WARN(trans,
1683                          "Firmware declares no reserved mac addresses. OTP is empty: %d\n",
1684                          empty_otp);
1685
1686         /* Initialize MAC sku data */
1687         mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags);
1688         nvm->sku_cap_11ac_enable =
1689                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED);
1690         nvm->sku_cap_11n_enable =
1691                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED);
1692         nvm->sku_cap_11ax_enable =
1693                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED);
1694         nvm->sku_cap_band_24ghz_enable =
1695                 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED);
1696         nvm->sku_cap_band_52ghz_enable =
1697                 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED);
1698         nvm->sku_cap_mimo_disabled =
1699                 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED);
1700
1701         /* Initialize PHY sku data */
1702         nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains);
1703         nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains);
1704
1705         if (le32_to_cpu(rsp->regulatory.lar_enabled) &&
1706             fw_has_capa(&fw->ucode_capa,
1707                         IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) {
1708                 nvm->lar_enabled = true;
1709                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1710         }
1711
1712         rsp_v3 = (void *)rsp;
1713         channel_profile = v4 ? (void *)rsp->regulatory.channel_profile :
1714                           (void *)rsp_v3->regulatory.channel_profile;
1715
1716         iwl_init_sbands(trans, nvm,
1717                         channel_profile,
1718                         nvm->valid_tx_ant & fw->valid_tx_ant,
1719                         nvm->valid_rx_ant & fw->valid_rx_ant,
1720                         sbands_flags, v4, fw);
1721
1722         iwl_free_resp(&hcmd);
1723         return nvm;
1724
1725 err_free:
1726         kfree(nvm);
1727 out:
1728         iwl_free_resp(&hcmd);
1729         return ERR_PTR(ret);
1730 }
1731 IWL_EXPORT_SYMBOL(iwl_get_nvm);