1 /******************************************************************************
3 * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
4 * Copyright(c) 2015 - 2016 Intel Deutschland GmbH
6 * Portions of this file are derived from the ipw3945 project.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * The full GNU General Public License is included in this distribution in the
18 * file called LICENSE.
20 * Contact Information:
21 * Intel Linux Wireless <linuxwifi@intel.com>
22 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *****************************************************************************/
25 #include <linux/delay.h>
26 #include <linux/device.h>
27 #include <linux/export.h>
32 #include "iwl-debug.h"
36 void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val)
38 trace_iwlwifi_dev_iowrite8(trans->dev, ofs, val);
39 iwl_trans_write8(trans, ofs, val);
41 IWL_EXPORT_SYMBOL(iwl_write8);
43 void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val)
45 trace_iwlwifi_dev_iowrite32(trans->dev, ofs, val);
46 iwl_trans_write32(trans, ofs, val);
48 IWL_EXPORT_SYMBOL(iwl_write32);
50 void iwl_write64(struct iwl_trans *trans, u64 ofs, u64 val)
52 trace_iwlwifi_dev_iowrite64(trans->dev, ofs, val);
53 iwl_trans_write32(trans, ofs, lower_32_bits(val));
54 iwl_trans_write32(trans, ofs + 4, upper_32_bits(val));
56 IWL_EXPORT_SYMBOL(iwl_write64);
58 u32 iwl_read32(struct iwl_trans *trans, u32 ofs)
60 u32 val = iwl_trans_read32(trans, ofs);
62 trace_iwlwifi_dev_ioread32(trans->dev, ofs, val);
65 IWL_EXPORT_SYMBOL(iwl_read32);
67 #define IWL_POLL_INTERVAL 10 /* microseconds */
69 int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
70 u32 bits, u32 mask, int timeout)
75 if ((iwl_read32(trans, addr) & mask) == (bits & mask))
77 udelay(IWL_POLL_INTERVAL);
78 t += IWL_POLL_INTERVAL;
79 } while (t < timeout);
83 IWL_EXPORT_SYMBOL(iwl_poll_bit);
85 u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg)
87 u32 value = 0x5a5a5a5a;
89 if (iwl_trans_grab_nic_access(trans, &flags)) {
90 value = iwl_read32(trans, reg);
91 iwl_trans_release_nic_access(trans, &flags);
96 IWL_EXPORT_SYMBOL(iwl_read_direct32);
98 void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value)
102 if (iwl_trans_grab_nic_access(trans, &flags)) {
103 iwl_write32(trans, reg, value);
104 iwl_trans_release_nic_access(trans, &flags);
107 IWL_EXPORT_SYMBOL(iwl_write_direct32);
109 void iwl_write_direct64(struct iwl_trans *trans, u64 reg, u64 value)
113 if (iwl_trans_grab_nic_access(trans, &flags)) {
114 iwl_write64(trans, reg, value);
115 iwl_trans_release_nic_access(trans, &flags);
118 IWL_EXPORT_SYMBOL(iwl_write_direct64);
120 int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
126 if ((iwl_read_direct32(trans, addr) & mask) == mask)
128 udelay(IWL_POLL_INTERVAL);
129 t += IWL_POLL_INTERVAL;
130 } while (t < timeout);
134 IWL_EXPORT_SYMBOL(iwl_poll_direct_bit);
136 u32 iwl_read_prph_no_grab(struct iwl_trans *trans, u32 ofs)
138 u32 val = iwl_trans_read_prph(trans, ofs);
139 trace_iwlwifi_dev_ioread_prph32(trans->dev, ofs, val);
142 IWL_EXPORT_SYMBOL(iwl_read_prph_no_grab);
144 void iwl_write_prph_no_grab(struct iwl_trans *trans, u32 ofs, u32 val)
146 trace_iwlwifi_dev_iowrite_prph32(trans->dev, ofs, val);
147 iwl_trans_write_prph(trans, ofs, val);
149 IWL_EXPORT_SYMBOL(iwl_write_prph_no_grab);
151 void iwl_write_prph64_no_grab(struct iwl_trans *trans, u64 ofs, u64 val)
153 trace_iwlwifi_dev_iowrite_prph64(trans->dev, ofs, val);
154 iwl_write_prph_no_grab(trans, ofs, val & 0xffffffff);
155 iwl_write_prph_no_grab(trans, ofs + 4, val >> 32);
157 IWL_EXPORT_SYMBOL(iwl_write_prph64_no_grab);
159 u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
162 u32 val = 0x5a5a5a5a;
164 if (iwl_trans_grab_nic_access(trans, &flags)) {
165 val = iwl_read_prph_no_grab(trans, ofs);
166 iwl_trans_release_nic_access(trans, &flags);
170 IWL_EXPORT_SYMBOL(iwl_read_prph);
172 void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
176 if (iwl_trans_grab_nic_access(trans, &flags)) {
177 iwl_write_prph_no_grab(trans, ofs, val);
178 iwl_trans_release_nic_access(trans, &flags);
181 IWL_EXPORT_SYMBOL(iwl_write_prph);
183 int iwl_poll_prph_bit(struct iwl_trans *trans, u32 addr,
184 u32 bits, u32 mask, int timeout)
189 if ((iwl_read_prph(trans, addr) & mask) == (bits & mask))
191 udelay(IWL_POLL_INTERVAL);
192 t += IWL_POLL_INTERVAL;
193 } while (t < timeout);
198 void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
202 if (iwl_trans_grab_nic_access(trans, &flags)) {
203 iwl_write_prph_no_grab(trans, ofs,
204 iwl_read_prph_no_grab(trans, ofs) |
206 iwl_trans_release_nic_access(trans, &flags);
209 IWL_EXPORT_SYMBOL(iwl_set_bits_prph);
211 void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
216 if (iwl_trans_grab_nic_access(trans, &flags)) {
217 iwl_write_prph_no_grab(trans, ofs,
218 (iwl_read_prph_no_grab(trans, ofs) &
220 iwl_trans_release_nic_access(trans, &flags);
223 IWL_EXPORT_SYMBOL(iwl_set_bits_mask_prph);
225 void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
230 if (iwl_trans_grab_nic_access(trans, &flags)) {
231 val = iwl_read_prph_no_grab(trans, ofs);
232 iwl_write_prph_no_grab(trans, ofs, (val & ~mask));
233 iwl_trans_release_nic_access(trans, &flags);
236 IWL_EXPORT_SYMBOL(iwl_clear_bits_prph);
238 void iwl_force_nmi(struct iwl_trans *trans)
240 if (trans->cfg->device_family < IWL_DEVICE_FAMILY_9000)
241 iwl_write_prph(trans, DEVICE_SET_NMI_REG,
242 DEVICE_SET_NMI_VAL_DRV);
244 iwl_write_prph(trans, UREG_NIC_SET_NMI_DRIVER,
245 UREG_NIC_SET_NMI_DRIVER_NMI_FROM_DRIVER_MSK);
247 IWL_EXPORT_SYMBOL(iwl_force_nmi);
249 static const char *get_rfh_string(int cmd)
251 #define IWL_CMD(x) case x: return #x
252 #define IWL_CMD_MQ(arg, reg, q) { if (arg == reg(q)) return #reg; }
256 for (i = 0; i < IWL_MAX_RX_HW_QUEUES; i++) {
257 IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_BA_LSB, i);
258 IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_WIDX, i);
259 IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_RIDX, i);
260 IWL_CMD_MQ(cmd, RFH_Q_URBD_STTS_WPTR_LSB, i);
264 IWL_CMD(RFH_RXF_DMA_CFG);
265 IWL_CMD(RFH_GEN_CFG);
266 IWL_CMD(RFH_GEN_STATUS);
267 IWL_CMD(FH_TSSR_TX_STATUS_REG);
268 IWL_CMD(FH_TSSR_TX_ERROR_REG);
280 static int iwl_dump_rfh(struct iwl_trans *trans, char **buf)
283 int num_q = trans->num_rx_queues;
284 static const u32 rfh_tbl[] = {
288 FH_TSSR_TX_STATUS_REG,
289 FH_TSSR_TX_ERROR_REG,
291 static const struct reg rfh_mq_tbl[] = {
292 { RFH_Q0_FRBDCB_BA_LSB, true },
293 { RFH_Q0_FRBDCB_WIDX, false },
294 { RFH_Q0_FRBDCB_RIDX, false },
295 { RFH_Q0_URBD_STTS_WPTR_LSB, true },
298 #ifdef CONFIG_IWLWIFI_DEBUGFS
302 * Register (up to 34 for name + 8 blank/q for MQ): 40 chars
303 * Colon + space: 2 characters
304 * 0X%08x: 10 characters
305 * New line: 1 character
306 * Total of 53 characters
308 size_t bufsz = ARRAY_SIZE(rfh_tbl) * 53 +
309 ARRAY_SIZE(rfh_mq_tbl) * 53 * num_q + 40;
311 *buf = kmalloc(bufsz, GFP_KERNEL);
315 pos += scnprintf(*buf + pos, bufsz - pos,
316 "RFH register values:\n");
318 for (i = 0; i < ARRAY_SIZE(rfh_tbl); i++)
319 pos += scnprintf(*buf + pos, bufsz - pos,
321 get_rfh_string(rfh_tbl[i]),
322 iwl_read_prph(trans, rfh_tbl[i]));
324 for (i = 0; i < ARRAY_SIZE(rfh_mq_tbl); i++)
325 for (q = 0; q < num_q; q++) {
326 u32 addr = rfh_mq_tbl[i].addr;
328 addr += q * (rfh_mq_tbl[i].is64 ? 8 : 4);
329 pos += scnprintf(*buf + pos, bufsz - pos,
330 "%34s(q %2d): 0X%08x\n",
331 get_rfh_string(addr), q,
332 iwl_read_prph(trans, addr));
339 IWL_ERR(trans, "RFH register values:\n");
340 for (i = 0; i < ARRAY_SIZE(rfh_tbl); i++)
341 IWL_ERR(trans, " %34s: 0X%08x\n",
342 get_rfh_string(rfh_tbl[i]),
343 iwl_read_prph(trans, rfh_tbl[i]));
345 for (i = 0; i < ARRAY_SIZE(rfh_mq_tbl); i++)
346 for (q = 0; q < num_q; q++) {
347 u32 addr = rfh_mq_tbl[i].addr;
349 addr += q * (rfh_mq_tbl[i].is64 ? 8 : 4);
350 IWL_ERR(trans, " %34s(q %d): 0X%08x\n",
351 get_rfh_string(addr), q,
352 iwl_read_prph(trans, addr));
358 static const char *get_fh_string(int cmd)
361 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
362 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
363 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
364 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
365 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
366 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
367 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
368 IWL_CMD(FH_TSSR_TX_STATUS_REG);
369 IWL_CMD(FH_TSSR_TX_ERROR_REG);
376 int iwl_dump_fh(struct iwl_trans *trans, char **buf)
379 static const u32 fh_tbl[] = {
380 FH_RSCSR_CHNL0_STTS_WPTR_REG,
381 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
383 FH_MEM_RCSR_CHNL0_CONFIG_REG,
384 FH_MEM_RSSR_SHARED_CTRL_REG,
385 FH_MEM_RSSR_RX_STATUS_REG,
386 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
387 FH_TSSR_TX_STATUS_REG,
391 if (trans->cfg->mq_rx_supported)
392 return iwl_dump_rfh(trans, buf);
394 #ifdef CONFIG_IWLWIFI_DEBUGFS
397 size_t bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
399 *buf = kmalloc(bufsz, GFP_KERNEL);
403 pos += scnprintf(*buf + pos, bufsz - pos,
404 "FH register values:\n");
406 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
407 pos += scnprintf(*buf + pos, bufsz - pos,
409 get_fh_string(fh_tbl[i]),
410 iwl_read_direct32(trans, fh_tbl[i]));
416 IWL_ERR(trans, "FH register values:\n");
417 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
418 IWL_ERR(trans, " %34s: 0X%08x\n",
419 get_fh_string(fh_tbl[i]),
420 iwl_read_direct32(trans, fh_tbl[i]));