drivers/net/wireless/ath/ath9k/mci.c

   1 /*
   2  * Copyright (c) 2010-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/dma-mapping.h>
  18 #include <linux/slab.h>
  19
  20 #include "ath9k.h"
  21 #include "mci.h"
  22
  23 static const u8 ath_mci_duty_cycle[] = { 55, 50, 60, 70, 80, 85, 90, 95, 98 };
  24
  25 static struct ath_mci_profile_info*
  26 ath_mci_find_profile(struct ath_mci_profile *mci,
  27                      struct ath_mci_profile_info *info)
  28 {
  29         struct ath_mci_profile_info *entry;
  30
  31         if (list_empty(&mci->info))
  32                 return NULL;
  33
  34         list_for_each_entry(entry, &mci->info, list) {
  35                 if (entry->conn_handle == info->conn_handle)
  36                         return entry;
  37         }
  38         return NULL;
  39 }
  40
  41 static bool ath_mci_add_profile(struct ath_common *common,
  42                                 struct ath_mci_profile *mci,
  43                                 struct ath_mci_profile_info *info)
  44 {
  45         struct ath_mci_profile_info *entry;
  46
  47         if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) &&
  48             (info->type == MCI_GPM_COEX_PROFILE_VOICE))
  49                 return false;
  50
  51         if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) &&
  52             (info->type != MCI_GPM_COEX_PROFILE_VOICE))
  53                 return false;
  54
  55         entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  56         if (!entry)
  57                 return false;
  58
  59         memcpy(entry, info, 10);
  60         INC_PROF(mci, info);
  61         list_add_tail(&entry->list, &mci->info);
  62
  63         return true;
  64 }
  65
  66 static void ath_mci_del_profile(struct ath_common *common,
  67                                 struct ath_mci_profile *mci,
  68                                 struct ath_mci_profile_info *entry)
  69 {
  70         if (!entry)
  71                 return;
  72
  73         DEC_PROF(mci, entry);
  74         list_del(&entry->list);
  75         kfree(entry);
  76 }
  77
  78 void ath_mci_flush_profile(struct ath_mci_profile *mci)
  79 {
  80         struct ath_mci_profile_info *info, *tinfo;
  81
  82         mci->aggr_limit = 0;
  83
  84         if (list_empty(&mci->info))
  85                 return;
  86
  87         list_for_each_entry_safe(info, tinfo, &mci->info, list) {
  88                 list_del(&info->list);
  89                 DEC_PROF(mci, info);
  90                 kfree(info);
  91         }
  92 }
  93
  94 static void ath_mci_adjust_aggr_limit(struct ath_btcoex *btcoex)
  95 {
  96         struct ath_mci_profile *mci = &btcoex->mci;
  97         u32 wlan_airtime = btcoex->btcoex_period *
  98                                 (100 - btcoex->duty_cycle) / 100;
  99
 100         /*
 101          * Scale: wlan_airtime is in ms, aggr_limit is in 0.25 ms.
 102          * When wlan_airtime is less than 4ms, aggregation limit has to be
 103          * adjusted half of wlan_airtime to ensure that the aggregation can fit
 104          * without collision with BT traffic.
 105          */
 106         if ((wlan_airtime <= 4) &&
 107             (!mci->aggr_limit || (mci->aggr_limit > (2 * wlan_airtime))))
 108                 mci->aggr_limit = 2 * wlan_airtime;
 109 }
 110
 111 static void ath_mci_update_scheme(struct ath_softc *sc)
 112 {
 113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 114         struct ath_btcoex *btcoex = &sc->btcoex;
 115         struct ath_mci_profile *mci = &btcoex->mci;
 116         struct ath9k_hw_mci *mci_hw = &sc->sc_ah->btcoex_hw.mci;
 117         struct ath_mci_profile_info *info;
 118         u32 num_profile = NUM_PROF(mci);
 119
 120         if (mci_hw->config & ATH_MCI_CONFIG_DISABLE_TUNING)
 121                 goto skip_tuning;
 122
 123         btcoex->duty_cycle = ath_mci_duty_cycle[num_profile];
 124
 125         if (num_profile == 1) {
 126                 info = list_first_entry(&mci->info,
 127                                         struct ath_mci_profile_info,
 128                                         list);
 129                 if (mci->num_sco) {
 130                         if (info->T == 12)
 131                                 mci->aggr_limit = 8;
 132                         else if (info->T == 6) {
 133                                 mci->aggr_limit = 6;
 134                                 btcoex->duty_cycle = 30;
 135                         }
 136                         ath_dbg(common, MCI,
 137                                 "Single SCO, aggregation limit %d 1/4 ms\n",
 138                                 mci->aggr_limit);
 139                 } else if (mci->num_pan || mci->num_other_acl) {
 140                         /*
 141                          * For single PAN/FTP profile, allocate 35% for BT
 142                          * to improve WLAN throughput.
 143                          */
 144                         btcoex->duty_cycle = 35;
 145                         btcoex->btcoex_period = 53;
 146                         ath_dbg(common, MCI,
 147                                 "Single PAN/FTP bt period %d ms dutycycle %d\n",
 148                                 btcoex->duty_cycle, btcoex->btcoex_period);
 149                 } else if (mci->num_hid) {
 150                         btcoex->duty_cycle = 30;
 151                         mci->aggr_limit = 6;
 152                         ath_dbg(common, MCI,
 153                                 "Multiple attempt/timeout single HID "
 154                                 "aggregation limit 1.5 ms dutycycle 30%%\n");
 155                 }
 156         } else if (num_profile == 2) {
 157                 if (mci->num_hid == 2)
 158                         btcoex->duty_cycle = 30;
 159                 mci->aggr_limit = 6;
 160                 ath_dbg(common, MCI,
 161                         "Two BT profiles aggr limit 1.5 ms dutycycle %d%%\n",
 162                         btcoex->duty_cycle);
 163         } else if (num_profile >= 3) {
 164                 mci->aggr_limit = 4;
 165                 ath_dbg(common, MCI,
 166                         "Three or more profiles aggregation limit 1 ms\n");
 167         }
 168
 169 skip_tuning:
 170         if (IS_CHAN_2GHZ(sc->sc_ah->curchan)) {
 171                 if (IS_CHAN_HT(sc->sc_ah->curchan))
 172                         ath_mci_adjust_aggr_limit(btcoex);
 173                 else
 174                         btcoex->btcoex_period >>= 1;
 175         }
 176
 177         ath9k_hw_btcoex_disable(sc->sc_ah);
 178         ath9k_btcoex_timer_pause(sc);
 179
 180         if (IS_CHAN_5GHZ(sc->sc_ah->curchan))
 181                 return;
 182
 183         btcoex->duty_cycle += (mci->num_bdr ? ATH_MCI_BDR_DUTY_CYCLE : 0);
 184         if (btcoex->duty_cycle > ATH_MCI_MAX_DUTY_CYCLE)
 185                 btcoex->duty_cycle = ATH_MCI_MAX_DUTY_CYCLE;
 186
 187         btcoex->btcoex_no_stomp =  btcoex->btcoex_period * 1000 *
 188                 (100 - btcoex->duty_cycle) / 100;
 189
 190         ath9k_hw_btcoex_enable(sc->sc_ah);
 191         ath9k_btcoex_timer_resume(sc);
 192 }
 193
 194 static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
 195 {
 196         struct ath_hw *ah = sc->sc_ah;
 197         struct ath_common *common = ath9k_hw_common(ah);
 198         u32 payload[4] = {0, 0, 0, 0};
 199
 200         switch (opcode) {
 201         case MCI_GPM_BT_CAL_REQ:
 202                 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
 203                         ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START, NULL);
 204                         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 205                 } else {
 206                         ath_dbg(common, MCI, "MCI State mismatch: %d\n",
 207                                 ar9003_mci_state(ah, MCI_STATE_BT, NULL));
 208                 }
 209                 break;
 210         case MCI_GPM_BT_CAL_DONE:
 211                 ar9003_mci_state(ah, MCI_STATE_BT, NULL);
 212                 break;
 213         case MCI_GPM_BT_CAL_GRANT:
 214                 MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_DONE);
 215                 ar9003_mci_send_message(sc->sc_ah, MCI_GPM, 0, payload,
 216                                         16, false, true);
 217                 break;
 218         default:
 219                 ath_dbg(common, MCI, "Unknown GPM CAL message\n");
 220                 break;
 221         }
 222 }
 223
 224 static void ath9k_mci_work(struct work_struct *work)
 225 {
 226         struct ath_softc *sc = container_of(work, struct ath_softc, mci_work);
 227
 228         ath_mci_update_scheme(sc);
 229 }
 230
 231 static void ath_mci_process_profile(struct ath_softc *sc,
 232                                     struct ath_mci_profile_info *info)
 233 {
 234         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 235         struct ath_btcoex *btcoex = &sc->btcoex;
 236         struct ath_mci_profile *mci = &btcoex->mci;
 237         struct ath_mci_profile_info *entry = NULL;
 238
 239         entry = ath_mci_find_profile(mci, info);
 240         if (entry)
 241                 memcpy(entry, info, 10);
 242
 243         if (info->start) {
 244                 if (!entry && !ath_mci_add_profile(common, mci, info))
 245                         return;
 246         } else
 247                 ath_mci_del_profile(common, mci, entry);
 248
 249         btcoex->btcoex_period = ATH_MCI_DEF_BT_PERIOD;
 250         mci->aggr_limit = mci->num_sco ? 6 : 0;
 251
 252         btcoex->duty_cycle = ath_mci_duty_cycle[NUM_PROF(mci)];
 253         if (NUM_PROF(mci))
 254                 btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
 255         else
 256                 btcoex->bt_stomp_type = mci->num_mgmt ? ATH_BTCOEX_STOMP_ALL :
 257                                                         ATH_BTCOEX_STOMP_LOW;
 258
 259         ieee80211_queue_work(sc->hw, &sc->mci_work);
 260 }
 261
 262 static void ath_mci_process_status(struct ath_softc *sc,
 263                                    struct ath_mci_profile_status *status)
 264 {
 265         struct ath_btcoex *btcoex = &sc->btcoex;
 266         struct ath_mci_profile *mci = &btcoex->mci;
 267         struct ath_mci_profile_info info;
 268         int i = 0, old_num_mgmt = mci->num_mgmt;
 269
 270         /* Link status type are not handled */
 271         if (status->is_link)
 272                 return;
 273
 274         info.conn_handle = status->conn_handle;
 275         if (ath_mci_find_profile(mci, &info))
 276                 return;
 277
 278         if (status->conn_handle >= ATH_MCI_MAX_PROFILE)
 279                 return;
 280
 281         if (status->is_critical)
 282                 __set_bit(status->conn_handle, mci->status);
 283         else
 284                 __clear_bit(status->conn_handle, mci->status);
 285
 286         mci->num_mgmt = 0;
 287         do {
 288                 if (test_bit(i, mci->status))
 289                         mci->num_mgmt++;
 290         } while (++i < ATH_MCI_MAX_PROFILE);
 291
 292         if (old_num_mgmt != mci->num_mgmt)
 293                 ieee80211_queue_work(sc->hw, &sc->mci_work);
 294 }
 295
 296 static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
 297 {
 298         struct ath_hw *ah = sc->sc_ah;
 299         struct ath_mci_profile_info profile_info;
 300         struct ath_mci_profile_status profile_status;
 301         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 302         u32 version;
 303         u8 major;
 304         u8 minor;
 305         u32 seq_num;
 306
 307         switch (opcode) {
 308         case MCI_GPM_COEX_VERSION_QUERY:
 309                 version = ar9003_mci_state(ah, MCI_STATE_SEND_WLAN_COEX_VERSION,
 310                                            NULL);
 311                 break;
 312         case MCI_GPM_COEX_VERSION_RESPONSE:
 313                 major = *(rx_payload + MCI_GPM_COEX_B_MAJOR_VERSION);
 314                 minor = *(rx_payload + MCI_GPM_COEX_B_MINOR_VERSION);
 315                 version = (major << 8) + minor;
 316                 version = ar9003_mci_state(ah, MCI_STATE_SET_BT_COEX_VERSION,
 317                                            &version);
 318                 break;
 319         case MCI_GPM_COEX_STATUS_QUERY:
 320                 ar9003_mci_state(ah, MCI_STATE_SEND_WLAN_CHANNELS, NULL);
 321                 break;
 322         case MCI_GPM_COEX_BT_PROFILE_INFO:
 323                 memcpy(&profile_info,
 324                        (rx_payload + MCI_GPM_COEX_B_PROFILE_TYPE), 10);
 325
 326                 if ((profile_info.type == MCI_GPM_COEX_PROFILE_UNKNOWN) ||
 327                     (profile_info.type >= MCI_GPM_COEX_PROFILE_MAX)) {
 328                         ath_dbg(common, MCI,
 329                                 "Illegal profile type = %d, state = %d\n",
 330                                 profile_info.type,
 331                                 profile_info.start);
 332                         break;
 333                 }
 334
 335                 ath_mci_process_profile(sc, &profile_info);
 336                 break;
 337         case MCI_GPM_COEX_BT_STATUS_UPDATE:
 338                 profile_status.is_link = *(rx_payload +
 339                                            MCI_GPM_COEX_B_STATUS_TYPE);
 340                 profile_status.conn_handle = *(rx_payload +
 341                                                MCI_GPM_COEX_B_STATUS_LINKID);
 342                 profile_status.is_critical = *(rx_payload +
 343                                                MCI_GPM_COEX_B_STATUS_STATE);
 344
 345                 seq_num = *((u32 *)(rx_payload + 12));
 346                 ath_dbg(common, MCI,
 347                         "BT_Status_Update: is_link=%d, linkId=%d, state=%d, SEQ=%d\n",
 348                         profile_status.is_link, profile_status.conn_handle,
 349                         profile_status.is_critical, seq_num);
 350
 351                 ath_mci_process_status(sc, &profile_status);
 352                 break;
 353         default:
 354                 ath_dbg(common, MCI, "Unknown GPM COEX message = 0x%02x\n", opcode);
 355                 break;
 356         }
 357 }
 358
 359 int ath_mci_setup(struct ath_softc *sc)
 360 {
 361         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 362         struct ath_mci_coex *mci = &sc->mci_coex;
 363         struct ath_mci_buf *buf = &mci->sched_buf;
 364
 365         buf->bf_addr = dma_alloc_coherent(sc->dev,
 366                                   ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
 367                                   &buf->bf_paddr, GFP_KERNEL);
 368
 369         if (buf->bf_addr == NULL) {
 370                 ath_dbg(common, FATAL, "MCI buffer alloc failed\n");
 371                 return -ENOMEM;
 372         }
 373
 374         memset(buf->bf_addr, MCI_GPM_RSVD_PATTERN,
 375                ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE);
 376
 377         mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE;
 378
 379         mci->gpm_buf.bf_len = ATH_MCI_GPM_BUF_SIZE;
 380         mci->gpm_buf.bf_addr = (u8 *)mci->sched_buf.bf_addr + mci->sched_buf.bf_len;
 381         mci->gpm_buf.bf_paddr = mci->sched_buf.bf_paddr + mci->sched_buf.bf_len;
 382
 383         ar9003_mci_setup(sc->sc_ah, mci->gpm_buf.bf_paddr,
 384                          mci->gpm_buf.bf_addr, (mci->gpm_buf.bf_len >> 4),
 385                          mci->sched_buf.bf_paddr);
 386
 387         INIT_WORK(&sc->mci_work, ath9k_mci_work);
 388         ath_dbg(common, MCI, "MCI Initialized\n");
 389
 390         return 0;
 391 }
 392
 393 void ath_mci_cleanup(struct ath_softc *sc)
 394 {
 395         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 396         struct ath_hw *ah = sc->sc_ah;
 397         struct ath_mci_coex *mci = &sc->mci_coex;
 398         struct ath_mci_buf *buf = &mci->sched_buf;
 399
 400         if (buf->bf_addr)
 401                 dma_free_coherent(sc->dev,
 402                                   ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
 403                                   buf->bf_addr, buf->bf_paddr);
 404
 405         ar9003_mci_cleanup(ah);
 406
 407         ath_dbg(common, MCI, "MCI De-Initialized\n");
 408 }
 409
 410 void ath_mci_intr(struct ath_softc *sc)
 411 {
 412         struct ath_mci_coex *mci = &sc->mci_coex;
 413         struct ath_hw *ah = sc->sc_ah;
 414         struct ath_common *common = ath9k_hw_common(ah);
 415         u32 mci_int, mci_int_rxmsg;
 416         u32 offset, subtype, opcode;
 417         u32 *pgpm;
 418         u32 more_data = MCI_GPM_MORE;
 419         bool skip_gpm = false;
 420
 421         ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);
 422
 423         if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {
 424                 ar9003_mci_state(ah, MCI_STATE_INIT_GPM_OFFSET, NULL);
 425                 return;
 426         }
 427
 428         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE) {
 429                 u32 payload[4] = { 0xffffffff, 0xffffffff,
 430                                    0xffffffff, 0xffffff00};
 431
 432                 /*
 433                  * The following REMOTE_RESET and SYS_WAKING used to sent
 434                  * only when BT wake up. Now they are always sent, as a
 435                  * recovery method to reset BT MCI's RX alignment.
 436                  */
 437                 ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0,
 438                                         payload, 16, true, false);
 439                 ar9003_mci_send_message(ah, MCI_SYS_WAKING, 0,
 440                                         NULL, 0, true, false);
 441
 442                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE;
 443                 ar9003_mci_state(ah, MCI_STATE_RESET_REQ_WAKE, NULL);
 444
 445                 /*
 446                  * always do this for recovery and 2G/5G toggling and LNA_TRANS
 447                  */
 448                 ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE, NULL);
 449         }
 450
 451         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING) {
 452                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING;
 453
 454                 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_SLEEP) {
 455                         if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL) !=
 456                             MCI_BT_SLEEP)
 457                                 ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE,
 458                                                  NULL);
 459                 }
 460         }
 461
 462         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING) {
 463                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING;
 464
 465                 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
 466                         if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL) !=
 467                             MCI_BT_AWAKE)
 468                                 ar9003_mci_state(ah, MCI_STATE_SET_BT_SLEEP,
 469                                                  NULL);
 470                 }
 471         }
 472
 473         if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
 474             (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) {
 475                 ar9003_mci_state(ah, MCI_STATE_RECOVER_RX, NULL);
 476                 skip_gpm = true;
 477         }
 478
 479         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO) {
 480                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO;
 481                 offset = ar9003_mci_state(ah, MCI_STATE_LAST_SCHD_MSG_OFFSET,
 482                                           NULL);
 483         }
 484
 485         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_GPM) {
 486                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM;
 487
 488                 while (more_data == MCI_GPM_MORE) {
 489
 490                         pgpm = mci->gpm_buf.bf_addr;
 491                         offset = ar9003_mci_state(ah, MCI_STATE_NEXT_GPM_OFFSET,
 492                                                   &more_data);
 493
 494                         if (offset == MCI_GPM_INVALID)
 495                                 break;
 496
 497                         pgpm += (offset >> 2);
 498
 499                         /*
 500                          * The first dword is timer.
 501                          * The real data starts from 2nd dword.
 502                          */
 503                         subtype = MCI_GPM_TYPE(pgpm);
 504                         opcode = MCI_GPM_OPCODE(pgpm);
 505
 506                         if (skip_gpm)
 507                                 goto recycle;
 508
 509                         if (MCI_GPM_IS_CAL_TYPE(subtype)) {
 510                                 ath_mci_cal_msg(sc, subtype, (u8 *)pgpm);
 511                         } else {
 512                                 switch (subtype) {
 513                                 case MCI_GPM_COEX_AGENT:
 514                                         ath_mci_msg(sc, opcode, (u8 *)pgpm);
 515                                         break;
 516                                 default:
 517                                         break;
 518                                 }
 519                         }
 520                 recycle:
 521                         MCI_GPM_RECYCLE(pgpm);
 522                 }
 523         }
 524
 525         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_HW_MSG_MASK) {
 526                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL)
 527                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL;
 528
 529                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_INFO)
 530                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
 531
 532                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {
 533                         int value_dbm = ar9003_mci_state(ah,
 534                                                  MCI_STATE_CONT_RSSI_POWER, NULL);
 535
 536                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;
 537
 538                         if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX, NULL))
 539                                 ath_dbg(common, MCI,
 540                                         "MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n",
 541                                         ar9003_mci_state(ah,
 542                                                  MCI_STATE_CONT_PRIORITY, NULL),
 543                                         value_dbm);
 544                         else
 545                                 ath_dbg(common, MCI,
 546                                         "MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n",
 547                                         ar9003_mci_state(ah,
 548                                                  MCI_STATE_CONT_PRIORITY, NULL),
 549                                         value_dbm);
 550                 }
 551
 552                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK)
 553                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK;
 554
 555                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_RST)
 556                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST;
 557         }
 558
 559         if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
 560             (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT))
 561                 mci_int &= ~(AR_MCI_INTERRUPT_RX_INVALID_HDR |
 562                              AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT);
 563 }
 564
 565 void ath_mci_enable(struct ath_softc *sc)
 566 {
 567         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 568
 569         if (!common->btcoex_enabled)
 570                 return;
 571
 572         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
 573                 sc->sc_ah->imask |= ATH9K_INT_MCI;
 574 }