1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
9 #include <linux/mutex.h>
10 #include <linux/soc/qcom/qmi.h>
12 #define ATH11K_HOST_VERSION_STRING "WIN"
13 #define ATH11K_QMI_WLANFW_TIMEOUT_MS 5000
14 #define ATH11K_QMI_MAX_BDF_FILE_NAME_SIZE 64
15 #define ATH11K_QMI_BDF_MAX_SIZE (256 * 1024)
16 #define ATH11K_QMI_CALDATA_OFFSET (128 * 1024)
17 #define ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 128
18 #define ATH11K_QMI_WLFW_SERVICE_ID_V01 0x45
19 #define ATH11K_QMI_WLFW_SERVICE_VERS_V01 0x01
20 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01 0x02
21 #define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32
22 #define ATH11K_QMI_RESP_LEN_MAX 8192
23 #define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 32
24 #define ATH11K_QMI_CALDB_SIZE 0x480000
25 #define ATH11K_QMI_DEFAULT_CAL_FILE_NAME "caldata.bin"
27 #define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035
28 #define QMI_WLFW_FW_MEM_READY_IND_V01 0x0037
29 #define QMI_WLFW_COLD_BOOT_CAL_DONE_IND_V01 0x0021
30 #define QMI_WLFW_FW_READY_IND_V01 0x0038
32 #define QMI_WLANFW_MAX_DATA_SIZE_V01 6144
33 #define ATH11K_FIRMWARE_MODE_OFF 4
34 #define ATH11K_QMI_TARGET_MEM_MODE_DEFAULT 0
38 enum ath11k_qmi_file_type {
39 ATH11K_QMI_FILE_TYPE_BDF_GOLDEN,
40 ATH11K_QMI_FILE_TYPE_CALDATA,
41 ATH11K_QMI_MAX_FILE_TYPE,
44 enum ath11k_qmi_event_type {
45 ATH11K_QMI_EVENT_SERVER_ARRIVE,
46 ATH11K_QMI_EVENT_SERVER_EXIT,
47 ATH11K_QMI_EVENT_REQUEST_MEM,
48 ATH11K_QMI_EVENT_FW_MEM_READY,
49 ATH11K_QMI_EVENT_FW_READY,
50 ATH11K_QMI_EVENT_COLD_BOOT_CAL_START,
51 ATH11K_QMI_EVENT_COLD_BOOT_CAL_DONE,
52 ATH11K_QMI_EVENT_REGISTER_DRIVER,
53 ATH11K_QMI_EVENT_UNREGISTER_DRIVER,
54 ATH11K_QMI_EVENT_RECOVERY,
55 ATH11K_QMI_EVENT_FORCE_FW_ASSERT,
56 ATH11K_QMI_EVENT_POWER_UP,
57 ATH11K_QMI_EVENT_POWER_DOWN,
61 struct ath11k_qmi_driver_event {
62 struct list_head list;
63 enum ath11k_qmi_event_type type;
67 struct ath11k_qmi_ce_cfg {
68 const struct ce_pipe_config *tgt_ce;
70 const struct service_to_pipe *svc_to_ce_map;
71 int svc_to_ce_map_len;
75 int shadow_reg_v2_len;
78 struct ath11k_qmi_event_msg {
79 struct list_head list;
80 enum ath11k_qmi_event_type type;
83 struct target_mem_chunk {
96 char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1];
97 char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1];
101 struct ath11k_base *ab;
102 struct qmi_handle handle;
103 struct sockaddr_qrtr sq;
104 struct work_struct event_work;
105 struct workqueue_struct *event_wq;
106 struct list_head event_list;
107 spinlock_t event_lock; /* spinlock for qmi event list */
108 struct ath11k_qmi_ce_cfg ce_cfg;
109 struct target_mem_chunk target_mem[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01];
113 struct target_info target;
116 #define QMI_WLANFW_HOST_CAP_REQ_MSG_V01_MAX_LEN 189
117 #define QMI_WLANFW_HOST_CAP_REQ_V01 0x0034
118 #define QMI_WLANFW_HOST_CAP_RESP_MSG_V01_MAX_LEN 7
119 #define QMI_WLFW_HOST_CAP_RESP_V01 0x0034
120 #define QMI_WLFW_MAX_NUM_GPIO_V01 32
121 #define QMI_IPQ8074_FW_MEM_MODE 0xFF
122 #define HOST_DDR_REGION_TYPE 0x1
123 #define BDF_MEM_REGION_TYPE 0x2
124 #define CALDB_MEM_REGION_TYPE 0x4
126 struct qmi_wlanfw_host_cap_req_msg_v01 {
127 u8 num_clients_valid;
133 u32 gpios[QMI_WLFW_MAX_NUM_GPIO_V01];
136 u8 bdf_support_valid;
138 u8 bdf_cache_support_valid;
139 u8 bdf_cache_support;
142 u8 m3_cache_support_valid;
144 u8 cal_filesys_support_valid;
145 u8 cal_filesys_support;
146 u8 cal_cache_support_valid;
147 u8 cal_cache_support;
152 u8 mem_cfg_mode_valid;
156 struct qmi_wlanfw_host_cap_resp_msg_v01 {
157 struct qmi_response_type_v01 resp;
160 #define QMI_WLANFW_IND_REGISTER_REQ_MSG_V01_MAX_LEN 54
161 #define QMI_WLANFW_IND_REGISTER_REQ_V01 0x0020
162 #define QMI_WLANFW_IND_REGISTER_RESP_MSG_V01_MAX_LEN 18
163 #define QMI_WLANFW_IND_REGISTER_RESP_V01 0x0020
164 #define QMI_WLANFW_CLIENT_ID 0x4b4e454c
166 struct qmi_wlanfw_ind_register_req_msg_v01 {
167 u8 fw_ready_enable_valid;
169 u8 initiate_cal_download_enable_valid;
170 u8 initiate_cal_download_enable;
171 u8 initiate_cal_update_enable_valid;
172 u8 initiate_cal_update_enable;
173 u8 msa_ready_enable_valid;
175 u8 pin_connect_result_enable_valid;
176 u8 pin_connect_result_enable;
179 u8 request_mem_enable_valid;
180 u8 request_mem_enable;
181 u8 fw_mem_ready_enable_valid;
182 u8 fw_mem_ready_enable;
183 u8 fw_init_done_enable_valid;
184 u8 fw_init_done_enable;
185 u8 rejuvenate_enable_valid;
186 u32 rejuvenate_enable;
187 u8 xo_cal_enable_valid;
189 u8 cal_done_enable_valid;
193 struct qmi_wlanfw_ind_register_resp_msg_v01 {
194 struct qmi_response_type_v01 resp;
199 #define QMI_WLANFW_REQUEST_MEM_IND_MSG_V01_MAX_LEN 1124
200 #define QMI_WLANFW_RESPOND_MEM_REQ_MSG_V01_MAX_LEN 548
201 #define QMI_WLANFW_RESPOND_MEM_RESP_MSG_V01_MAX_LEN 7
202 #define QMI_WLANFW_REQUEST_MEM_IND_V01 0x0035
203 #define QMI_WLANFW_RESPOND_MEM_REQ_V01 0x0036
204 #define QMI_WLANFW_RESPOND_MEM_RESP_V01 0x0036
205 #define QMI_WLANFW_MAX_NUM_MEM_CFG_V01 2
207 struct qmi_wlanfw_mem_cfg_s_v01 {
213 enum qmi_wlanfw_mem_type_enum_v01 {
214 WLANFW_MEM_TYPE_ENUM_MIN_VAL_V01 = INT_MIN,
215 QMI_WLANFW_MEM_TYPE_MSA_V01 = 0,
216 QMI_WLANFW_MEM_TYPE_DDR_V01 = 1,
217 QMI_WLANFW_MEM_BDF_V01 = 2,
218 QMI_WLANFW_MEM_M3_V01 = 3,
219 QMI_WLANFW_MEM_CAL_V01 = 4,
220 QMI_WLANFW_MEM_DPD_V01 = 5,
221 WLANFW_MEM_TYPE_ENUM_MAX_VAL_V01 = INT_MAX,
224 struct qmi_wlanfw_mem_seg_s_v01 {
226 enum qmi_wlanfw_mem_type_enum_v01 type;
228 struct qmi_wlanfw_mem_cfg_s_v01 mem_cfg[QMI_WLANFW_MAX_NUM_MEM_CFG_V01];
231 struct qmi_wlanfw_request_mem_ind_msg_v01 {
233 struct qmi_wlanfw_mem_seg_s_v01 mem_seg[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01];
236 struct qmi_wlanfw_mem_seg_resp_s_v01 {
239 enum qmi_wlanfw_mem_type_enum_v01 type;
243 struct qmi_wlanfw_respond_mem_req_msg_v01 {
245 struct qmi_wlanfw_mem_seg_resp_s_v01 mem_seg[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01];
248 struct qmi_wlanfw_respond_mem_resp_msg_v01 {
249 struct qmi_response_type_v01 resp;
252 struct qmi_wlanfw_fw_mem_ready_ind_msg_v01 {
256 #define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0
257 #define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 207
258 #define QMI_WLANFW_CAP_REQ_V01 0x0024
259 #define QMI_WLANFW_CAP_RESP_V01 0x0024
261 enum qmi_wlanfw_pipedir_enum_v01 {
262 QMI_WLFW_PIPEDIR_NONE_V01 = 0,
263 QMI_WLFW_PIPEDIR_IN_V01 = 1,
264 QMI_WLFW_PIPEDIR_OUT_V01 = 2,
265 QMI_WLFW_PIPEDIR_INOUT_V01 = 3,
268 struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01 {
276 struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01 {
282 struct qmi_wlanfw_shadow_reg_cfg_s_v01 {
287 struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01 {
291 struct qmi_wlanfw_memory_region_info_s_v01 {
297 struct qmi_wlanfw_rf_chip_info_s_v01 {
302 struct qmi_wlanfw_rf_board_info_s_v01 {
306 struct qmi_wlanfw_soc_info_s_v01 {
310 struct qmi_wlanfw_fw_version_info_s_v01 {
312 char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1];
315 enum qmi_wlanfw_cal_temp_id_enum_v01 {
316 QMI_WLANFW_CAL_TEMP_IDX_0_V01 = 0,
317 QMI_WLANFW_CAL_TEMP_IDX_1_V01 = 1,
318 QMI_WLANFW_CAL_TEMP_IDX_2_V01 = 2,
319 QMI_WLANFW_CAL_TEMP_IDX_3_V01 = 3,
320 QMI_WLANFW_CAL_TEMP_IDX_4_V01 = 4,
321 QMI_WLANFW_CAL_TEMP_ID_MAX_V01 = 0xFF,
324 struct qmi_wlanfw_cap_resp_msg_v01 {
325 struct qmi_response_type_v01 resp;
327 struct qmi_wlanfw_rf_chip_info_s_v01 chip_info;
329 struct qmi_wlanfw_rf_board_info_s_v01 board_info;
331 struct qmi_wlanfw_soc_info_s_v01 soc_info;
332 u8 fw_version_info_valid;
333 struct qmi_wlanfw_fw_version_info_s_v01 fw_version_info;
334 u8 fw_build_id_valid;
335 char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1];
340 struct qmi_wlanfw_cap_req_msg_v01 {
344 #define QMI_WLANFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_LEN 6182
345 #define QMI_WLANFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_LEN 7
346 #define QMI_WLANFW_BDF_DOWNLOAD_RESP_V01 0x0025
347 #define QMI_WLANFW_BDF_DOWNLOAD_REQ_V01 0x0025
348 /* TODO: Need to check with MCL and FW team that data can be pointer and
349 * can be last element in structure
351 struct qmi_wlanfw_bdf_download_req_msg_v01 {
354 enum qmi_wlanfw_cal_temp_id_enum_v01 file_id;
361 u8 data[QMI_WLANFW_MAX_DATA_SIZE_V01];
369 struct qmi_wlanfw_bdf_download_resp_msg_v01 {
370 struct qmi_response_type_v01 resp;
373 #define QMI_WLANFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN 18
374 #define QMI_WLANFW_M3_INFO_RESP_MSG_V01_MAX_MSG_LEN 7
375 #define QMI_WLANFW_M3_INFO_RESP_V01 0x003C
376 #define QMI_WLANFW_M3_INFO_REQ_V01 0x003C
378 struct qmi_wlanfw_m3_info_req_msg_v01 {
383 struct qmi_wlanfw_m3_info_resp_msg_v01 {
384 struct qmi_response_type_v01 resp;
387 #define QMI_WLANFW_WLAN_MODE_REQ_MSG_V01_MAX_LEN 11
388 #define QMI_WLANFW_WLAN_MODE_RESP_MSG_V01_MAX_LEN 7
389 #define QMI_WLANFW_WLAN_CFG_REQ_MSG_V01_MAX_LEN 803
390 #define QMI_WLANFW_WLAN_CFG_RESP_MSG_V01_MAX_LEN 7
391 #define QMI_WLANFW_WLAN_MODE_REQ_V01 0x0022
392 #define QMI_WLANFW_WLAN_MODE_RESP_V01 0x0022
393 #define QMI_WLANFW_WLAN_CFG_REQ_V01 0x0023
394 #define QMI_WLANFW_WLAN_CFG_RESP_V01 0x0023
395 #define QMI_WLANFW_MAX_STR_LEN_V01 16
396 #define QMI_WLANFW_MAX_NUM_CE_V01 12
397 #define QMI_WLANFW_MAX_NUM_SVC_V01 24
398 #define QMI_WLANFW_MAX_NUM_SHADOW_REG_V01 24
399 #define QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01 36
401 struct qmi_wlanfw_wlan_mode_req_msg_v01 {
407 struct qmi_wlanfw_wlan_mode_resp_msg_v01 {
408 struct qmi_response_type_v01 resp;
411 struct qmi_wlanfw_wlan_cfg_req_msg_v01 {
412 u8 host_version_valid;
413 char host_version[QMI_WLANFW_MAX_STR_LEN_V01 + 1];
416 struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01
417 tgt_cfg[QMI_WLANFW_MAX_NUM_CE_V01];
420 struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01
421 svc_cfg[QMI_WLANFW_MAX_NUM_SVC_V01];
424 struct qmi_wlanfw_shadow_reg_cfg_s_v01
425 shadow_reg[QMI_WLANFW_MAX_NUM_SHADOW_REG_V01];
426 u8 shadow_reg_v2_valid;
427 u32 shadow_reg_v2_len;
428 struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01
429 shadow_reg_v2[QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01];
432 struct qmi_wlanfw_wlan_cfg_resp_msg_v01 {
433 struct qmi_response_type_v01 resp;
436 int ath11k_qmi_firmware_start(struct ath11k_base *ab,
438 void ath11k_qmi_firmware_stop(struct ath11k_base *ab);
439 void ath11k_qmi_event_work(struct work_struct *work);
440 void ath11k_qmi_msg_recv_work(struct work_struct *work);
441 void ath11k_qmi_deinit_service(struct ath11k_base *ab);
442 int ath11k_qmi_init_service(struct ath11k_base *ab);