1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
12 #define PCIE_SOC_GLOBAL_RESET 0x3008
13 #define PCIE_SOC_GLOBAL_RESET_V 1
15 #define WLAON_WARM_SW_ENTRY 0x1f80504
16 #define WLAON_SOC_RESET_CAUSE_REG 0x01f8060c
18 #define PCIE_Q6_COOKIE_ADDR 0x01f80500
19 #define PCIE_Q6_COOKIE_DATA 0xc0000000
21 /* register to wake the UMAC from power collapse */
22 #define PCIE_SCRATCH_0_SOC_PCIE_REG 0x4040
24 /* register used for handshake mechanism to validate UMAC is awake */
25 #define PCIE_SOC_WAKE_PCIE_LOCAL_REG 0x3004
27 #define PCIE_PCIE_PARF_LTSSM 0x1e081b0
28 #define PARM_LTSSM_VALUE 0x111
30 #define GCC_GCC_PCIE_HOT_RST 0x1e402bc
31 #define GCC_GCC_PCIE_HOT_RST_VAL 0x10
33 #define PCIE_PCIE_INT_ALL_CLEAR 0x1e08228
34 #define PCIE_SMLH_REQ_RST_LINK_DOWN 0x2
35 #define PCIE_INT_CLEAR_ALL 0xffffffff
37 struct ath11k_msi_user {
43 struct ath11k_msi_config {
46 struct ath11k_msi_user *users;
49 enum ath11k_pci_flags {
50 ATH11K_PCI_FLAG_INIT_DONE,
51 ATH11K_PCI_FLAG_IS_MSI_64,
56 struct ath11k_base *ab;
60 struct mhi_controller *mhi_ctrl;
61 unsigned long mhi_state;
64 /* protects register_window above */
65 spinlock_t window_lock;
67 /* enum ath11k_pci_flags */
71 static inline struct ath11k_pci *ath11k_pci_priv(struct ath11k_base *ab)
73 return (struct ath11k_pci *)ab->drv_priv;
76 int ath11k_pci_get_user_msi_assignment(struct ath11k_pci *ar_pci, char *user_name,
77 int *num_vectors, u32 *user_base_data,
79 int ath11k_pci_get_msi_irq(struct device *dev, unsigned int vector);
80 void ath11k_pci_write32(struct ath11k_base *ab, u32 offset, u32 value);
81 u32 ath11k_pci_read32(struct ath11k_base *ab, u32 offset);